Abstract: A harness arrangement structure of a vehicle comprises a pair of front side frames extending in a vehicle longitudinal direction, an internal combustion engine provided between the front side frames, a pair of front tires provided on a vehicle outside of the front side frames, a battery device provided at a specified position which is located on the vehicle outside of the front side frame and in front of one of the front tires, an electric-power control device for battery device provided in back of the front tire, and a harness interconnecting the electric-power control device and the battery device and arranged along a wheel arch which is formed above the front tires. Accordingly, the battery device can be effectively cooled and the harness interconnecting the battery device and the electric-power control device can be arranged properly.

Abstract: A sample substance S is captured by a capture substance 10 which is immobilized on a working electrode body 161 to provide a method of electrochemically detecting a sample substance capable of detecting the sample substance with high sensitivity. A complex which includes, on a soluble carrier 21, a sample substance S and a labeled binder 20 that has a modified labeled substance 23 containing a labeled substance 20 bound to modified labeled substance 23 containing a labeled substance 24 and a binder 22 that binds to the sample substance S, formed on the working electrode 161. The soluble carrier 21 is dissolved, and the modified labeled substance 23 is attracted to the working electrode 161.

Abstract: In order to provide a method of electrochemically detecting a target substance, a method of electrochemically detecting an analyte, and a detection set which have a theoretical advantage in the measurement sensitivity obtained by a conventional electrochemical detection method using a working electrode with a trapping substance immobilized, can reuse the working electrode, and can detect an analyte regardless of the size thereof, there is provided a method including: attracting the target substance containing a labeling substance in a liquid sample to a working electrode in which a trapping substance for trapping the target substance containing a labeling substance is not present; and electrochemically detecting the target substance containing a labeling substance.

Abstract: A method of detecting a position of a lead of an electric component which additionally includes a body from which the lead extends, the method including the steps of illuminating a lengthwise limited portion of the lead, with a light incident thereto in a direction substantially perpendicular to a lengthwise direction of the lead, taking an image of the lead, on a side of a free end of the lead, in a direction parallel to the lengthwise direction of the lead, and detecting the position of the lead by processing image data representing the taken image.

Abstract: A method of detecting a position of a lead of an electric component which additionally includes a body from which the lead extends, the method including the steps of illuminating a lengthwise limited portion of the lead, with a light incident thereto in a direction substantially perpendicular to a lengthwise direction of the lead, taking an image of the lead, on a side of a free end of the lead, in a direction parallel to the lengthwise direction of the lead, and detecting the position of the lead by processing image data representing the taken image.

Abstract: Disclosed are semiconductor devices employing chips comprising highly integrating semiconductor elements, and having various means for controlling temperature increase of the chips. These means comprise three approaches: means for controlling heat generation by adjusting clock frequencies to be supplied to the chips respectively; means for suppressing heat generation by suitably arranging the wiring construction of the chip substrate; and means for suppressing heat generation of sub-chips by a prarallel process such as optical communication between the sub-chips.

Abstract: The present invention relates to a novel FGF-5 analogous protein derived from mature mRNA formed by directly binding exon 1 to exon 3 in the splicing of a gene coding for FGF-5 protein as well as to a pharmaceutical composition containing the same as an active ingredient. The pharmaceutical composition containing the novel FGF-5 analogous protein of the present invention as an active ingredient can regulate physiological functions of FGF-5, such as regulation of restoration or development of hairs on the head and body, regulation of trophic and functional regulation in the brain and nervous system, proliferation of fibroblasts, etc.

Abstract: An operation unit includes at least one processing circuit, a completion detection circuit, and a synchronous clock generator. The detection circuit is connected to the processing circuits, and detect the completion of the operations carried out by the processing circuit. The synchronous clock generator generates a clock signal of the operation unit according to the speed of the processing circuit. If the unit includes plural processing circuits, detection circuits are connected to the processing circuits respectively. And a synthesis unit is connected to the detection circuits for receiving completion signals and prepares a general monitor flag to determine the slowest speed in the plural processing circuits. The clock signal is generated according to the slowest speed. Even if the operation speeds of LSIs scatters due to manufacturing variations, clock frequencies proper for a given LSI are dynamically and flexibly set so that every LSI may demonstrate its maximum performance.

Abstract: Disclosed are semiconductor devices employing chips comprising highly integrating semiconductor elements, and having various means for controlling temperature increase of the chips. These means comprise three approaches: means for controlling heat generation by adjusting clock frequencies to be supplied to the chips respectively; means for suppressing heat generation by suitably arranging the wiring construction of the chip substrate; and means for suppressing heat generation of sub-chips by a parallel process such as optical communication between the sub-chips.

Abstract: A plurality of stages of MOS gate circuits are connected in series and are driven with a 2-phase AC power source. The alternating speed of the power source is slower than the operation speed of internal circuit elements of the MOS gate circuits. A cutoff device such as a transistor is arranged on each side of each of the MOS gate circuits and is connected to the power source. The cutoff devices of each MOS gate circuit are conductive only when one phase of the power source is at high potential and the other at low potential. When the MOS gate circuit of a given stage (N.sub.i) is inactive, the MOS gate circuit of the next stage (N.sub.i+1) holds charge, to reduce an energy loss.

Abstract: A method of measuring blood pressure, and an automatic sphygmomanometer for implementing this method, whereby an appropriate value of cuff inflation is achieved which is dependent upon the systolic blood pressure of a patient. Pulse waves are extracted from cuff pressure obtained through a pressure detector during inflation of the cuff, and the rate of change in the amplitude of the pulse waves is obtained by a control unit. When the rate of change obtained has exceeded a predetermined threshold value, it is judged that the internal cuff pressure has surpassed the patient's systolic blood pressure. In response, inflation of the cuff by means of a pump is terminated.

Abstract: A temperature measuring device includes a metallic heating member, a temperature sensor such as a thermistor, and an electrical insulating thin film formed on the inner surface of the heating member, the temperature sensor being fixedly mounted on the inner closed-end surface of the heating member, the outer closed-end surface of which faces an object to be measured. The arrangement enables blood temperature to be highly accurately and effectively measured without the need of deeply inserting the heating member into the blood flow passageway and without being influenced by undesirable ambient temperature because the temperature sensor is enclosed by the heating member have a closed-end cylindrical construction. Furthermore, the arrangement can prevent extraneous voltage from being applied on the blood through the use of the electrical insulating film.

Abstract: A line memory for speed conversion, whose data rates of write into and read from a memory cell (1) differ from each other, has a write circuit (2, 3, 4) for writing input data (D.sub.in) into the cell (1) at a predetermined rate and resetting the write address of the cell (1) at a predetermined period, a read circuit (5, 6, 7) for reading data (D.sub.out) from cell (1) at a rate different from the write rate and resetting the read address of the cell (1) at the predetermined period, the first shift circuit (8) for shifting reset timing of the write address, and the second shift circuit (9) for shifting reset timing of the read address, the first and second shift circuits enabling respective setting quantities at the same value. This memory can shift both the write address reset timing and the read address reset timing while keeping both in the same condition.

Abstract: An image memory comprising a plurality of memory cell columns for memorizing image data, common word lines for connecting memory cells of these memory cell columns, a scanner for sequentially designating memory cells of the column on the basis of a clock signal, a column address counter for counting the clock signal to output a column address signal, a write column selector responsive to the column address signal to select a memory cell column into which image data is written, a write buffer for writing image data into the designated memory cell of the memory cell column selected by the write column selector, a read column selector for selecting a memory cell column different from the memory cell column selected by the write column selector, and a read buffer for reading image data from the designated memory cells of the memory cell column selected by the read column selector. The image memory is capable of performing write and read operations at the same time.

Abstract: A data delay/memory circuit includes clock-controlled data latch circuits formed with cascade-connected clocked inverters. The data delay/memory circuit also includes a clock generator for supplying the clocked inverters with clock signals. These clock signals have individual clocking phases and are sequentially generated such that the clocking phase for a final stage of the data latch circuits is ahead of that for an initial stage thereof.

Abstract: The majority circuit has an (n+1)/2-notation counter circuit comprising a plurality of cascade-connected binary counters. An odd number of n-bit serial data are counted by the counter circuit, and an output of the binary counter of the last stage is taken out as a majority output of the majority circuit.

Abstract: An analog signal is input to an A/D converting section. This A/D converting section has a D/A converter therein. The A/D converting section converts the input analog signal to a digital signal. A digital signal processing circuit receives an output signal from the A/D converting section and performs a predetermined process to this signal. A D/A converting section receives and converts an output signal of the digital signal processing circuit to an analog signal. This D/A converting section has a D/A converter with the same circuit arrangement as the D/A converter in the A/D converting section circuit and is constituted by the same circuit pattern. Therefore, the converting functions of the A/D converting section and of the D/A converting section are inverse functions of each other, so that error or distortion, which is caused in the A/D converting section, is automatically corrected when the digital signal is reconverted to the analog signal in the D/A converting section.

Abstract: A signal synthesizer apparatus having a parameter dependent multiplier which includes charge-coupled devices. The multiplier has a gating input to store a charge corresponding to an input signal applied thereto; a transmission circuit for selectively transferring portions of the stored input charge, the selectivity of the transmission circuit being dependent on the prescribed parameter; and an output for receiving and combining all of the charges transferred from the transmission circuit. The transmission circuit comprises a first circuit for selectively dividing the charge corresponding to the input signal into given fragments and for transferring the divided charge, and a second circuit for determining the selectivity of the dividing of the charge according to the prescribed parameter. The rate of the dividing of charge corresponds to the multiplicative coefficient of the multiplier.

Abstract: A memory access control system selects a program mode to carry out a cycle steal operation in response to a logic "1" condition of a predetermined bit position included in a command and selects a direct memory access mode to effect a direct memory access in response to a logic "0" condition of the predetermined bit position.

Abstract: An information transferring apparatus comprises a central processing unit, and an input/output unit, a first-in first-out stack having a plurality of memory elements connected in series and being disposed between the central processing unit and the input/output unit, a command register which is set to a predetermined state under program control by the central processing unit, and a control circuit which receives a signal produced from the command register when the command register is set to a predetermined state and applies a signal designating the memory element which is to be the first memory element of the first-in first-out stack from which information is to be transferred and permits the information stored in the first memory element to be read out directly to the input/output unit.