Patents by Inventor Seiichi Endo

Seiichi Endo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060016308
    Abstract: A slitter apparatus has a rotary shaft provided with one or more upper blades, and a rotary shaft provided with one or more lower blades, the rotary shafts being arranged in parallel with each other and at such a spacing as to achieve a predetermined engagement depth with contact between side face of peripheral part of upper blades and side face of peripheral part of lower blades, wherein a thickness of upper blades is not less than 1 mm, an included angle of upper blades is in a range of 75 to 88°, hardnesses of upper blades and lower blades are in a range of 6.9×103 to 8.8×103 N/mm2, a difference between the hardness of upper blades and the hardness of lower blades is not more than 4.9×102 N/mm2, surface roughnesses of upper blades and lower blades are not more than 4 ?m, and a difference between the surface roughness of upper blades and the surface roughness of lower blades is not more than 2 ?m.
    Type: Application
    Filed: June 27, 2005
    Publication date: January 26, 2006
    Applicant: TDK CORPORATION
    Inventors: Kazuo Katai, Yousuke Miyaki, Seiichi Endo
  • Publication number: 20050012138
    Abstract: A nonvolatile semiconductor memory device includes: a semiconductor substrate having a main surface; a pair of p-type impurity diffused regions, formed at the main surface of the semiconductor substrate to serve as source/drain; a floating gate formed on a region of the semiconductor substrate lying between the paired p-type impurity diffused regions, with a tunnel insulating layer interposed between the floating gate and the region of the semiconductor substrate; and an impurity diffused control region formed at the main surface of the semiconductor substrate to control a potential of the floating gate. Accordingly, a nonvolatile semiconductor device can be obtained in which data can be electrically erased and written at a low voltage.
    Type: Application
    Filed: January 15, 2004
    Publication date: January 20, 2005
    Inventors: Seiichi Endo, Motoharu Ishii
  • Patent number: 5989622
    Abstract: The method is related to intermittent coating capable of distinctly defining a boundary between a coated region and an uncoated region on a web, to thereby intermittently form a coated film on the web with increased accuracy and efficiency. A coating liquid feed pump is arranged so as to alternately communicate with a circulation line and a pocket of an extrusion type coater through a directional control valve, resulting in coating liquid being intermittently fed to the pocket and then forced out of a slit, so that coated regions and uncoated regions may be alternately formed on a conductive sheet material. During interruption of communication between the pocket and the feed pump, the pocket is permitted to communicate via a discharge pipe and a shut-off valve with a sub-tank to reduce a pressure of coating liquid in the pocket, to thereby prevent undesired feeding of coating liquid to the uncoated region beyond an end position of the coated region.
    Type: Grant
    Filed: October 15, 1996
    Date of Patent: November 23, 1999
    Assignee: TDK Corporation
    Inventors: Yuji Iwashita, Seiichi Endo, Keiichi Morimoto