Abstract: Dielectric isolation through electron beam irradiation is applied to a method of fabricating a semiconductor device. Upon forming an insulated gate field effect semiconductor device (FET) in a semiconductor layer on an insulation substrate, the insulated gate electrode is formed to extend over the semiconductor layer region around a semiconductor region in which FET is to be implemented. A semiconductor layer pattern underlying the extension of the gate electrode is enclosed by linear dielectric layers formed along the periphery of the electrode extension through electron beam irradiation. The pattern formation can be accomplished in a short time by virtue of arrangement such that the semiconductor layer pattern is enclosed by the linear dielectric layers. Electric coupling such as capacitive coupling between the gate electrode and other conductor layers is significantly reduced.

Abstract: A light-reflection type pattern forming system used in the process for producing semiconductor devices. The system comprises a light source, a light-reflection type mask having a highly reflective region with a desired pattern on its surface, and an object to be exposed by the light reflected from said highly reflective region. The reflected light contains the information about the desired pattern and the desired pattern is copied on the object. Since this constitution uses reflected light instead of transmitted light, the absorption of light can be prevented and also the restriction on the range of wavelengths of the light from the source can be removed. The part of the incident light cast on the region other than the highly reflective region is absorbed, irregularly reflected or diverted so as not to expose the object.

Abstract: A method of manufacturing a semiconductor storage device comprises the steps of forming a source region and a drain region in a surface of a semiconductor substrate of a first conductivity type in a manner to be spaced from each other, said source and drain regions having a second conductivity type; forming an insulating film on said semiconductor substrate between said source and drain regions; implanting ions of an electrically conductive element into said insulating film, to thus form a floating gate; and leading out source and drain electrodes from said source and drain regions, respectively. By varying the implantation energy and the implantation dose rate in the implanting step, the amount of charges to be accumulated in the floating gate can be controlled.

Abstract: A metal-insulator semiconductor (MIS) device is manufactured by initially forming, on a semiconductor substrate, an insulating film having a hole therethrough and depositing silicon on the substrate to form a first monocrystalline silicon film in the hole and a polycrystalline silicon film on the insulating film. Then, a further insulating film is formed on the first silicon film, and a second silicon film is formed on the further insulating film. The second silicon film and the further insulating film are removed, so that the monocrystalline and polycrystalline parts of the first silicon film are exposed at both sides of the remaining part of the second silicon film and the further insulating film. Finally, an impurity is diffused to form a source and a drain region in the monocrystalline silicon film and conductive layers of polycrystalline silicon are disposed contiguous to the source and drain regions.