Patents by Inventor Seiichi Iwasa
Seiichi Iwasa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150187831Abstract: According to one embodiment, a solid state imaging device includes a semiconductor substrate, a photodiode formed in the semiconductor substrate, a first insulating film having a first refractive index, and disposed on a surface of the semiconductor substrate, a second insulating film having a second refractive index higher than the first refractive index, and formed on the first insulating film above the photodiode, a third insulating film having a third refractive index higher than the second refractive index, and formed on the second insulating film above the photodiode, and a micro lens provided above the photodiode.Type: ApplicationFiled: August 29, 2014Publication date: July 2, 2015Inventors: Hideki OSAMURA, Seiichi IWASA
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Publication number: 20120154357Abstract: A method for driving a plasma display panel having at least three electrodes. The method includes applying a first pulse having a voltage changing with time in a positive direction and a second pulse having a voltage changing with time in a negative direction to a second main electrode in an address preparation period. The method also includes applying a scan pulse to the second main electrode in an address period. The method also includes at least one of the first and second pulses in the address preparation period has a stepwise waveform whose voltage rise or fall stepwise.Type: ApplicationFiled: February 22, 2012Publication date: June 21, 2012Applicant: HITACHI PATENT LICENSING CO., LTD.Inventors: Yasunobu HASHIMOTO, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
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Publication number: 20110316056Abstract: The present invention relates to a method of manufacturing a semiconductor device having a shared contact for connection between a source/drain region and a gate electrode. After formation of a gate electrode via a gate insulating film on a semiconductor substrate, a top surface of the substrate is covered with a cover film. After removal of the cover film from at least one of sidewall surface of the gate electrode and a part of the top surface of the substrate adjacent to the sidewall surface, a semiconductor layer is epitaxially grown on a top surface of an exposed substrate to electrically connect the substrate and the at least one sidewall surface of the gate electrode. Then, a source/drain region is formed in a top surface part of the substrate or the semiconductor layer using the gate electrode as a mask.Type: ApplicationFiled: September 2, 2011Publication date: December 29, 2011Inventor: Seiichi Iwasa
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Patent number: 8062947Abstract: The present invention relates to a method of manufacturing a semiconductor device having a shared contact for connection between a source/drain region and a gate electrode. After formation of a gate electrode via a gate insulating film on a semiconductor substrate, a top surface of the substrate is covered with a cover film. After removal of the cover film from at least one of sidewall surface of the gate electrode and a part of the top surface of the substrate adjacent to the sidewall surface, a semiconductor layer is epitaxially grown on a top surface of an exposed substrate to electrically connect the substrate and the at least one sidewall surface of the gate electrode. Then, a source/drain region is formed in a top surface part of the substrate or the semiconductor layer using the gate electrode as a mask.Type: GrantFiled: December 18, 2008Date of Patent: November 22, 2011Assignee: Kabushiki Kaisha ToshibaInventor: Seiichi Iwasa
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Patent number: 7965261Abstract: A method for driving an AC type surface-discharge display device having cells arranged in a matrix. Each cell has at least three electrodes including a pair of main electrodes and on every line of the matrix and an address electrode on every column of the matrix. The method includes conducting an address preparation period including applying a first charge adjusting voltage, monotonously rising or falling, to a gap between the main electrodes. The method also includes applying a charge adjusting voltage, monotonously rising or falling, to a gap between a scan electrode and the address electrode.Type: GrantFiled: July 25, 2007Date of Patent: June 21, 2011Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
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Publication number: 20110031576Abstract: A solid-state imaging device includes a first-conductive semiconductor layer, a second-conductive semiconductor layer that is provided on the first-conductive semiconductor layer, a light receiving element that is formed in the second-conductive semiconductor layer, and an element isolation region that is formed to surround the light receiving element in an in-plane direction of the second-conductive semiconductor layer, in which the element isolation region includes a first-conductive first element isolation unit that is connected to the first-conductive semiconductor layer, a hollow that is formed on the first-conductive first element isolation unit, and a first-conductive second element isolation unit that is formed on the hollow.Type: ApplicationFiled: March 12, 2010Publication date: February 10, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Seiichi Iwasa, Yoshio Kasai, Takeshi Yousyou, Tsutomu Sato, Atsushi Murakoshi
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Patent number: 7817113Abstract: A method for driving a plasma display panel having at least first electrodes and second electrodes which cause discharge in cells is provided. The method includes applying a first pulse and a second pulse to the second electrode in an address preparation period. The method also includes applying a scan pulse to the second pulse to the second electrode in an address period. The method includes the first pulse having a voltage changing with time in a positive direction and the second pulse having a voltage changing with time in a negative direction and the scan pulse having a negative voltage which is lower than the attained voltage of the second pulse.Type: GrantFiled: March 24, 2009Date of Patent: October 19, 2010Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
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Patent number: 7719487Abstract: A method of driving a gas discharge device for displaying a frame with gradation. A charge producing voltage and a charge adjusting voltage are successively applied in an address preparation period to respective subfields.Type: GrantFiled: July 18, 2005Date of Patent: May 18, 2010Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
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Publication number: 20100065917Abstract: A semiconductor device having a double-gate structure has: a first fin layer; a first epitaxial growth layer formed on a surface of the first fin layer, and constituting a first source/drain diffusion layer, and containing the n-type impurity; a second fin layer; a second epitaxial growth layer formed on a surface of the second fin layer, constituting a second source/drain diffusion layer, and containing the p-type impurity; and a first isolation insulating film formed between the first epitaxial growth layer and the second epitaxial growth layer.Type: ApplicationFiled: September 1, 2009Publication date: March 18, 2010Inventors: Atsushi Ohta, Seiichi Iwasa
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Patent number: 7675484Abstract: A method for driving an AC type surface-discharge display device which has cells arranged in a matrix. Each of the cells has at least three electrodes including a pair of main electrodes on every line of the matrix and an address electrode on every column of the matrix. The method includes providing an address preparation period applying a charge producing pulse and applying a charge adjusting pulse. The charge adjusting pulse has a waveform monotonously falling from a reference potential and a negative polarity and is applied to the second main electrode used as a scan electrode and generates feeble electric discharges between the first and second main electrodes. The feeble electric discharges are accompanied by a decrease of the wall voltage formed by the charge producing pulse.Type: GrantFiled: July 25, 2007Date of Patent: March 9, 2010Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
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Patent number: 7652328Abstract: A semiconductor device includes an isolation region, a semiconductor element region defined by the isolation region, and having a channel forming portion and a recessed portion, the recessed portion being formed between the isolation region and the channel forming portion, and an epitaxial semiconductor portion formed in the recessed portion, wherein the semiconductor element region has a wall portion between the isolation region and the epitaxial semiconductor portion.Type: GrantFiled: February 14, 2007Date of Patent: January 26, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Hiroyuki Yamasaki, Kouji Matsuo, Seiichi Iwasa
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Patent number: RE41817Abstract: When performing the line-sequential addressing for setting the state of each of the cells arranged in rows and columns that constitute a display screen, discharge is generated that has intensity in accordance with display data corresponding to each of all cells belonging to the selected row for each selection of the row. Thus, the priming effect in the following discharge is generated.Type: GrantFiled: February 19, 2009Date of Patent: October 12, 2010Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
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Patent number: RE41832Abstract: When performing the line-sequential addressing for setting the state of each of the cells arranged in rows and columns that constitute a display screen, discharge is generated that has intensity in accordance with display data corresponding to each of all cells belonging to the selected row for each selection of the row. Thus, the priming effect in the following discharge is generated.Type: GrantFiled: February 19, 2009Date of Patent: October 19, 2010Assignee: Hitachi Plasma Patent Licensing Co., LtdInventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
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Patent number: RE41872Abstract: When performing the line-sequential addressing for setting the state of each of the cells arranged in rows and columns that constitute a display screen, discharge is generated that has intensity in accordance with display data corresponding to each of all cells belonging to the selected row for each selection of the row. Thus, the priming effect in the following discharge is generated.Type: GrantFiled: January 20, 2006Date of Patent: October 26, 2010Assignee: Hitachi Plasma Patent Licensing Co., LtdInventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
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Patent number: RE43267Abstract: When performing the line-sequential addressing for setting the state of each of the cells arranged in rows and columns that constitute a display screen, discharge is generated that has intensity in accordance with display data corresponding to each of all cells belonging to the selected row for each selection of the row. Thus, the priming effect in the following discharge is generated.Type: GrantFiled: January 8, 2010Date of Patent: March 27, 2012Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
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Patent number: RE43268Abstract: When performing the line-sequential addressing for setting the state of each of the cells arranged in rows and columns that constitute a display screen, discharge is generated that has intensity in accordance with display data corresponding to each of all cells belonging to the selected row for each selection of the row. Thus, the priming effect in the following discharge is generated.Type: GrantFiled: January 8, 2010Date of Patent: March 27, 2012Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
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Patent number: RE43269Abstract: When performing the line-sequential addressing for setting the state of each of the cells arranged in rows and columns that constitute a display screen, discharge is generated that has intensity in accordance with display data corresponding to each of all cells belonging to the selected row for each selection of the row. Thus, the priming effect in the following discharge is generated.Type: GrantFiled: October 12, 2010Date of Patent: March 27, 2012Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
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Patent number: RE44003Abstract: When performing the line-sequential addressing for setting the state of each of the cells arranged in rows and columns that constitute a display screen, discharge is generated that has intensity in accordance with display data corresponding to each of all cells belonging to the selected row for each selection of the row. Thus, the priming effect in the following discharge is generated.Type: GrantFiled: October 19, 2010Date of Patent: February 19, 2013Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
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Patent number: RE44757Abstract: When performing the line-sequential addressing for setting the state of each of the cells arranged in rows and columns that constitute a display screen, discharge is generated that has intensity in accordance with display data corresponding to each of all cells belonging to the selected row for each selection of the row. Thus, the priming effect in the following discharge is generated.Type: GrantFiled: March 27, 2012Date of Patent: February 11, 2014Assignee: Hitachi Consumer Electronics Co., Ltd.Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
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Patent number: RE45167Abstract: When performing the line-sequential addressing for setting the state of each of the cells arranged in rows and columns that constitute a display screen, discharge is generated that has intensity in accordance with display data corresponding to each of all cells belonging to the selected row for each selection of the row. Thus, the priming effect in the following discharge is generated.Type: GrantFiled: September 14, 2012Date of Patent: September 30, 2014Assignee: Hitachi Consumer Electronics Co., Ltd.Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa