Patents by Inventor Seiichi Iwasa

Seiichi Iwasa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090251444
    Abstract: A method for driving a plasma display panel having at least first electrodes and second electrodes which cause discharge in cells is provided. The method includes applying a first pulse and a second pulse to the second electrode in an address preparation period. The method also includes applying a scan pulse to the second pulse to the second electrode in an address period. The method includes the first pulse having a voltage changing with time in a positive direction and the second pulse having a voltage changing with time in a negative direction and the scan pulse having a negative voltage which is lower than the attained voltage of the second pulse.
    Type: Application
    Filed: March 24, 2009
    Publication date: October 8, 2009
    Applicant: HITACHI PATENT LICENSING CO., LTD
    Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
  • Publication number: 20090166735
    Abstract: The present invention relates to a method of manufacturing a semiconductor device having a shared contact for connection between a source/drain region and a gate electrode. After formation of a gate electrode via a gate insulating film on a semiconductor substrate, a top surface of the substrate is covered with a cover film. After removal of the cover film from at least one of sidewall surface of the gate electrode and a part of the top surface of the substrate adjacent to the sidewall surface, a semiconductor layer is epitaxially grown on a top surface of an exposed substrate to electrically connect the substrate and the at least one sidewall surface of the gate electrode. Then, a source/drain region is formed in a top surface part of the substrate or the semiconductor layer using the gate electrode as a mask.
    Type: Application
    Filed: December 18, 2008
    Publication date: July 2, 2009
    Inventor: Seiichi IWASA
  • Publication number: 20080191974
    Abstract: A method for driving a plasma display panel having at least three electrodes. The method includes applying a first pulse having a voltage changing with time in a positive direction and a second pulse having a voltage changing with time in a negative direction to a second main electrode in an address preparation period. The method also includes applying a scan pulse to the second main electrode in an address period. The method also includes at least one of the first and second pulses in the address preparation period has a stepwise waveform whose voltage rise or fall stepwise.
    Type: Application
    Filed: April 8, 2008
    Publication date: August 14, 2008
    Applicant: HITACHI PATENT LICENSING CO., LTD.
    Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
  • Publication number: 20070262926
    Abstract: A method for driving an AC type surface-discharge display device having cells arranged in a matrix. Each cell has at least three electrodes including a pair of main electrodes and on every line of the matrix and an address electrode on every column of the matrix. The method includes conducting an address preparation period including applying a first charge adjusting voltage, monotonously rising or falling, to a gap between the main electrodes. The method also includes applying a charge adjusting voltage, monotonously rising or falling, to a gap between a scan electrode and the address electrode.
    Type: Application
    Filed: July 25, 2007
    Publication date: November 15, 2007
    Applicant: HITACHI PATENT LICENSING CO., LTD.
    Inventors: Yasunobu HASHIMOTO, Yasushi YONEDA, Kenji AWAMOTO, Seiichi IWASA
  • Publication number: 20070262925
    Abstract: A method for driving an AC type surface-discharge display device which has cells arranged in a matrix. Each of the cells has at least three electrodes including a pair of main electrodes on every line of the matrix and an address electrode on every column of the matrix. The method includes providing an address preparation period applying a charge producing pulse and applying a charge adjusting pulse. The charge adjusting pulse has a waveform monotonously falling from a reference potential and a negative polarity and is applied to the second main electrode used as a scan electrode and generates feeble electric discharges between the first and second main electrodes. The feeble electric discharges are accompanied by a decrease of the wall voltage formed by the charge producing pulse.
    Type: Application
    Filed: July 25, 2007
    Publication date: November 15, 2007
    Applicant: HITACHI PATENT LICENSING CO., LTD.
    Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
  • Publication number: 20070200170
    Abstract: A semiconductor device includes an isolation region, a semiconductor element region defined by the isolation region, and having a channel forming portion and a recessed portion, the recessed portion being formed between the isolation region and the channel forming portion, and an epitaxial semiconductor portion formed in the recessed portion, wherein the semiconductor element region has a wall portion between the isolation region and the epitaxial semiconductor portion.
    Type: Application
    Filed: February 14, 2007
    Publication date: August 30, 2007
    Inventors: Hiroyuki Yamasaki, Kouji Matsuo, Seiichi Iwasa
  • Publication number: 20060086959
    Abstract: There is provided a semiconductor device including a semiconductor substrate which has an element region in which a diffusion layer for a source or a drain is formed, and a trench for a capacitor, a capacitor dielectric film which is formed on inner surfaces of the trench, a storage electrode which is formed in the trench provide with the capacitor dielectric film, and which has an upper surface lying at a level higher than an upper surface of the diffusion layer, and a conductive connecting part which connects the storage electrode to the diffusion layer and contacts the upper surfaces of the storage electrode and diffusion layer.
    Type: Application
    Filed: October 25, 2005
    Publication date: April 27, 2006
    Inventor: Seiichi Iwasa
  • Patent number: 7023405
    Abstract: A plasma display device having display electrode pairs and providing improved luminance and light emission efficiency of display discharges with reduced variations of the luminance and light emission efficiency thereof resulting from variations of a display load. A discharge is generated by applying an offset drive voltage that is higher than a sustain voltage applied to the display electrode pair, and applying the sustain voltage for a constant period after dropping the applied voltage from an offset drive voltage to the sustain voltage after generating the display discharge. The drive output state is set to a low impedance state at least during a time period from the start of applying the offset drive voltage until the applied voltage drops to the sustain voltage.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: April 4, 2006
    Assignee: Fujitsu Limited
    Inventors: Kenji Awamoto, Seiichi Iwasa
  • Patent number: 6982685
    Abstract: A method for driving a gas electric discharge device which has a first electrode and a second electrode and is constructed such that a wall voltage is capable of being produced between the first and second electrodes. The method includes applying a voltage monotonously rising from a first set value to a second set value, between the first and second electrodes, thereby to generate a plurality of gas electric discharges so as to decrease the wall voltage for charge adjustment during the voltage rise.
    Type: Grant
    Filed: July 5, 2002
    Date of Patent: January 3, 2006
    Assignee: Fujitsu Limited
    Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
  • Publication number: 20050248509
    Abstract: A method for driving a gas electric discharge device which has a first electrode and a second electrode and is constructed such that a wall voltage is capable of being produced between the first and second electrodes. The method includes applying a voltage monotonously rising from a first set value to a second set value, between the first and second electrodes, thereby to generate a plurality of gas electric discharges so as to decrease the wall voltage for charge adjustment during the voltage rise.
    Type: Application
    Filed: July 18, 2005
    Publication date: November 10, 2005
    Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
  • Patent number: 6937213
    Abstract: A method and device for driving a plasma display panel is provided in which a drop of an increasing voltage rate due to discharge is prevented, and a reset period is shortened. In driving a plasma display panel by applying an increasing voltage to cells of a display screen during a reset period for equalizing charge of the cells, an increasing voltage signal is supplied to an impedance conversion circuit in which an output impedance is lower than an input impedance, and the output signal of the impedance conversion circuit is supplied to the cells.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: August 30, 2005
    Assignee: Fujitsu Limited
    Inventors: Seiichi Iwasa, Kenji Awamoto
  • Patent number: 6680718
    Abstract: When performing the line-sequential addressing for setting the state of each of the cells arranged in rows and columns that constitute a display screen, discharge is generated that has intensity in accordance with display data corresponding to each of all cells belonging to the selected row for each selection of the row. Thus, the priming effect in the following discharge is generated.
    Type: Grant
    Filed: October 27, 1999
    Date of Patent: January 20, 2004
    Assignee: Fujitsu Limited
    Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
  • Publication number: 20040001035
    Abstract: A method and a device for driving a plasma display panel is provided in which luminance and light emission efficiency in display discharge is improved, and a variation of the luminance and the light emission efficiency due to a variation of a display load is reduced. The driving step of one pulse for generating display discharge one time includes the steps of generating display discharge by applying an offset drive voltage Vso that is higher than the sustain voltage Vs to the display electrode pair, and applying the sustain voltage Vs for a constant period after dropping the applied voltage from the offset drive voltage Vso to the sustain voltage Vs after generating the display discharge. The drive output state is set to the low impedance state at least during the period T1 from the application start of the offset drive voltage until the applied voltage drops to the sustain voltage.
    Type: Application
    Filed: June 12, 2003
    Publication date: January 1, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Kenji Awamoto, Seiichi Iwasa
  • Publication number: 20020186186
    Abstract: When performing the line-sequential addressing for setting the state of each of the cells arranged in rows and columns that constitute a display screen, discharge is generated that has intensity in accordance with display data corresponding to each of all cells belonging to the selected row for each selection of the row. Thus, the priming effect in the following discharge is generated.
    Type: Application
    Filed: October 27, 1999
    Publication date: December 12, 2002
    Applicant: Fujitsu Limited
    Inventors: Yasunobu HASHIMOTO , Yasushi YONEDA , Kenji AWAMOTO , Seiichi IWASA
  • Publication number: 20020167468
    Abstract: A method for driving a gas electric discharge device which has a first electrode and a second electrode and is constructed such that a wall voltage is capable of being produced between the first and second electrodes. The method includes applying a voltage monotonously rising from a first set value to a second set value, between the first and second electrodes, thereby to generate a plurality of gas electric discharges so as to decrease the wall voltage for charge adjustment during the voltage rise.
    Type: Application
    Filed: July 5, 2002
    Publication date: November 14, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
  • Patent number: 6456263
    Abstract: A method for driving a gas electric discharge device which has a first electrode and a second electrode and is constructed such that a wall voltage is capable of being produced between the first and second electrodes. The method includes applying a voltage monotonously rising from a first set value to a second set value, between the first and second electrodes, thereby to generate a plurality of gas electric discharges so as to decrease the wall voltage for charge adjustment during the voltage rise.
    Type: Grant
    Filed: January 5, 1999
    Date of Patent: September 24, 2002
    Assignee: Fujitsu Limited
    Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
  • Publication number: 20020122016
    Abstract: A method and device for driving a plasma display panel is provided in which a drop of an increasing voltage rate due to discharge is prevented, and a reset period is shortened. In driving a plasma display panel by applying an increasing voltage to cells of a display screen during a reset period for equalizing charge of the cells, an increasing voltage signal is supplied to an impedance conversion circuit in which an output impedance is lower than an input impedance, and the output signal of the impedance conversion circuit is supplied to the cells.
    Type: Application
    Filed: December 28, 2001
    Publication date: September 5, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Seiichi Iwasa, Kenji Awamoto
  • Patent number: 6103979
    Abstract: A keyboard includes a plurality of keys, wherein each key has an elongated shape elongated in a first direction and selectively establishes two different electrical contacts as a result of being pressed appropriately. The plurality of keys are aligned along a second direction different from the first direction. A length in the first direction of each key is longer than a width in the second direction of the key and shorter than twice the width and carries two different key letters present on a front surface thereof at respective ends of the key. Each key establishes one electric contact if a first end of the key is pressed and establishes another electric contact if a second end of the key is pressed. The front surface of each key is parallelogram-shaped and the plurality of keys are arranged so that the key letters present on the keys are arranged in a standard arrangement.
    Type: Grant
    Filed: March 10, 1997
    Date of Patent: August 15, 2000
    Assignee: Fujitsu Limited
    Inventors: Hideyuki Motoyama, Seiichi Iwasa, Goro Watanabe
  • Patent number: 5977938
    Abstract: A visible light corresponding to an input key is generated from a visible light generating unit as a display source, thereby allowing an aerial image as a mirage of an input operating unit to appear by an aerial image forming unit using a pair of parabola mirrors or the like. When touching the aerial image by a finger, its reflected light is detected by a photodetecting unit. A controller discriminates an operating position from a driving timing of the visible light generating unit and outputs a switch signal to the outside.
    Type: Grant
    Filed: October 23, 1996
    Date of Patent: November 2, 1999
    Assignee: Fujitsu Limited
    Inventor: Seiichi Iwasa
  • Patent number: 5818357
    Abstract: A chair having keyboard halves arranged in the armrests. The keys in the keyboard halves can be operated by left and right hands, respectively. The keyboard provided in the chair can be used as a supplemental keyboard in a keyboard system comprising a main keyboard for inputting data to an information processing apparatus. The main keyboard has full keys and the supplemental keyboard has keys identical to at least a part of the keys of the main keyboard for inputting data to the information processing apparatus parallel to the main keyboard. An operator can alternatively use the main and the supplemental keyboard depending on body position.
    Type: Grant
    Filed: October 9, 1992
    Date of Patent: October 6, 1998
    Assignee: Fujitsu Limited
    Inventors: Hideyuki Motoyama, Seiichi Iwasa