Patents by Inventor Seiichi Kawano

Seiichi Kawano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030229768
    Abstract: A process, apparatus, and system are disclosed that allow information to be passed between software modules in different partitions in an environment for a predetermined operating system (OS) and an area hidden from the operating system (OS) in a storage device, such as hard disk drive (HDD). The computer system may include a hard disk drive (HDD) that meets a protected area run time interface extension services (PARTIES) specification and that has an access environment for an operating system (OS) and a PARTIES partition. The PARTIES partition is an area hidden from the operating system (OS). The computers system also includes a CMOS/NVRAM that provides a work area for communication between a user mode module, operating in the access environment for the operating system (OS) in a user data management application, and a management mode module, operating in an environment corresponding to the hidden area.
    Type: Application
    Filed: June 4, 2003
    Publication date: December 11, 2003
    Inventors: Seiichi Kawano, Ken Sasaki, Mikio Hagiwara, Kishiko Itoh
  • Publication number: 20030169239
    Abstract: A touch panel that improves operability for users is provided. The touch panel monitors and calibrates operation positions made by a user on a display screen is provided, including a mark display part that displays marks indicating operation target positions on the display screen such that the densities of the marks in the main scanning line direction or sub-scanning line direction are different in response to positions of the directions; an operation position reader part that reads operation positions on the touch panel by the user; a relative position acquisition part that obtains relative positions of the operation positions from the mark made by the user relative to a display position of the mark; and a calibration part that calibrates the position of a new operation by the user different from an operation applied to the mark based on the relative positions.
    Type: Application
    Filed: March 4, 2003
    Publication date: September 11, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Masayoshi Nakano, Seiichi Kawano
  • Publication number: 20030154291
    Abstract: A modular computer system includes a core unit comprising a processor and a memory; a removable modular accessory; a docking connector for connecting the accessory to the core unit; and one or more subsystems contained within the accessory. The system is partitioned such that any of the cooling, power or input/output subsystems can be disposed within the modular accessory such that these subsystems can be removed from the system by removing the accessory. The core unit by itself is not useful to a user because it lacks power, cooling, or a user interface. The core unit can be connected into any of a variety of accessories and it adapts its functions to the system resources provided by each type of accessory.
    Type: Application
    Filed: December 18, 2002
    Publication date: August 14, 2003
    Applicant: International Business Machines Corporation
    Inventors: Kenneth Blair Ocheltree, Masato Anzai, Nicholas R. Dono, Akira Hino, Toshitaka Imai, Seiichi Kawano, Shinsuke Noda, Ernest Nelson Mandese, Toshitsugu Mito, James Randal Moulic, Robert K. Montoye, Robert Stephen Olyha, Ronald Alan Smith, Hiromi Tanaka, Kazuhiko Yamazaki, Yoshihisa Sueta, Masatoshi Ishii
  • Publication number: 20030140264
    Abstract: The present invention lowers the performance, and therefore power consumption, of a Central Processing Unit (CPU) to reduce the power consumption when the CPU encounters waiting time due to certain device-related conditions or in the course of execution of a program, thereby reducing power consumption and heat generation in an entire system. Instruction codes to be executed by a CPU and information about a performance for executing the instruction codes are loaded in the CPU and the performance of the CPU is dynamically set at a value determined based on the information about the loaded information about the performance. Thus, the CPU executes the instruction codes at the set performance.
    Type: Application
    Filed: December 24, 2002
    Publication date: July 24, 2003
    Applicant: International Business Machines Corporation
    Inventors: Seiichi Kawano, Hirohide Komiyama, Shinji Matsushima, Noritoshi Yoshiyama
  • Publication number: 20030110331
    Abstract: A computer system which includes a CPU for performing various processes by program control and storage elements which store at least one operating system and a BIOS, wherein upon starting a system, the CPU recognizes the system's own hardware configuration, and starts a selected one operating system stored in the storage elements in accordance with the recognized hardware configuration under the control of the BIOS.
    Type: Application
    Filed: November 26, 2002
    Publication date: June 12, 2003
    Applicant: International Business Machines Corporation;
    Inventors: Seiichi Kawano, Kenneth Blair Ocheltree, Robert Stephen Olyha
  • Publication number: 20030098871
    Abstract: Units are provided for determining whether or not a coordinate input is continued as being substantially the same coordinate and a predetermined time period has lapsed after an initial input of an arbitrary coordinate by a coordinate input unit. A first processing unit performs a first processing in accordance with the coordinate when the determination is not met, and a second processing unit performs a second processing different from the first processing when the determination is met.
    Type: Application
    Filed: November 20, 2002
    Publication date: May 29, 2003
    Applicant: International Business Machines Corporation
    Inventors: Seiichi Kawano, Masayoshi Nakano, Yuhko Ohmori
  • Publication number: 20030095112
    Abstract: An apparatus, program product and method of detecting, within a predetermined time period after an input of a first coordinate, an input of a second coordinate being apart a predetermined distance or more from a first coordinate, or detecting, within a predetermined time period after an input of the first coordinate, an input of the second coordinate being apart a predetermined distance or more from the first coordinate and the following input of a third coordinate near the first coordinate, whereby a first processing in accordance with the first coordinate or a second processing in accordance with the first coordinate is performed depending on the detected result.
    Type: Application
    Filed: November 20, 2002
    Publication date: May 22, 2003
    Applicant: International Business Machines Corporation
    Inventors: Seiichi Kawano, Masayoshi Nakano, Yuhko Ohmori
  • Publication number: 20020152408
    Abstract: A computer system apparatus and method therefor are described which are appropriately power-controllable corresponding to each usage-situation. The computer system includes a PC main body and a digitizer wherein the usage-situation of the system is detected. If one of the predetermined usage-situations, such that the digitizer is mainly employed, is adopted, a target power saving mode is determined corresponding to installation or non-installation of an AC adapter, remaining amount of a DC battery, data upload frequency from the digitizer, and other conditions. In addition, in the case that the PC main body is in a power saving mode, the PC main body returns to the normal mode if data upload from the digitizer is requested. After completing the upload, the main body returns to an appropriate power saving mode.
    Type: Application
    Filed: March 20, 2002
    Publication date: October 17, 2002
    Applicant: International Business Machines Corporation
    Inventors: Takashi Inui, Noritoshi Yoshiyama, Seiichi Kawano
  • Publication number: 20020054120
    Abstract: A computer system requiring input of a password on startup has an on-screen keyboard generation division 20 for displaying an on-screen keyboard 210 having a predetermined key layout on a touch panel 200, a keyboard type determination division 10 for determining the key layout of the on-screen keyboard 210 displayed on this touch panel 200, and a password checking division 40 for processing a password inputted by pointing to the on-screen keyboard 210 displayed on this touch panel 200.
    Type: Application
    Filed: June 1, 2001
    Publication date: May 9, 2002
    Applicant: International Business Machines Corporation
    Inventors: Seiichi Kawano, Yuhko Ohmori, Takayuki Akai, Hidetoshi Mori
  • Publication number: 20020047590
    Abstract: An apparatus and method for enabling screen brightness of a display unit to be adjusted automatically according to display brightness, thereby improving the visibility of the display screen to a viewing user. A brightness adjusting system including a gray scale gradation evaluator 20 for calculating the display brightness in a certain window displayed on the screen of a display unit and a display controller 30 for controlling the screen brightness of the display unit according to the display brightness in the certain window, calculated by the gray scale gradation evaluator 20, is provided for.
    Type: Application
    Filed: August 23, 2001
    Publication date: April 25, 2002
    Applicant: International Business Machines Corporation
    Inventor: Seiichi Kawano
  • Publication number: 20010020268
    Abstract: The method for controlling a computer that notifies an operating system of a request event corresponding to a device event from hardware. A device event may be generated, for example by a user operating a keyboard or mouse connected to the computer. That is, the device event occurs when a certain event is provided to the hardware of the computer. A request event causes a process corresponding to the device event to be performed under the control of an operating system. Then a response event from the operating system caused by the notification of the request event is accepted and a process event corresponding to the accepted response event is output to the hardware.
    Type: Application
    Filed: January 26, 2001
    Publication date: September 6, 2001
    Applicant: International Business Machines Corporation
    Inventors: Seiichi Kawano, Takashi Inui
  • Publication number: 20010016905
    Abstract: An expansion unit control method for use with an expansion control unit containing at least one device, includes allocating a predetermined input/output (I/O) resource, ensured not to be used in processing, to the at least one device as an I/O resource used for sending and receiving information, performing a predetermined process for the at least one device by sending and receiving information to and from the at least one device through the predetermined I/O resource, and deallocating the predetermined I/O resource allocated to the at least one device.
    Type: Application
    Filed: February 13, 2001
    Publication date: August 23, 2001
    Inventors: Eitaroh Kasamatsu, Seiichi Kawano
  • Patent number: 6000035
    Abstract: An information processing system that can reduce the operating frequency of a CPU, or halt the operation of the CPU, at an adequate timing, even when the system is engaged in exchanging data with another independent apparatus (e.g., another PC) via a communication port (a serial port or a parallel port), or when a communication application is being executed.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: December 7, 1999
    Assignee: International Business Machines Corporation
    Inventors: Shinji Matsushima, Seiichi Kawano, Masayoshi Nakano, Takashi Inui
  • Patent number: 5875120
    Abstract: An information processing system which has (a) a CPU that is operated in a normal mode during which the CPU is driven at a relatively fast operating clock rate, and a power saving mode during which the operating clock has a lower rate or is halted; (b) at least one peripheral device; (c) a bus for performing communication between the CPU and the peripheral device; (d) a termination detector detecting a completion of a predetermined transaction between the CPU and the peripheral device; (e) a time counter measuring a predetermined period of time after the completion of the predetermined transaction; and (f) a power saving control causing the CPU enter the power saving mode until the time counted by the time counting means reaches the predetermined period of time.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: February 23, 1999
    Assignee: International Business Machines Corporation
    Inventors: Shinji Matsushima, Seiichi Kawano, Masayoshi Nakano, Takashi Inui
  • Patent number: 5822597
    Abstract: A information processing system which enters power management mode when a predetermined time has elapsed since a last user input (or a last processing operation), adjusts the predetermined time according to the action of the operator in response to entering the power mode. If the user transfers back to normal mode quickly the predetermined reference time is increased. If the user responds only after a delay period the predetermined reference time is decreased. By so adjusting the predetermined time a better balance is achieved between energy saving and user convenience for a current level of operator attention to the computer.
    Type: Grant
    Filed: May 23, 1996
    Date of Patent: October 13, 1998
    Assignee: International Business Machines Corp.
    Inventors: Seiichi Kawano, Kohsuke Ohtani, Tomoki Maruichi, Yasunori Maezawa, Takashi Oshiyama
  • Patent number: 5404471
    Abstract: A data processing system has a microprocessor that is operable in real and protected address generation modes. Transition from the real mode to the protected mode is done by initializing system tables and pointer registers, switching from the real mode to the protected mode, and flushing a prefetch queue before executing further instructions in the protected mode. The transition also includes flushing instructions from the prefetch queue, immediately after the initializing, and executing at least one instruction while prefetching additional instructions that are executed to complete the transition.
    Type: Grant
    Filed: February 8, 1993
    Date of Patent: April 4, 1995
    Assignee: International Business Machines Corp.
    Inventors: Seiichi Kawano, Hirohide Komiyama, Shuichi Mukohyama