Patents by Inventor Seiichi Nakatani

Seiichi Nakatani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020020897
    Abstract: By providing an end portion of a radiation plate located on and near an end portion of an insulator sheet , to which a lead frame extends, at a position away from the end portion of the insulator sheet inside of the insulator sheet in a plane direction of the insulator sheet , it is possible to secure a creeping distance between the lead frame and the radiation plate without decreasing a lead frame area on which components can be actually mounted.
    Type: Application
    Filed: June 1, 2001
    Publication date: February 21, 2002
    Inventors: Yoshihisa Yamashita, Koichi Hirano, Seiichi Nakatani, Mitsuhiro Matsuo
  • Patent number: 6338767
    Abstract: A circuit component built-in module of the present invention includes an insulating substrate formed of a mixture comprising 70 wt % to 95 wt % of an inorganic filler and a thermosetting resin, a plurality of wiring patterns formed on at least a principal plane of the insulating substrate, a circuit component arranged in an internal portion of the insulating substrate and electrically connected to the wiring patterns, and an inner via formed in the insulating substrate for electrically connecting the plurality of wiring patterns. Thus, a highly reliable circuit component built-in module having high-density circuit components can be obtained.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: January 15, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiichi Nakatani, Kouichi Hirano
  • Patent number: 6329045
    Abstract: A composition for substrate materials according to the present invention includes 70-95 wt. % of inorganic powder and 5-30 wt. % of thermosetting resin composition and is in a finely crushed condition. The composition for substrate materials is prepared, for example, by crushing into fine pieces and mixing the inorganic powder and the thermosetting resin composition. A heat conductive substrate is provided with an insulator body formed by heating and pressurizing said composition for substrate materials and a wiring pattern is provided in such a condition that it is exposed on the surface of the insulator body. A process for manufacturing the heat conductive substrate comprises forming said composition for substrate materials into the insulator body by casting the above mentioned composition for substrate materials into a metal mold to be heated and pressurized so that said thermosetting resin is cured.
    Type: Grant
    Filed: February 17, 2000
    Date of Patent: December 11, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichi Hirano, Seiichi Nakatani, Hiroyuki Handa
  • Patent number: 6326694
    Abstract: A printed circuit board includes an uncured substrate material with closed voids which are disposed with a through-hole. When the through-hole is formed, voids which exist in the substrate material open from inner wall of the through-hole to form a hollow-shaped part. By filling the through-hole and the hollow-shaped part with conductive paste, the adhesion improves by the increased holding effect between the conductive paste and the wall surface of the through-hole.
    Type: Grant
    Filed: June 21, 1999
    Date of Patent: December 4, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihito Hatakeyama, Seiichi Nakatani, Kouji Kawakita, Hiroshi Sogou, Tatsuo Ogawa, Tamao Kojima
  • Publication number: 20010036065
    Abstract: A sheet-like thermally conductive resin composition containing 70 to 95 wt. % inorganic filler and 5 to 30 wt. % thermosetting resin composition, a lead frame as a wiring pattern, and an electrically conductive heat sink with a metal pole placed therein are superposed, heated and compressed, and thus are combined to form one body. Consequently, a thermally conductive circuit board with a flat surface is obtained in which a grounding pattern is grounded to the heat sink inside the insulating layer. Thus, the grounding pattern and the heat sink can be connected electrically with each other in an arbitrary position inside the insulating layer of the thermally conductive circuit board. Accordingly, there are provided a thermally conductive circuit board with high heat dissipation, high conductivity and high ground-connection reliability, a method of manufacturing the same, and a power module allowing its size to be reduced and its density to be increased.
    Type: Application
    Filed: April 13, 2001
    Publication date: November 1, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichi Hirano, Seiichi Nakatani, Mitsuhiro Matsuo, Yoshihisa Yamashita
  • Publication number: 20010030059
    Abstract: A circuit component built-in module capable of mounting the circuit component with high density and having high heat releasing property and the high reliability. The circuit component built-in module 100 includes the insulating substrate 101 made of a first mixture 105 and a second mixture 106, wiring patterns 102a and 102b formed on one principal surface and another principal surface of the insulating substrate 101, a circuit component 103a electrically connected to the wiring pattern 102a and sealed with the second mixture 106 in an internal portion of the insulating substrate 101, the inner via conductor 104 electrically connecting the wiring pattern 102a and 102b.
    Type: Application
    Filed: December 15, 2000
    Publication date: October 18, 2001
    Inventors: Yasuhiro Sugaya, Koichi Hirano, Seiichi Nakatani, Yasuyuki Matsuoka, Satoru Yuuhaku, Toshiyuki Asahi
  • Patent number: 6300686
    Abstract: A thermal conductive sheet including at least 70-95 weight parts of inorganic filler and 5-30 weight parts of thermosetting resin composition and having flexibility in an uncured state is prepared. Through-holes are formed in the thermal conductive sheet and a conductive resin composition is filled in the through-holes. The thermal conductive sheet and a semiconductor chip are overlapped to match positions of the through-holes formed in the thermal conductive sheet with those of the electrodes formed on the semiconductor chip. The thermal conductive sheet and the semiconductor chip are compressed while being heated and the thermal conductive sheet is cured and integrated with the semiconductor chip. An external lead electrode is formed on the thermal conductive sheet at a side opposite to the surface where the semiconductor chip is overlapped, and that is connected with the conductive resin composition.
    Type: Grant
    Filed: September 22, 1998
    Date of Patent: October 9, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichi Hirano, Seiichi Nakatani
  • Publication number: 20010026863
    Abstract: A composition for substrate materials according to the present invention includes 70 - 95 wt. % of inorganic powder and 5 - 30 wt. % of thermosetting resin composition and is in a finely crushed condition. The composition for substrate materials is prepared, for example, by crushing into fine pieces and mixing the inorganic powder and the thermosetting resin composition. A heat conductive substrate is provided with an insulator body formed by heating and pressurizing said composition for substrate materials and a wiring pattern is provided in such a condition that it is exposed on the surface of the insulator body. A process for manufacturing the heat conductive substrate comprises forming said composition for substrate materials into the insulator body by casting the above mentioned composition for substrate materials into a metal mold to be heated and pressurized so that said thermosetting resin is cured.
    Type: Application
    Filed: January 18, 2001
    Publication date: October 4, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichi Hirano, Seiichi Nakatani, Hiroyuki Handa
  • Publication number: 20010023779
    Abstract: A transfer material capable of transferring a fine wiring pattern to a substrate reliably and easily. The transfer material includes at least three layers of a first metal layer as a carrier, a second metal layer that is transferred to the substrate as a wiring pattern, and a peel layer adhering the first and second metal layers releasably. On the surface portion of the first metal layer, a concave and convex portion corresponding to the wiring pattern is formed, and the peel layer and the second metal layer are formed on a region of the convex portions.
    Type: Application
    Filed: February 7, 2001
    Publication date: September 27, 2001
    Inventors: Yasuhiro Sugaya, Shingo Komatsu, Koichi Hirano, Seiichi Nakatani, Yasuyuki Matsuoka, Toshiyuki Asahi, Yoshihisa Yamashita
  • Publication number: 20010003610
    Abstract: A connecting member of circuit substrates includes an organic porous base material provided with tackfree films on both sides, through-holes disposed at requested places which are filled with conductive resin compound up to the surface of the tackfree films. This structure enables inner-via-hole connection and can therefore attain a connecting member of circuit substrates and an electrical connector of high reliability and high quality.
    Type: Application
    Filed: January 26, 2001
    Publication date: June 14, 2001
    Inventors: Seiichi Nakatani, Akihito Hatakeyama, Kouji Kawakita, Hiroshi Sogou, Tatsuo Ogawa, Tamao Kojima
  • Publication number: 20010002294
    Abstract: A printed circuit board includes an uncured substrate material with closed voids which are disposed with a through-hole. When the through-hole is formed, voids which exist in the substrate material open from inner wall of the through-hole to form a hollow-shaped part. By filling the through-hole and the hollow-shaped part with conductive paste, the adhesion improves by the increased holding effect between the conductive paste and the wall surface of the through-hole.
    Type: Application
    Filed: December 21, 2000
    Publication date: May 31, 2001
    Inventors: Akihito Hatakeyama, Seiichi Nakatani, Kouji Kawakita, Hiroshi Sogou, Tatsuo Ogawa, Tamao Kojima
  • Patent number: 6211487
    Abstract: A printed circuit board includes an uncured substrate material with closed voids which are disposed with a through-hole. When the through-hole is formed, voids which exist in the substrate material open from inner wall of the through-hole to form a hollow-shaped part. By filling the through-hole and the hollow-shaped part with conductive paste, the adhesion improves by the increased holding effect between the conductive paste and the wall surface of the through-hole.
    Type: Grant
    Filed: August 23, 1999
    Date of Patent: April 3, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihito Hatakeyama, Seiichi Nakatani, Kouji Kawakita, Hiroshi Sogou, Tatsuo Ogawa, Tamao Kojima
  • Patent number: 6205657
    Abstract: A printed circuit board includes insulating layers formed by impregnating a base material with a resin and a metal foil pattern formed on a desired layer of the insulating layers. Ions for forming a hardly soluble metal salt by combining with metal ions free from a portion of the board or a sulfur-containing compound for reacting with the metal ion are present in the insulating layer or on a surface of the metal foil pattern. Furthermore, a method for producing the printed circuit board includes any one of the steps of adding the ions or the sulfur-containing compound to the resin varnish, impregnating a base material with the solution of the ions or the sulfur-containing compound, or applying the solution onto the surface of the metal foil pattern, in order to allow the ions or the sulfur-containing compound to exist in the printed circuit board.
    Type: Grant
    Filed: October 28, 1997
    Date of Patent: March 27, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihiro Kawakita, Seiichi Nakatani, Masakazu Tanahashi
  • Patent number: 6174589
    Abstract: A printed circuit board includes insulating layers formed by impregnating a base material with a resin and a metal foil pattern formed on a desired layer of the insulating layers. Ions for forming a hardly soluble metal salt by combining with metal ions free from a portion of the board or a sulfur-containing compound for reacting with the metal ion are present in the insulating layer or on a surface of the metal foil pattern. Furthermore, a method for producing the printed circuit board includes any one of the steps of adding the ions or the sulfur-containing compound to the resin varnish, impregnating a base material with the solution of the ions or the sulfur-containing compound, or applying the solution onto the surface of the metal foil pattern, in order to allow the ions or the sulfur-containing compound to exist in the printed circuit board.
    Type: Grant
    Filed: September 23, 1998
    Date of Patent: January 16, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihiro Kawakita, Seiichi Nakatani, Masakazu Tanahashi
  • Patent number: 6108903
    Abstract: A connecting member of circuit substrates includes an organic porous base material provided with tackfree films on both sides, through-holes disposed at requested places which are filled with conductive resin compound up to the surface of the tackfree films. This structure enables inner-via-hole connection and can therefore attain a connecting member of circuit substrates and an electrical connector of high reliability and high quality. By using a connecting member of circuit substrates including the organic porous base material provided with tackfree films on both sides and through-holes disposed at requested places which are filled with conductive resin compound up to the surface of the tackfree films, it is possible to form a high-multilayer substrate easily from double sided boards or four-layer substrates which can be manufactured rather stably.
    Type: Grant
    Filed: January 4, 1996
    Date of Patent: August 29, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiichi Nakatani, Akihito Hatakeyama, Kouji Kawakita, Hiroshi Sogou, Tatsuo Ogawa, Tamao Kojima
  • Patent number: 6096411
    Abstract: The invention related to a paste for via hole filling which enables inner via hole connection between electrode layers without employing through hole plating techniques, and a multi-layered printed circuit board using the same. The conductive paste composition of the invention comprises a) 70-90 wt % of copper particles of an average particle size of 0.5-8 .mu.m; b) 0.5-15 wt % of insulating particles of an average particle size of 8-20 .mu.m; and, c) 6-17 wt % of heat setting type liquid epoxy resin, in order to exhibit low viscosity and low volatility. The conductive paste is printed and filled into through holes passing through a laminated substrate which is provide with copper foils on both sides thereof, to form a printed circuit board in which the via holes are electrically connected after thermosetting.
    Type: Grant
    Filed: March 12, 1998
    Date of Patent: August 1, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiichi Nakatani, Kouji Kawakita, Tatsuo Ogawa
  • Patent number: 6060150
    Abstract: A thermally conductive substrate having a structure in which inorganic filler for improving the thermal conductivity and thermosetting resin composition are included. The thermosetting resin composition has a flexibility in the not-hardened state, and becomes rigid after hardening. The thermally conductive substrate has excellent thermal radiation characteristics. The method of manufacturing the thermally conductive substrate includes: piling up (a) the thermally conductive sheets comprising 70 to 95 weight parts of an inorganic filler, and 4.
    Type: Grant
    Filed: October 6, 1997
    Date of Patent: May 9, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiichi Nakatani, Hiroyuki Handa
  • Patent number: 6045897
    Abstract: A nonwoven fabric cloth substrate for printed wiring boards containing aromatic polyamide fibers and having a 0.7-1.0 dynamic elastic modulus ratio (E' (250.degree. C.)/E' (30.degree. C.)) and a 0.05 or less loss tangent (Tan .delta.) peak value at 30-250.degree. C., and a prepreg and a printed wiring board using the nonwoven fabric cloth substrate.
    Type: Grant
    Filed: October 26, 1998
    Date of Patent: April 4, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Sakai, Hideo Hatanaka, Masahide Tsukamoto, Seiichi Nakatani, Masayuki Okano, Tamao Kojima
  • Patent number: 6038133
    Abstract: A circuit component built-in module of the present invention includes an insulating substrate formed of a mixture comprising 70 wt % to 95 wt % of an inorganic filler and a thermosetting resin, a plurality of wiring patterns formed on at least a principal plane of the insulating substrate, a circuit component arranged in an internal portion of the insulating substrate and electrically connected to the wiring patterns, and an inner via formed in the insulating substrate for electrically connecting the plurality of wiring patterns. Thus, a highly reliable circuit component built-in module having high-density circuit components can be obtained.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: March 14, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiichi Nakatani, Kouichi Hirano
  • Patent number: 5977490
    Abstract: A conductive paste compound for via hole filling includes a conductive filler at 80 to 92 weight percent with an average particle size of from 0.5 to 20 .mu.m and specific surface of from 0.1 to 1.5 m.sup.2 /g, a liquid epoxy resin at 4.5 to 20 weight percent containing 2 or more epoxy groups with room temperature viscosity of 15 Pa.sec or less, and a hardener at 0.5 to 5 weight percent, wherein the viscosity is 2,000 Pa.sec or less and the volatile amount is 2.0 weight percent or less. A filling paste and a printed circuit board with use thereof are provided which can conduct an inner-via-hole connection between electrode layers without using a through-hole plating technique.The conductive paste comprises a metallic particle such as copper, an epoxy resin, a hardener, and if necessary, a dispersant. The paste having low viscosity and low volatility under high shear is used to fill holes disposed in a laminated substrate.
    Type: Grant
    Filed: January 8, 1997
    Date of Patent: November 2, 1999
    Assignees: Matsushita Electric Industrial Co., Ltd., Dai-Ichi Kogyo Seiyaku Co. Ltd., Dowa Mining Co., Ltd.
    Inventors: Kouji Kawakita, Seiichi Nakatani, Tatsuo Ogawa, Masatoshi Suehiro, Kouichi Iwaisako, Hideo Akiyama