Patents by Inventor Seiichi Nishiyama

Seiichi Nishiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7061465
    Abstract: There is provided a liquid crystal display device having a longer useful life and in which its so-called picture frame area can be narrowed. The liquid crystal display device includes a liquid crystal display panel having a display part in its central portion and a backlight disposed on a back side of the liquid crystal display panel. The backlight includes a discharge tube having electrodes at least at its opposite ends, and the electrodes are disposed at the exterior of the discharge tube. The opposite end portions of the discharge tube where the respective electrodes are disposed are positioned to be superposed on the periphery of the liquid crystal display panel and are bent with an angle with respect to the central axis of the discharge tube.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: June 13, 2006
    Assignees: Hitachi, Ltd., Hitachi Electronics Devices Co., Ltd.
    Inventors: Toshihiro Yajima, Seiichi Nishiyama, Shigetake Takaku, Shoichi Noguchi, Yoshiharu Takeda
  • Publication number: 20060077659
    Abstract: A liquid crystal display includes a liquid crystal display panel which has first and second drain lines groups, a control circuit board which has a control unit, a first and second drain drivers groups connected to the corresponding first and second drain lines groups, a back light unit, a metal frame, and a shield member which shields against EMI. Both of the first and second drain drivers groups are arranged at a same peripheral side of the liquid crystal display panel. The control unit supplies first and second signals to the drain drivers groups via flexible printed circuits which are connected to the control circuit board. The control circuit board is sandwiched between the metal frame and the shield member, and the metal frame is arranged between the control circuit board and the liquid crystal display panel.
    Type: Application
    Filed: November 23, 2005
    Publication date: April 13, 2006
    Inventors: Seiichi Nishiyama, Shigetake Takaku, Yoshiharu Takeda, Shigeo Mikoshiba, Tomokazu Shiga, Koji Hashimoto
  • Publication number: 20050280625
    Abstract: A liquid crystal display device includes a liquid crystal display panel having a liquid crystal layer sandwiched between a pair of transparent substrates, at least one of which has patterned electrodes on an inner surface thereof, and a backlight disposed behind the liquid crystal display panel. The backlight has at least one discharge tube including a sealed-off transparent tube, a phosphor film formed on an inner surface of the sealed-off transparent tube, and a discharge gas within the sealed-off transparent tube and plural electrodes spaced in a direction of an axis of the sealed-off transparent tube and positioned at least partially around a circumference of the sealed-off transparent tube. At least two adjacent ones of the plural electrodes is supplied with alternating voltages different in frequency from each other, respectively.
    Type: Application
    Filed: August 26, 2005
    Publication date: December 22, 2005
    Inventors: Toshihiro Yajima, Seiichi Nishiyama, Shigetake Takaku, Yoshiharu Takeda, Shigeo Mikoshiba, Tomokazu Shiga, Koji Hashimoto, Yusuke Baba
  • Patent number: 6956556
    Abstract: A liquid crystal display device includes a liquid crystal display panel having a liquid crystal layer sandwiched between a pair of transparent substrates, at least one of which has patterned electrodes on an inner surface thereof, and a backlight disposed behind the liquid crystal display panel. The backlight has at least one discharge tube including a sealed-off transparent tube, a phosphor film formed on an inner surface of the sealed-off transparent tube, and a discharge gas within the sealed-off transparent tube and plural electrodes spaced in a direction of an axis of the sealed-off transparent tube and positioned at least partially around a circumference of the sealed-off transparent tube. At least two adjacent ones of the plural electrodes is supplied with alternating voltages different in frequency from each other, respectively.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: October 18, 2005
    Assignees: Hitachi, Ltd., Hitachi Electronic Devices Co., Ltd.
    Inventors: Toshihiro Yajima, Seiichi Nishiyama, Shigetake Takaku, Yoshiharu Takeda, Shigeo Mikoshiba, Tomokazu Shiga, Koji Hashimoto, Yusuke Baba
  • Publication number: 20050162582
    Abstract: There is disclosed a liquid crystal display including cold cathode fluorescent tubes having improved failure resistance and shock resistance. The liquid crystal display has a liquid crystal panel and a backlight disposed on the opposite side of the display screen of the liquid crystal panel. The backlight has plural light sources and plural lamp holders for holding the light sources. Each of the lamp holders has a pair of gripping portions for gripping the light sources and a connector portion having the gripping portions at its opposite ends. The connector portion has slits in its opposite end portions, the slits extending in the longitudinal direction of the connector portion.
    Type: Application
    Filed: January 21, 2005
    Publication date: July 28, 2005
    Inventors: Takaaki Kitada, Seiichi Nishiyama
  • Publication number: 20020041268
    Abstract: There is provided a liquid crystal display device which can be lengthened in life and in which the area of its so-called a picture frame can be narrowed. The liquid crystal display device includes a liquid crystal display panel having a display part in its central portion except its periphery; and a backlight disposed on a back side of the liquid crystal display panel. The backlight includes a discharge tube having electrodes at at least its opposite ends, and the electrodes are disposed at the exterior of the discharge tube. The opposite end portions of the discharge tube where the respective electrodes are disposed are positioned to be superposed on the periphery of the liquid crystal display panel, and are bent with an angle with respect to the central axis of the discharge tube.
    Type: Application
    Filed: August 31, 2001
    Publication date: April 11, 2002
    Inventors: Toshihiro Yajima, Seiichi Nishiyama, Shigetake Takaku, Shoichi Noguchi, Yoshiharu Takeda
  • Publication number: 20020027774
    Abstract: A liquid crystal display having a liquid crystal display panel for modulating light to form an image and a back light unit having a plurality of lamp tubes without inside electrodes and which are discharged by outside electrodes disposed along an outer surface of the at least one lamp tube, the back light unit being disposed behind the liquid crystal display panel. One outside electrode disposed at one lamp tube is electrically connected with another outside electrode disposed at an another adjacent lamp tube.
    Type: Application
    Filed: November 14, 2001
    Publication date: March 7, 2002
    Inventors: Seiichi Nishiyama, Shigetake Takaku, Yoshiharu Takeda, Shigeo Mikoshiba, Tomokazu Shiga, Koji Hashimoto
  • Patent number: 6331064
    Abstract: A liquid crystal display is formed by a liquid crystal display panel for modulating light to form an image, and a back light unit including a lamp tube which is discharged by an electrode and is disposed behind said liquid crystal display panel, wherein said electrode is formed outside of said lamp tube. In this way, the liquid crystal display unit has a life span which can be increased without the need to replace the lamp tube or the back light unit.
    Type: Grant
    Filed: November 26, 1999
    Date of Patent: December 18, 2001
    Assignees: Hitachi, Ltd., Hitachi Electronic Devices Co., Ltd.
    Inventors: Seiichi Nishiyama, Shigetake Takaku, Yoshiharu Takeda, Shigeo Mikoshiba, Tomokazu Shiga, Koji Hashimoto
  • Publication number: 20010050735
    Abstract: A liquid crystal display device includes a liquid crystal display panel having a liquid crystal layer sandwiched between a pair of transparent substrates, at least one of which has patterned electrodes on an inner surface thereof, and a backlight disposed behind the liquid crystal display panel. The backlight has at least one discharge tube including a sealed-off transparent tube, a phosphor film formed on an inner surface of the sealed-off transparent tube, and a discharge gas within the sealed-off transparent tube and plural electrodes spaced in a direction of an axis of the sealed-off transparent tube and positioned at least partially around a circumference of the sealed-off transparent tube. At least two adjacent ones of the plural electrodes is supplied with alternating voltages different in frequency from each other, respectively.
    Type: Application
    Filed: May 17, 2001
    Publication date: December 13, 2001
    Inventors: Toshihiro Yajima, Seiichi Nishiyama, Shigetake Takaku, Yoshiharu Takeda, Shigeo Mikoshiba, Tomokazu Shiga, Koji Hashimoto, Yusuke Baba
  • Patent number: 6163181
    Abstract: A frequency divider circuit, and a digital PLL circuit including the same, which can suppress jitter occurring in an output signal, including a first circuit module which drives D-FFs connected in series using an input signal as a reference clock signal and divides the input signal by a frequency division ratio selected by a frequency division ratio determining signal to produce a first divided signal; a second circuit module which drives D-FFs connected in series using the first divided signal as a reference clock signal and divides the first divided signal by a frequency division ratio corresponding to the number of D-FFs connected in series to produce an output signal; and an OR circuit which produces a frequency division ratio determining signal based on the outputs of the D-FFs of the second circuit module and a frequency division ratio selecting signal.
    Type: Grant
    Filed: September 16, 1998
    Date of Patent: December 19, 2000
    Assignee: Sony Corporation
    Inventor: Seiichi Nishiyama
  • Patent number: 5905396
    Abstract: A clamp pulse generating circuit comprising a synchronizing decision circuit for deciding whether an external synchronizing pulse is being input or not; an exclusive-OR circuit, a change-over switch and a pulse width detecting circuit for deciding whether a video signal containing a synchronizing pulse is being input or not; and a pulse generating circuit for generating a clamp pulse at the front or rear edge of the external synchronizing pulse output from a synchronizing separator circuit, and outputting the clamp pulse at the front edge selected by a selection switch when the external synchronizing pulse is being input and forcing to select and output the clamp pulse at the rear edge of the synchronizing pulse irrespective of the presence of the external synchronizing pulse when the video signal containing the synchronizing pulse is being input.
    Type: Grant
    Filed: June 2, 1997
    Date of Patent: May 18, 1999
    Assignee: Sony Corporation
    Inventor: Seiichi Nishiyama
  • Patent number: 5875002
    Abstract: A clamp pulse generating circuit comprising a synchronizing decision circuit for deciding whether an external synchronizing pulse is being input or not; an exclusive-OR circuit, a change-over switch and a pulse width detecting circuit for deciding whether a video signal containing a synchronizing pulse is being input or not; and a pulse generating circuit for generating a clamp pulse at the front or rear edge of the external synchronizing pulse output from a synchronizing separator circuit, and outputting the clamp pulse at the front edge selected by a selection switch when the external synchronizing pulse is being input and forcing to select and output the clamp pulse at the rear edge of the synchronizing pulse irrespective of the presence of the external synchronizing pulse when the video signal containing the synchronizing pulse is being input.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: February 23, 1999
    Assignee: Sony Corporation
    Inventor: Seiichi Nishiyama
  • Patent number: 5539425
    Abstract: A display unit in which a black level is set to a predetermined level in a first display screen having a first aspect ratio and a black level is set to a predetermined level in a second display screen having a second aspect ratio is provided. A darkest signal of a video signal is detected from an image area corresponding to the second display screen. The darkest signal is lowered to a predetermined level in an image area corresponding to the first display screen. In accordance with the principles of the present invention, the situation where a video signal of the second display screen that is to be lowered will not be lowered can be prevented.
    Type: Grant
    Filed: January 14, 1994
    Date of Patent: July 23, 1996
    Assignee: Sony Corporation
    Inventors: Yutaka Kamaguchi, Seiichi Nishiyama, Hisao Sakurai
  • Patent number: 5432477
    Abstract: There is provided a gain control Gilbert amplifier circuit which can be more easily controlled for variation in the gain characteristics of each predriver integrated circuit for primary color image signals R, G, and B, and the variation caused by light emitting efficiency than the prior art. The gain control Gilbert amplifier circuit also operates in a wider frequency range than the conventional circuits, and has a large S/N ratio. One embodiment of the amplifier circuit comprises a grounded-base transistor amplifier circuit having rectifier elements, reference voltage sources, diodes connected to a differentially paired transistors. The rectifier elements are controlled so that a ratio of currents output from constant-current sources can be selected to enable the frequency characteristic of the amplifier circuit to expand by a frequency range.
    Type: Grant
    Filed: July 22, 1993
    Date of Patent: July 11, 1995
    Assignee: Sony Corporation
    Inventors: Seiichi Nishiyama, Masato Kawata, Kiyoshi Furuya, Ryuichiro Kawai
  • Patent number: 5337010
    Abstract: In a wide-band amplifier circuit, a third and a fourth transistors are cascaded externally with a first and a second transistors within an integrated circuit which are connected each to output terminals by collectors through the output terminals, and a collector current flowing in the third transistor is transformed into an output voltage by an external resistance. A load capacity parasitic on the output terminal of the integrated circuit is driven by the collector current, thus a possibility of a frequency characteristic deteriorating due to an influence of the load capacity is avoided, and an operating zone can further be expanded to a high frequency band as compared with a prior art one.
    Type: Grant
    Filed: January 27, 1993
    Date of Patent: August 9, 1994
    Assignee: Sony Corporation
    Inventor: Seiichi Nishiyama
  • Patent number: 5317200
    Abstract: In a phase shift circuit apparatus, first and second currents, produced by dividing signal current at a predetermined ratio by a variable bias voltage, are respectively supplied to fifth and eighth transistors which constitute the second differential amplification means, and the first and the second currents are respectively divided at predetermined ratios to supply currents, including square components; third, fourth, fifth and sixth currents which are caused to flow through fifth and sixth transistors of the third differential amplification means and seventh and eighth transistors of the fourth differential amplification means, respectively. Seventh and eighth currents which, produced by dividing signal current at predetermined ratios, are supplied to the ninth and the tenth transistors or the eleventh and the twelfth transistors from the first and the second connection nodes, respectively.
    Type: Grant
    Filed: September 28, 1992
    Date of Patent: May 31, 1994
    Assignee: Sony Corporation
    Inventor: Seiichi Nishiyama
  • Patent number: 5294929
    Abstract: In a control system for peripheral devices, by operating only one device for digital-to-analogue conversion, the specific output switching corresponding to that specific device for digital-to-analogue conversion is closed and the other output switching corresponding to the other device for digital-to-analogue conversion are open so that the only the output signal of that specific device for digital-to-analogue conversion can be output. Thus, the accuracy of operation of each device for digital-to-analogue conversion can be easily evaluated.
    Type: Grant
    Filed: July 9, 1992
    Date of Patent: March 15, 1994
    Assignee: Sony Corporation
    Inventors: Hiroshi Numata, Seiichi Nishiyama
  • Patent number: 5256983
    Abstract: Disclosed is a wide band amplifier comprising a first differential connection circuit made of a first and a second transistor differentially interconnected, a second differential connection circuit made of a third and a fourth transistor differentially interconnected, and a level shift circuit interposingly provided between a load resistance and a power supply. The load resistance is connected to the collector of the first transistor. The bases of the first and the third transistors are supplied with a voltage for gain determination. Furthermore, the bases of the first and the third transistors are supplied with a predetermined operating voltage. The voltage of the level shift circuit is fed to the collector of the fourth transistor. In this setup, the voltage to the load resistance connected to the collector of the first transistor is varied depending on the magnitude of the current flowing through the fourth transistor.
    Type: Grant
    Filed: October 15, 1991
    Date of Patent: October 26, 1993
    Assignee: Sony Corporation
    Inventor: Seiichi Nishiyama
  • Patent number: 5252931
    Abstract: Disclosed is a a wide band frequency amplifier comprising the following: A first and a second transistor constitute a first push-pull amplifier circuit. A first current source is included, of which one end is connected to the second transistor base, the other end connected to ground. A first bias voltage source is interposed between the bases of the first and the second transistors. A third transistor is coupled with the first transistor in Darlington connection, thereby driving the first and the second transistors using an input signal. A fourth and a fifth transistor constitute a second push-pull amplifier circuit. A second current source is provided, of which one end is connected to the fourth transistor base, the other end connected to ground. A second bias voltage source is interposed between the bases of the fourth and the fifth transistors. A sixth transistor is coupled with the fourth transistor in Darlington connection, thereby driving the fourth and the fifth transistors using the input signal.
    Type: Grant
    Filed: July 17, 1992
    Date of Patent: October 12, 1993
    Assignee: Sony Corporation
    Inventor: Seiichi Nishiyama
  • Patent number: 5180989
    Abstract: A wideband amplifier is provided having a plurality of transistors, the bases of which are commonly grounded, a signal source for generating input signals, an input terminal connected to the signal source, a drive amplifier connected to the input terminal, a plurality of input resistors connected to the drive amplifier and to respective emitters of the transistors, a plurality of load resistors connected to respective collectors of the transistors, and an output terminal connected to a junction where the collector and one of the load resistors are connected with each other.
    Type: Grant
    Filed: August 20, 1991
    Date of Patent: January 19, 1993
    Assignee: Sony Corporation
    Inventors: Hisao Sakurai, Seiichi Nishiyama