Patents by Inventor Seiichiro Kihara

Seiichiro Kihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050207445
    Abstract: A counter generates a generation number based on an input data valid signal and a frame end signal. When a packet generating circuit generates a packet from the generation number generated by the counter and data of a prescribed length generated by dividing variable length data, it refers to the frame end signal to determine whether the data corresponds to a last sequence of a frame. When it corresponds to the last sequence, the packet generating circuit stores in the relevant packet a node number that differs from the node number being stored in a packet containing data corresponding to a sequence other than the last sequence. This enables the data driven processor to execute a particular program for the packet corresponding to the last sequence, thereby suppressing a decrease in processing speed of the data driven processor.
    Type: Application
    Filed: March 16, 2005
    Publication date: September 22, 2005
    Inventor: Seiichiro Kihara
  • Publication number: 20050210305
    Abstract: In a data processor, each logic circuit receives data provided from the transfer control unit being connected, processes the data, and outputs the data to the transfer control unit in the next stage. The data processing speed is changed in accordance with the level of a voltage supplied to the logic circuit. Each transfer control unit includes a plurality of C elements receiving a request pulse for data transfer provided from the preceding stage and transferring the same to the next stage, a plurality of pipeline registers, and a plurality of P circuits. Each pipeline register, in response to every reception of the request pulse, receives, holds and outputs the data requested to be transferred. Each P circuit determines frequency of data supply to the logic circuit being connected, and controls the level of a voltage supplied to the logic circuit in accordance with the determined frequency.
    Type: Application
    Filed: March 21, 2005
    Publication date: September 22, 2005
    Inventor: Seiichiro Kihara
  • Patent number: 5304812
    Abstract: An optoelectronic device for sensing an object without any contact, the optoelectronic device being adapted to be connected to a control device which is capable of sending an identification code to the optoelectronic device, the optoelectronic device includes an optoelectronic element (110, 111) for receiving an input signal and for converting the received signal into an electrical signal, an address memory (121) for storing a self identification code, a determining unit (126) connected to the address memory (121) for determining a coincidence between the self identification code stored in the address memory (121) and the identification code sent from the control device, and an activating unit (127) connected to the determining unit (126) for driving the optoelectronic element (110, 111) at a time when the self identification code coincides with the identification code.
    Type: Grant
    Filed: November 18, 1991
    Date of Patent: April 19, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Zenpei Tani, Kiyoshi Ebina, Yukihisa Oda, Nobumasa Ono, Masahiro Morita, Mitsuo Kobachi, Kazuhito Nagura, Hajime Kashida, Hirohumi Sindo, Mitsuru Hosoki, Kiyoshi Kumata, Atsushi Murayama, Seiichiro Kihara
  • Patent number: 4988895
    Abstract: A novel comparator circuit is disclosed, in which a pulse output is obtained from the output terminal of a differential amplifier through a transistor by applying a threshold voltage to either input terminal of a differential amplifier composed of a pair of transistors and then comparing an input voltage applied to the other input terminal therewith, wherein the aforementioned pair of transistors of the differential amplifier are each composed of two transistors connected in a complex manner, the input voltage is directly inputted, without the use of a buffer or the like, by raising the input impedance of the comparator circuit to thereby simplify the circuit as a whole and to widen its scope of application.
    Type: Grant
    Filed: June 22, 1990
    Date of Patent: January 29, 1991
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Seiichiro Kihara, Zenpei Tani, Hisao Nagao
  • Patent number: 4943736
    Abstract: A waveform converting apparatus includes a first and a second common-emitter type transistors as part of a first and second emitter follower circuits respectively. The follower circuits are used for converting the impedances of an input signal independently. A first constant current supply is connected to the emitter of the first transistor provided in the first emitter follower circuit, and a second constant current supply is connected to the emitter of the second transistor provided in the second emitter follower circuit. The constant current flowing in the first emitter follower circuit is adjusted to be of a smaller value than the constant current flowing in the second emitter follower circuit.
    Type: Grant
    Filed: January 26, 1989
    Date of Patent: July 24, 1990
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Seiichiro Kihara, Naonori Okabayashi