Patents by Inventor Seiji Kai
Seiji Kai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160163957Abstract: In a surface acoustic wave device, a conductor pattern is located on a main surface of a piezoelectric substrate and includes a surface acoustic wave element pattern, a pad and a feed line that is electrically connected to the pad and extends up to an outer peripheral edge of the main surface. The piezoelectric substrate and a cover are bonded to each other with a support layer therebetween that includes a frame extending along the outer peripheral edge of the main surface so that a gap is provided between the frame and the outer peripheral edge and includes a pad adjacent portion on the pad. Thus, a closed space is surrounded by the piezoelectric substrate, the cover and the frame. The support layer further includes a reinforcement portion that intersects a feed line at or near an intersection portion in which a separated portion of the frame that is separated from the pad adjacent portion intersects the feed line.Type: ApplicationFiled: February 11, 2016Publication date: June 9, 2016Inventors: Daisuke AJIMA, Seiji KAI
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Publication number: 20160149557Abstract: In an elastic wave device, a plurality of elastic wave elements that include IDT electrodes are provided on a piezoelectric substrate, and a support layer that surrounds the elastic wave elements is provided on the piezoelectric substrate to define hollow portions in which the elastic wave elements are located. A cover member is stacked on the support layer, so that the hollow portions, in which the elastic wave elements are located, are provided, and the support layer includes a first support layer and a second support layer. The first support layer extends along an outer peripheral edge of the piezoelectric substrate, and the second support layer is located in a region surrounded by the first support layer and disposed around the elastic wave elements so as to have the hollow portions, in which the elastic wave elements are located. A hollow path is provided between the first support layer and the second support layer and arranged to allow communication between at least two of the hollow portions.Type: ApplicationFiled: February 1, 2016Publication date: May 26, 2016Inventors: Mitsuyoshi HIRA, Seiji KAI
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Patent number: 9271400Abstract: An electronic component includes a frame-shaped supporting body including a heat-curable resin and surrounding a functional unit on one main surface of a substrate and so as to be separated from a periphery of the substrate on an inner side and in which a lid member is fixed to the supporting body such that an opening of the frame-shaped supporting body is sealed. The frame-shaped supporting body includes a frame-shaped supporting body main body, a first protrusion that protrudes toward an inside from the supporting body main body and a second protrusion that protrudes toward an outside from the supporting body main body at a portion where the supporting body main body and the first protrusion are continuous with each other.Type: GrantFiled: September 3, 2013Date of Patent: February 23, 2016Assignee: Murata Manufacturing Co., Ltd.Inventors: Seiji Kai, Shintaro Nakatani, Mitsuyoshi Hira, Takao Mukai, Hisashi Yamazaki
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Publication number: 20150236237Abstract: Functional element units and a connection line electrically connecting the functional element units are formed on one principal surface of a piezoelectric motherboard. A resin support layer enclosing the functional element units is formed on the one principal surface of the motherboard. An elastic wave device with the functional units is obtained by dividing a multilayer body including the motherboard, the functional element units, and the support layer into a plurality of sections along a dicing line. The connection line includes a line main body positioned on the dicing line, and a connection unit in which the line main body and the functional element units are electrically connected. Prior to dividing the multilayer body, a retaining member made of resin which straddles the line main body in the width direction of the line main body is formed separate from the support layer on the motherboard.Type: ApplicationFiled: May 6, 2015Publication date: August 20, 2015Inventors: Mitsuyoshi HIRA, Seiji KAI
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Publication number: 20150037921Abstract: A method for manufacturing acoustic wave devices includes forming power supply lines along boundaries between chip regions on a main surface of a collective substrate on which interdigital transducer (IDT) electrodes and pad electrodes are formed; providing substantially frame-shaped first support members, each including a first opening in which one of the IDT electrodes is located and including first through-holes in a region in which the pad electrodes are formed; providing second support members outside the first support members; providing a lid member including second through-holes at positions overlapping the first through-holes on top surfaces of the first support members; and forming terminal electrodes in the first through-holes and the second through-holes by electroplating. The collective substrate, the first support members, the second support members, and the lid member form enclosed spaces in which the power supply lines are sealed.Type: ApplicationFiled: July 28, 2014Publication date: February 5, 2015Inventors: Yohei KONAKA, Seiji KAI
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Publication number: 20140003017Abstract: An electronic component includes a frame-shaped supporting body including a heat-curable resin and surrounding a functional unit on one main surface of a substrate and so as to be separated from a periphery of the substrate on an inner side and in which a lid member is fixed to the supporting body such that an opening of the frame-shaped supporting body is sealed. The frame-shaped supporting body includes a frame-shaped supporting body main body, a first protrusion that protrudes toward an inside from the supporting body main body and a second protrusion that protrudes toward an outside from the supporting body main body at a portion where the supporting body main body and the first protrusion are continuous with each other.Type: ApplicationFiled: September 3, 2013Publication date: January 2, 2014Applicant: Murata Manufacturing Co., Ltd.Inventors: Seiji KAI, Shintaro NAKATANI, Mitsuyoshi HIRA, Takao MUKAI, Hisashi YAMAZAKI
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Patent number: 7459327Abstract: A solid-state imager is disclosed wherein isolation regions (4) are covered with power supply lines (8), a light-transmitting lens film (24) whose surface forms continuous convex portions above the isolation regions (4) convex towards channel regions (5) is provided, and a light-transmitting material having a refractive index lower than that of the lens film (24) is provided over the lens film (24).Type: GrantFiled: April 16, 2004Date of Patent: December 2, 2008Assignee: Sanyo Electric Co., Ltd.Inventors: Seiji Kai, Ryouji Matsui, Tetsuya Yamada, Tsutomu Imai, Kazuyuki Takegawa
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Patent number: 7348133Abstract: The invention provides a manufacturing method of a solid-state image sensing device where light-receiving sensitivity is improved. The manufacturing method of the solid-state image sensing device of the invention has forming an insulating film on a light-receiving region and a non-light-receiving region, forming a mask pattern for forming a lens on the insulating film on the light-receiving region and a dummy mask pattern for forming a lens on the insulating film on the non-light-receiving region, forming a plurality of convex portions on the insulating film by etching the insulating film by using the mask pattern and the dummy mask pattern as a mask, forming a first lens film on the insulating film, forming a planarizing film having a lower etching rate than the first lens film on the first lens film, etching back the first lens film and the planarizing film, and forming a second lens film on the first lens film.Type: GrantFiled: August 5, 2004Date of Patent: March 25, 2008Assignee: Sanyo Electric Co., Ltd.Inventors: Isamu Tomizawa, Seiji Kai, Kouji Yagi
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Publication number: 20070075382Abstract: An integrated circuit is provided, and in the integrated circuit, a microlens array is formed with a silicon nitride film which provides an interlayer insulation film for Al wiring, so that any stress migration in the Al wiring and any deformation of lens shape can be prevented. A silicon nitride film is formed on a semiconductor substrate as an interlayer insulation film between a first-layer wiring and a second-layer wiring. The silicon nitride film includes, in an image pickup section, a lens array having a plurality of convex lenses which are formed with a surface of the silicon nitride film. A silicon dioxide film is grown on the silicon nitride film. Then, a second Al film is formed on the silicon dioxide film. The Al film is etched in an unnecessary portion such as the surfaces of the lens array, to form wiring.Type: ApplicationFiled: September 27, 2006Publication date: April 5, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Keiichi Yamaguchi, Seiji Kai
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Patent number: 7138670Abstract: A compact semiconductor device having a contact hole that improves stability of electric connection between a wire and an electrode. The semiconductor device includes an insulation layer formed on a semiconductor substrate, first electrodes formed on the insulation layer and spaced from one another by an interval, an insulation film covering the first electrodes, and spaced second electrodes formed on the insulation film. Each second electrode includes an intermediate portion filling the space between two adjacent first electrodes, two edge portions respectively laid above the two adjacent first electrodes in an overlapping manner, and an upper surface connected to a wire by a contact. Thickness, t1, of the insulation film, thickness, t2, of each edge portion of the second electrode, and interval, S, between the first electrodes are adjusted to satisfy the expression of S<(2t1+2t2).Type: GrantFiled: January 21, 2005Date of Patent: November 21, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Tetsuya Miwa, Tsutomu Imai, Seiji Kai, Takayuki Kaida
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Publication number: 20060151773Abstract: A solid-state imager is disclosed wherein isolation regions (4) are covered with power supply lines (8), a light-transmitting lens film (24) whose surface forms continuous convex portions above the isolation regions (4) convex towards channel regions (5) is provided, and a light-transmitting material having a refractive index lower than that of the lens film (24) is provided over the lens film (24).Type: ApplicationFiled: April 16, 2004Publication date: July 13, 2006Inventors: Seiji Kai, Ryouji Matsui, Tetsuya Yamada, Tsutomu Imai, Kazuyuki Takegawa
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Publication number: 20060103941Abstract: In order to efficiently form microlenses wide in light receiving surfaces, microlenses are manufactured according to the following process. A first light transmitting film on which columnar projections are formed with a predetermined interval is formed on a semiconductor substrate. A second light transmitting film made of a material same as that of the first light transmitting film is laminated on a surface of the first light transmitting film, and a planar shape of the projection is enlarged to make a separation between the projections narrower. Argon ions are irradiated onto the second light transmitting film to round off a corner of the second light transmitting film, and thereby a lens is formed.Type: ApplicationFiled: November 15, 2005Publication date: May 18, 2006Applicant: SANYO ELECTRIC CO., LTD.Inventors: Keiichi Yamaguchi, Seiji Kai
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Patent number: 6995915Abstract: The present invention intends to provide a manufacturing method of a heat resistant micro-lens. The manufacturing method includes forming on a substrate an inorganic film having the optical transparency; forming, at positions that are on the inorganic film and correspond to lens formation positions, a resist films; etching a portion where the resist films are not formed of the inorganic film; removing the resist films that remain; and irradiating inert gas ions to the inorganic film from which the resist films are removed and that is patterned according to the etching.Type: GrantFiled: November 4, 2004Date of Patent: February 7, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Kazuyuki Takegawa, Ryoji Matsui, Tetsuya Yamada, Tsutomu Imai, Seiji Kai, Yuko Tanaka
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Publication number: 20050161709Abstract: A compact semiconductor device having a contact hole that improves stability of electric connection between a wire and an electrode. The semiconductor device includes an insulation layer formed on a semiconductor substrate, first electrodes formed on the insulation layer and spaced from one another by an interval, an insulation film covering the first electrodes, and spaced second electrodes formed on the insulation film. Each second electrode includes an intermediate portion filling the space between two adjacent first electrodes, two edge portions respectively laid above the two adjacent first electrodes in an overlapping manner, and an upper surface connected to a wire by a contact. Thickness, t1, of the insulation film, thickness, t2, of each edge portion of the second electrode, and interval, S, between the first electrodes are adjusted to satisfy the expression of S<(2t1+2t2).Type: ApplicationFiled: January 21, 2005Publication date: July 28, 2005Inventors: Tetsuya Miwa, Tsutomu Imai, Seiji Kai, Takayuki Kaida
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Publication number: 20050099695Abstract: The present invention intends to provide a manufacturing method of a heat resistant micro-lens. The manufacturing method includes forming on a substrate an inorganic film having the optical transparency; forming, at positions that are on the inorganic film and correspond to lens formation positions, a resist films; etching a portion where the resist films are not formed of the inorganic film; removing the resist films that remain; and irradiating inert gas ions to the inorganic film from which the resist films are removed and that is patterned according to the etching.Type: ApplicationFiled: November 4, 2004Publication date: May 12, 2005Applicant: SANYO ELECTRIC CO., LTD.Inventors: Kazuyuki Takegawa, Ryoji Matsui, Tetsuya Yamada, Tsutomu Imai, Seiji Kai, Yuko Tanaka
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Publication number: 20050042550Abstract: The invention provides a manufacturing method of a solid-state image sensing device where light-receiving sensitivity is improved. The manufacturing method of the solid-state image sensing device of the invention has forming an insulating film on a light-receiving region and a non-light-receiving region, forming a mask pattern for forming a lens on the insulating film on the light-receiving region and a dummy mask pattern for forming a lens on the insulating film on the non-light-receiving region, forming a plurality of convex portions on the insulating film by etching the insulating film by using the mask pattern and the dummy mask pattern as a mask, forming a first lens film on the insulating film, forming a planarizing film having a lower etching rate than the first lens film on the first lens film, etching back the first lens film and the planarizing film, and forming a second lens film on the first lens film.Type: ApplicationFiled: August 5, 2004Publication date: February 24, 2005Applicant: Sanyo Electric Co., Ltd.Inventors: Isamu Tomizawa, Seiji Kai, Kouji Yagi
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Patent number: 6785441Abstract: An optical fiber collimator having a lens (10), and an optical fiber chip (14) disposed at a distance from the lens, the optical fiber chip holding an end portion of an optical fiber (12) and having an end surface treated to be inclined. The optical axis of the optical fiber is made eccentric with respect to the center of the lens to set the eccentric quantity of the optical fiber so that the center of the lens substantially coincides with the center of a light beam incident on the lens. The kind of the lens is optional. The lens may be an inexpensive spherical lens or may be a gradient index rod lens. When a gradient index rod lens is used, a lens in which a surface facing to the optical fiber chip is treated to be inclined is used as the gradient index rod lens.Type: GrantFiled: December 26, 2001Date of Patent: August 31, 2004Assignee: Nippon Sheet Glass Co., Ltd.Inventors: Ikuto Ooyama, Takashi Fukuzawa, Seiji Kai
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Publication number: 20020094163Abstract: An optical fiber collimator having a lens (10), and an optical fiber chip (14) disposed at a distance from the lens, the optical fiber chip holding an end portion of an optical fiber (12) and having an end surface treated to be inclined. The optical axis of the optical fiber is made eccentric with respect to the center of the lens to set the eccentric quantity of the optical fiber so that the center of the lens substantially coincides with the center of a light beam incident on the lens. The kind of the lens is optional. The lens may be an inexpensive spherical lens or may be a gradient index rod lens. When a gradient index rod lens is used, a lens in which a surface facing to the optical fiber chip is treated to be inclined is used as the gradient index rod lens.Type: ApplicationFiled: December 26, 2001Publication date: July 18, 2002Inventors: Ikuto Ooyama, Takashi Fukuzawa, Seiji Kai
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Patent number: 5949106Abstract: A power FET for which it is difficult to generate oscillations dependent on the interval between adjacent pads. The power FET has a plurality of pads for first terminals, which are disposed on one side of a chip at unequal intervals, and a plurality of pads for second terminals, which are placed on the other side of the chip. Alternatively, or in addition, the plurality of pads for the second terminals may also be disposed at unequal intervals.Type: GrantFiled: July 8, 1997Date of Patent: September 7, 1999Assignee: Oki Electric Industry Co., Ltd.Inventors: Seiji Kai, Yoshihiro Yamamoto, Masaaki Itoh, Koutarou Tanaka
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Patent number: 5886372Abstract: It is an object of the present invention to provide a semiconductor device that is able to have the same Vp in all FETs formed on one chip.A semiconductor device of the present invention comprises a semiconductor substrate having a first region and a second region on a main surface; a first field effect transistor formed on the first region of the main surface, the first field effect transistor having first gates arranged in a plurality of rows and having a first total gate width, the first gates respectively establishing a first gate length and a first gate width; and a second field effect transistor formed on the second region of the main surface, the second field effect transistor having second gates arranged a plurality of rows and having a second total gate width smaller than the first total gate width, the second gates respectively establishing a second gate length substantially the same as the first gate length and a second gate width substantially the same as the first gate width.Type: GrantFiled: July 7, 1997Date of Patent: March 23, 1999Assignee: Oki Electric Industry Co., Ltd.Inventors: Seiji Kai, Yoshihiro Yamamoto, Masaaki Itoh, Koutarou Tanaka