Patents by Inventor Seiji Mori

Seiji Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9516751
    Abstract: To provide a wiring board excellent in connection reliability with a semiconductor chip. A first buildup layer 31 where resin insulating layers 21 and 22 and a conductor layer 24 are laminated is formed at a substrate main surface 11 side of an organic wiring board 10. The conductor layer 24 for an outermost layer in the first buildup layer 31 includes a plurality of connecting terminal portions 41 for flip-chip mounting a semiconductor chip. The plurality of connecting terminal portions 41 is exposed through an opening portion 43 of a solder resist layer 25. Each connecting terminal portion 41 includes a connection region 51 for a semiconductor chip and a wiring region 52 disposed to extend from the connection region 51 along the planar direction.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: December 6, 2016
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Takahiro Hayashi, Makoto Nagai, Seiji Mori, Tomohiro Nishida, Makoto Wakazono, Tatsuya Ito
  • Patent number: 9485853
    Abstract: A wiring substrate according to the present invention includes a laminate of one or more insulation layers and one or more conductive layers and further includes a plurality of connection terminals formed on the laminate and spaced apart from one another, each having a step formed at the outer periphery of a first main surface opposite a contact surface in contact with the laminate, and a filling member provided in a filling manner between the connection terminals.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: November 1, 2016
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Tatsuya Ito, Seiji Mori, Takahiro Hayashi, Makoto Wakazono, Tomohiro Nishida
  • Patent number: 9420703
    Abstract: To provide a wiring board in which wiring conductors are securely protected by a precise and rigid dam portion formed on an outermost layer of a laminate and that is excellent in connection reliability with a semiconductor chip. A laminate that configures this wiring board includes multiple connection terminal portions and wiring conductors as a conductor layer of the outermost layer. The wiring conductors are arranged at predetermined positions, passing through between multiple connection terminal portions for flip-chip mounting a semiconductor chip. A resin insulating layer of the outermost layer of the laminate has a dam portion and a reinforcement portion. The dam portion covers the wiring conductors. The reinforcement portion is formed, between the wiring conductor and the connection terminal portion that is adjacent to the wiring conductor, lower than a height of the dam portion. The reinforcement portion is concatenated with a side surface of the dam portion.
    Type: Grant
    Filed: May 27, 2013
    Date of Patent: August 16, 2016
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Takahiro Hayashi, Makoto Nagai, Tatsuya Ito, Seiji Mori, Makoto Wakazono, Tomohiro Nishida
  • Publication number: 20160095216
    Abstract: A circuit board is provided that includes an outermost conductor layer including a plurality of terminals for flip-chip bonding and an outermost resin insulating layer defining a first opening and a second opening in an electronic-component mounting region. One of a power supply terminal and a ground terminal is exposed in the first opening. A plurality of signal terminals are exposed in the second opening. The resin insulating layer includes a reinforcing portion that defines an inner bottom surface of the second opening. A height of a portion of the terminal exposed in the first opening, the portion projecting from an inner bottom surface of the first opening, is greater than a height of portions of the terminals exposed in the second opening, the portions projecting from the inner bottom surface of the second opening.
    Type: Application
    Filed: September 18, 2015
    Publication date: March 31, 2016
    Inventors: Makoto NAGAI, Seiji MORI, Tatsuya ITO
  • Publication number: 20150357277
    Abstract: To provide a wiring substrate which can reliably prevent progress of cracking in a solder bump, and which exhibits improved reliability. The wiring substrate 10 of the present invention includes a substrate main body 11, pads 61, and a solder resist 81. The pads 61 are provided on the substrate back surface 13 of the substrate main body, and have surfaces 62 on which solder bumps 84 employed for connection of a motherboard 91 can be formed. The solder resist 81 covers the substrate back surface 13 of the substrate main body, and has openings 82 through which the pads 61 are exposed. A protrusion 71 is formed on a portion of the surface 62 of each pad 61. The height A4 of the end surface 72 of the protrusion 71, as measured from the surface 62 of the pad 61, is smaller than the depth of each opening 82.
    Type: Application
    Filed: December 12, 2013
    Publication date: December 10, 2015
    Inventors: Makoto NAGAI, Seiji MORI, Tatsuya ITO, Takahiro HAYASHI
  • Publication number: 20150334837
    Abstract: To provide a wiring board ensuring adhesion strength of a connecting terminal to reduce the connecting terminal from being fallen over or peeled off under fabrication process. The wiring board according to the present invention includes a laminated body where one or more layer of each of an insulating layer and a conductor layer are laminated. The wiring board includes a plurality of connecting terminals formed separately from one another on the laminated body and a filling member filled up between the plurality of connecting terminals. The filling member is filled up to a position lower than a height of the plurality of connecting terminals. The connecting terminals has a cross section with a trapezoidal shape where a width of a first principal surface on a side contacting the laminated body is wider than a width of a second principal surface facing the first principal surface.
    Type: Application
    Filed: July 12, 2013
    Publication date: November 19, 2015
    Inventors: Tomohiro NISHIDA, Makoto WAKAZONO, Seiji MORI
  • Patent number: 9179552
    Abstract: To obtain a wiring board that allows improving flowability of an underfill to be filled up a clearance between an electronic component and the wiring board. The present invention is a wiring board with a laminated body where one or more layer of each of an insulating layer and a conductor layer are laminated. The wiring board includes a plurality of connecting terminals formed separately from one another on the laminated body, a filling member filled up between the plurality of connecting terminals, and a solder resist layer laminated on the laminated body. The filling member is in contact with at least a part of each side surface of the plurality of connecting terminals. The solder resist layer includes an opening that exposes the plurality of connecting terminals. The filling member has a surface roughness rougher than a surface roughness of a top surface of the solder resist layer.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: November 3, 2015
    Assignee: NRK SPARK PLUG CO., LTD.
    Inventors: Tomohiro Nishida, Seiji Mori, Makoto Wakazono
  • Publication number: 20150223332
    Abstract: In a wiring substrate, formation of voids due to underfill filling failure is suppressed. A wiring substrate includes an insulating base layer, an insulating layer laminated on the base layer, and an electrically conductive connection terminal projecting from the insulating layer inside an opening. The insulating layer has a first surface with an opening, and a second surface located within the opening and being concave toward the base layer in relation to the first surface. The second surface extends from the first surface to the connection terminal inside the opening. On a cut surface which is a flat surface extending along a lamination direction in which the insulating layer is laminated on the base layer, an angle which is larger than 0° but smaller than 90° is formed between a normal line extending from an arbitrary point on the second surface toward the outside of the insulating layer and a parallel line extending from the arbitrary point toward the connection terminal in parallel to the first surface.
    Type: Application
    Filed: August 23, 2013
    Publication date: August 6, 2015
    Inventors: Tomohiro Nishida, Seiji Mori, Makoto Wakazono
  • Publication number: 20150216059
    Abstract: To provide a wiring board in which wiring conductors are securely protected by a precise and rigid dam portion formed on an outermost layer of a laminate and that is excellent in connection reliability with a semiconductor chip. A laminate that configures this wiring board includes multiple connection terminal portions and wiring conductors as a conductor layer of the outermost layer. The wiring conductors are arranged at predetermined positions, passing through between multiple connection terminal portions for flip-chip mounting a semiconductor chip. A resin insulating layer of the outermost layer of the laminate has a dam portion and a reinforcement portion. The dam portion covers the wiring conductors. The reinforcement portion is formed, between the wiring conductor and the connection terminal portion that is adjacent to the wiring conductor, lower than a height of the dam portion. The reinforcement portion is concatenated with a side surface of the dam portion.
    Type: Application
    Filed: May 27, 2013
    Publication date: July 30, 2015
    Inventors: Takahiro Hayashi, Makoto Nagai, Tatsuya Ito, Seiji Mori, Makoto Wakazono, Tomohiro Nishida
  • Publication number: 20150208501
    Abstract: To provide a wiring board excellent in connection reliability with a semiconductor chip. A first buildup layer 31 where resin insulating layers 21 and 22 and a conductor layer 24 are laminated is formed at a substrate main surface 11 side of an organic wiring board 10. The conductor layer 24 for an outermost layer in the first buildup layer 31 includes a plurality of connecting terminal portions 41 for flip-chip mounting a semiconductor chip. The plurality of connecting terminal portions 41 is exposed through an opening portion 43 of a solder resist layer 25. Each connecting terminal portion 41 includes a connection region 51 for a semiconductor chip and a wiring region 52 disposed to extend from the connection region 51 along the planar direction.
    Type: Application
    Filed: May 17, 2013
    Publication date: July 23, 2015
    Inventors: Takahiro Hayashi, Makoto Nagai, Seiji Mori, Tomohiro Nishida, Makoto Wakazono, Tatsuya Ito
  • Publication number: 20150189752
    Abstract: A wiring substrate includes a surface layer having electrical insulation properties and a connection terminal having electrical conduction properties and protruding from the surface layer. The connection terminal includes a base portion, a covering portion and a filling portion. The base portion of the connection terminal is made of an electrically conductive first metal and located adjacent to the surface layer so as to extend through the surface layer and protrude from the surface layer. The covering portion of the connection terminal is made of an electrically conductive second metal having a melting point lower than that of the first metal and located so as to cover the base portion. The filling portion of the connection terminal is made of at least one of the second metal and an alloy containing the first and second metals and located so as to fill a hollow in the base portion.
    Type: Application
    Filed: July 29, 2013
    Publication date: July 2, 2015
    Inventors: Takahiro Hayashi, Seiji Mori, Tatsuya Ito
  • Publication number: 20150027750
    Abstract: To provide a wiring substrate which can prevent short circuit between connection terminals, and which realizes reduction of the pitch between the connection terminals. The wiring substrate of the present invention includes a layered structure including one or more insulation layers and one or more conductor layers, and the wiring substrate is characterized in that a plurality of connection terminals are formed on the layered structure so as to be separated from one another; a filling member is filled between the connection terminals; and each of the connection terminals has a side surface composed of a contact surface which is in contact with the filling member, and a spaced surface which is not in contact with the filling member and which is located above the contact surface and below the top surface of the filling member.
    Type: Application
    Filed: April 10, 2013
    Publication date: January 29, 2015
    Inventors: Tomohiro Nishida, Seiji Mori, Makoto Wakazono
  • Patent number: 8852734
    Abstract: The present invention is to provide an epoxy resin composition uniformly containing a large amount of inorganic fillers, excellent in heat resistance and flame resistance, and having good impregnation into a base material, and a prepreg using the epoxy resin composition, having good tackiness, and being easy in handling. Furthermore, it is to provide a printed wiring board using a metal-clad laminate formed using the prepreg and/or the prepreg or the epoxy resin composition, capable of easily conducting an ENEPIG process, and a semiconductor device using the printed wiring board, excellent in performances. An epoxy resin composition comprises a solid epoxy resin, a silica nanoparticle having an average particle diameter of 1 nm or more and 100 nm or less, and a silica particle having an average particle diameter larger than that of the silica nanoparticle, in the range of 0.1 ?m or more and 5.0 ?m or less.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: October 7, 2014
    Assignee: Sumitomo Bakelite Company, Ltd.
    Inventors: Nobuki Tanaka, Seiji Mori
  • Publication number: 20140284081
    Abstract: A wiring board includes a substrate layer, an insulating layer laminated on the substrate layer and a connection terminal exposed from the insulating layer. The insulating layer has a first surface formed with an opening, a second surface located inside the opening and recessed toward the substrate layer and a wall surface located inside the opening and extending between the first and second surfaces in a lamination direction of the insulating layer. The second surface extends between the wall surface and the connection terminal and has a curved shape being convex toward the substrate layer and including a deepest part closest to the substrate layer so as to satisfy relationship of L1>L2 where L1 is a length between the wall surface and the deepest part in a layer in-plane direction; and L2 is a length between the deepest part and the connection terminal in the layer in-plane direction.
    Type: Application
    Filed: August 5, 2013
    Publication date: September 25, 2014
    Inventors: Tomohiro Nishida, Seiji Mori, Makoto Wakazono
  • Patent number: 8796209
    Abstract: The invention relates to an isolated amino acid that can act as an antagonist to FGF signaling, comprising at least a portion of the FGF protein amino acid sequence, and including a mutation in either a) the integrin ?v?3 binding region of FGF-1; or b) the FGFR binding region of FGF-1.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: August 5, 2014
    Assignee: The Regents of the University of California
    Inventors: Yoshikazu Takada, Seiji Mori
  • Publication number: 20140196939
    Abstract: To obtain a wiring board that allows improving flowability of an underfill to be filled up a clearance between an electronic component and the wiring board. The present invention is a wiring board with a laminated body where one or more layer of each of an insulating layer and a conductor layer are laminated. The wiring board includes a plurality of connecting terminals formed separately from one another on the laminated body, a filling member filled up between the plurality of connecting terminals, and a solder resist layer laminated on the laminated body. The filling member is in contact with at least a part of each side surface of the plurality of connecting terminals. The solder resist layer includes an opening that exposes the plurality of connecting terminals. The filling member has a surface roughness rougher than a surface roughness of a top surface of the solder resist layer.
    Type: Application
    Filed: April 10, 2013
    Publication date: July 17, 2014
    Inventors: Tomohiro Nishida, Seiji Mori, Makoto Wakazono
  • Publication number: 20140124242
    Abstract: A wiring substrate according to the present invention includes a laminate of one or more insulation layers and one or more conductive layers and further includes a plurality of connection terminals formed on the laminate and spaced apart from one another, each having a step formed at the outer periphery of a first main surface opposite a contact surface in contact with the laminate, and a filling member provided in a filling manner between the connection terminals.
    Type: Application
    Filed: May 16, 2012
    Publication date: May 8, 2014
    Applicants: NGK SPARK PLUG CO., LTD., NGK SPARK PLUG CO., LTD.
    Inventors: Tatsuya Ito, Seiji Mori, Takahiro Hayashi, Makoto Wakazono, Tomohiro Nishida
  • Publication number: 20140097007
    Abstract: Embodiments of the present wiring substrate include a stacked body including one or more insulation layers and one or more conductive layers, wherein the wiring substrate has a plurality of connection terminals formed on the stacked body, each connection terminal has a top surface whose area is smaller than that of each of opposite side surfaces thereof, and a filling member provided in a filling manner between the connection terminals. The top surface of each connection terminal has an area larger than that of a portion of each side surfaces portion exposed from the filling member, and a bonding layer containing a solder is formed on the top surface.
    Type: Application
    Filed: September 26, 2013
    Publication date: April 10, 2014
    Applicant: NGK Spark Plug Co., Ltd.
    Inventors: Makoto NAGAI, Seiji MORI, Takahiro HAYASHI, Tatsuya ITO
  • Publication number: 20140069701
    Abstract: A wiring board includes a base layer, a plurality of connection terminals and a surface layer. The base layer is electrically insulative. The plurality of connection terminals are conductive and formed on the base layer. The surface layer is electrically insulative, and fills gaps between the plurality of connection terminals on the base layer. The connection terminals include a base portion made of a conductive first metal and a coating portion made of a conductive second metal that is different from the first metal. The coating portion penetrates the surface layer, and coats the base portion to the base layer.
    Type: Application
    Filed: September 6, 2013
    Publication date: March 13, 2014
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Takahiro HAYASHI, Seiji MORI, Tatsuya ITO
  • Publication number: 20130058896
    Abstract: The invention relates to an isolated amino acid that can act as an antagonist to FGF signaling, comprising at least a portion of the FGF protein amino acid sequence, and including a mutation in either a) the integrin ?v?3 binding region of FGF-1; or b) the FGFR binding region of FGF-1.
    Type: Application
    Filed: March 30, 2012
    Publication date: March 7, 2013
    Applicant: The Regents of the University of California
    Inventors: Yoshikazu Takada, Seiji Mori