Patents by Inventor Seisho Yasukawa
Seisho Yasukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7792099Abstract: A method of establishing a multicast transfer route is disclosed that can reduce the cost of entire route under a constraint on delay incurred between starting point and ending points. The method includes the steps of: computing the shortest route with respect to delay connecting the starting point and the plural ending points based on measurement result; computing delay from a node on the shortest route to each ending point and the greatest delay; removing, if the greatest delay satisfies a delay condition, the greatest-cost route from the shortest route in accordance with selection criteria effective for cost reduction; dividing the multicast transfer route into two route trees; and establishing separately computed route as a complementary route that complement the removed route for connecting the two route trees. A method of multicast label switching for realizing the above method is also disclosed.Type: GrantFiled: September 25, 2008Date of Patent: September 7, 2010Assignee: Nippon Telegraph and Telephone CorporationInventors: Seisho Yasukawa, Koji Sugisono, Masanori Uga
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Patent number: 7693074Abstract: A multicast communication path calculation method is disclosed which includes the steps of: obtaining minimum delay paths from a source node to each destination node; selecting, as candidate nodes of a rendezvous point node, nodes on one of the obtained minimum delay paths; for each candidate node, calculating minimum delay paths from the candidate node to each destination node, and obtaining a difference between the maximum value and the minimum value among delays of the calculated minimum delay paths; selecting, as the rendezvous point node, a candidate node by which the difference is smallest; and outputting a minimum delay path from the source node to the rendezvous point node and minimum delay paths from the rendezvous point node to each destination node.Type: GrantFiled: July 12, 2007Date of Patent: April 6, 2010Assignee: Nippon Telegraph and Telephone CorporationInventors: Seisho Yasukawa, Koji Sugisono, Masanori Uga
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Patent number: 7652998Abstract: A multicast communication path calculation method is disclosed which includes the steps of: obtaining minimum delay paths from a source node to each destination node; selecting, as candidate nodes of a rendezvous point node, nodes on one of the obtained minimum delay paths; for each candidate node, calculating minimum delay paths from the candidate node to each destination node, and obtaining a difference between the maximum value and the minimum value among delays of the calculated minimum delay paths; selecting, as the rendezvous point node, a candidate node by which the difference is smallest; and outputting a minimum delay path from the source node to the rendezvous point node and minimum delay paths from the rendezvous point node to each destination node.Type: GrantFiled: December 10, 2003Date of Patent: January 26, 2010Assignee: Nippon Telegraph and Telephone CorporationInventors: Seisho Yasukawa, Koji Sugisono, Masanori Uga
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Patent number: 7583601Abstract: A method of establishing a multicast transfer route is disclosed that can reduce the cost of entire route under a constraint on delay incurred between starting point and ending points. The method includes the steps of: computing the shortest route with respect to delay connecting the starting point and the plural ending points based on measurement result; computing delay from a node on the shortest route to each ending point and the greatest delay; removing, if the greatest delay satisfies a delay condition, the greatest-cost route from the shortest route in accordance with selection criteria effective for cost reduction; dividing the multicast transfer route into two route trees; and establishing separately computed route as a complementary route that complement the removed route for connecting the two route trees. A method of multicast label switching for realizing the above method is also disclosed.Type: GrantFiled: February 6, 2004Date of Patent: September 1, 2009Assignee: Nippon Telegraph and Telephone CorporationInventors: Seisho Yasukawa, Koji Sugisono, Masanori Uga
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Publication number: 20090028149Abstract: A method of establishing a multicast transfer route is disclosed that can reduce the cost of entire route under a constraint on delay incurred between starting point and ending points. The method includes the steps of: computing the shortest route with respect to delay connecting the starting point and the plural ending points based on measurement result; computing delay from a node on the shortest route to each ending point and the greatest delay; removing, if the greatest delay satisfies a delay condition, the greatest-cost route from the shortest route in accordance with selection criteria effective for cost reduction; dividing the multicast transfer route into two route trees; and establishing separately computed route as a complementary route that complement the removed route for connecting the two route trees. A method of multicast label switching for realizing the above method is also disclosed.Type: ApplicationFiled: September 25, 2008Publication date: January 29, 2009Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Seisho YASUKAWA, Koji Sugisono, Masanori Uga
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Patent number: 7474664Abstract: An ATM switch includes a first stage, a second stage and a third stage each of which stages includes at least one basic switch, wherein the first stage, the second stage and the third stage are connected. The basic switch includes a part which refers to time information written in a header of an input cell and switches cells to an output port in an ascending order of the time information. In addition, the ATM switch includes a cell distribution part in the basic switch of the first stage. The cell distribution part determines a routes of a cell to be transferred such that loads of routes within the ATM switch are balanced. The ATM switch further includes an adding part which adds arriving time information to an arriving cell as the time information.Type: GrantFiled: October 22, 2004Date of Patent: January 6, 2009Assignee: Nippon Telegraph and Telephone CorporationInventors: Seisho Yasukawa, Naoki Takaya, Masayoshi Nabeshima, Eiji Oki, Naoaki Yamanaka
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Patent number: 7339935Abstract: An ATM switch includes a first stage, a second stage and a third stage each of which stages includes at least one basic switch, wherein the first stage, the second stage and the third stage are connected. The basic switch includes a part which refers to time information written in a header of an input cell and switches cells to an output port in an ascending order of the time information. In addition, the ATM switch includes a cell distribution part in the basic switch of the first stage. The cell distribution part determines a routes of a cell to be transferred such that loads of routes within the ATM switch are balanced. The ATM switch further includes an adding part which adds arriving time information to an arriving cell as the time information.Type: GrantFiled: October 22, 2004Date of Patent: March 4, 2008Assignee: Nippon Telegraph and Telephone CorporationInventors: Seisho Yasukawa, Naoki Takaya, Masayoshi Nabeshima, Eiji Oki, Naoaki Yamanaka
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Publication number: 20080013465Abstract: A multicast communication path calculation method is disclosed which includes the steps of: obtaining minimum delay paths from a source node to each destination node; selecting, as candidate nodes of a rendezvous point node, nodes on one of the obtained minimum delay paths; for each candidate node, calculating minimum delay paths from the candidate node to each destination node, and obtaining a difference between the maximum value and the minimum value among delays of the calculated minimum delay paths; selecting, as the rendezvous point node, a candidate node by which the difference is smallest; and outputting a minimum delay path from the source node to the rendezvous point node and minimum delay paths from the rendezvous point node to each destination node.Type: ApplicationFiled: July 12, 2007Publication date: January 17, 2008Applicant: NIPPON TELEGRAPH AND TELEPHONE CORP.Inventors: Seisho YASUKAWA, Koji SUGISONO, Masanori UGA
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Patent number: 7292576Abstract: An ATM switch includes a first stage, a second stage and a third stage each of which stages includes at least one basic switch, wherein the first stage, the second stage and the third stage are connected. The basic switch includes a part which refers to time information written in a header of an input cell and switches cells to an output port in an ascending order of the time information. In addition, the ATM switch includes a cell distribution part in the basic switch of the first stage. The cell distribution part determines a routes of a cell to be transferred such that loads of routes within the ATM switch are balanced. The ATM switch further includes an adding part which adds arriving time information to an arriving cell as the time information.Type: GrantFiled: October 22, 2004Date of Patent: November 6, 2007Assignee: Nippon Telegraph and Telephone CorporationInventors: Seisho Yasukawa, Naoki Takaya, Masayoshi Nabeshima, Eiji Oki, Naoaki Yamanaka
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Patent number: 7136391Abstract: An ATM switch includes a first stage, a second stage and a third stage each of which stages includes at least one basic switch, wherein the first stage, the second stage and the third stage are connected. The basic switch includes a part which refers to time information written in a header of an input cell and switches cells to an output port in an ascending order of the time information. In addition, the ATM switch includes a cell distribution part in the basic switch of the first stage. The cell distribution part determines a routes of a cell to be transferred such that loads of routes within the ATM switch are balanced. The ATM switch further includes an adding part which adds arriving time information to an arriving cell as the time information.Type: GrantFiled: August 18, 1999Date of Patent: November 14, 2006Assignee: Nippon Telegraph and Telephone CorporationInventors: Seisho Yasukawa, Naoki Takaya, Masayoshi Nabeshima, Eiji Oki, Naoaki Yamanaka
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Publication number: 20060147204Abstract: A method of establishing a multicast transfer route is disclosed that can reduce the cost of entire route under a constraint on delay incurred between starting point and ending points. The method includes the steps of: computing the shortest route with respect to delay connecting the starting point and the plural ending points based on measurement result; computing delay from a node on the shortest route to each ending point and the greatest delay; removing, if the greatest delay satisfies a delay condition, the greatest-cost route from the shortest route in accordance with selection criteria effective for cost reduction; dividing the multicast transfer route into two route trees; and establishing separately computed route as a complementary route that complement the removed route for connecting the two route trees. A method of multicast label switching for realizing the above method is also disclosed.Type: ApplicationFiled: February 6, 2004Publication date: July 6, 2006Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Seisho Yasukawa, Koji Sugisono, Masanori Uga
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Publication number: 20050083939Abstract: An ATM switch includes a first stage, a second stage and a third stage each of which stages includes at least one basic switch, wherein the first stage, the second stage and the third stage are connected. The basic switch includes a part which refers to time information written in a header of an input cell and switches cells to an output port in an ascending order of the time information. In addition, the ATM switch includes a cell distribution part in the basic switch of the first stage. The cell distribution part determines a routes of a cell to be transferred such that loads of routes within the ATM switch are balanced. The ATM switch further includes an adding part which adds arriving time information to an arriving cell as the time information.Type: ApplicationFiled: October 22, 2004Publication date: April 21, 2005Inventors: Seisho Yasukawa, Naoki Takaya, Masayoshi Nebeshima, Eiji Oki, Naoaki Yamanaka
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Publication number: 20050053067Abstract: An ATM switch includes a first stage, a second stage and a third stage each of which stages includes at least one basic switch, wherein the first stage, the second stage and the third stage are connected. The basic switch includes a part which refers to time information written in a header of an input cell and switches cells to an output port in an ascending order of the time information. In addition, the ATM switch includes a cell distribution part in the basic switch of the first stage. The cell distribution part determines a routes of a cell to be transferred such that loads of routes within the ATM switch are balanced. The ATM switch further includes an adding part which adds arriving time information to an arriving cell as the time information.Type: ApplicationFiled: October 22, 2004Publication date: March 10, 2005Inventors: Seisho Yasukawa, Naoki Takaya, Masayoshi Nabeshima, Eiji Oki, Naoaki Yamanaka
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Publication number: 20050053096Abstract: An ATM switch includes a first stage, a second stage and a third stage each of which stages includes at least one basic switch, wherein the first stage, the second stage and the third stage are connected. The basic switch includes a part which refers to time information written in a header of an input cell and switches cells to an output port in an ascending order of the time information. In addition, the ATM switch includes a cell distribution part in the basic switch of the first stage. The cell distribution part determines a routes of a cell to be transferred such that loads of routes within the ATM switch are balanced. The ATM switch further includes an adding part which adds arriving time information to an arriving cell as the time information.Type: ApplicationFiled: October 22, 2004Publication date: March 10, 2005Inventors: Seisho Yasukawa, Naoki Takaya, Masayoshi Nabeshima, Eiji Oki, Naoaki Yamanaka
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Publication number: 20040218536Abstract: A multicast communication path calculation method is disclosed which includes the steps of: obtaining minimum delay paths from a source node to each destination node; selecting, as candidate nodes of a rendezvous point node, nodes on one of the obtained minimum delay paths; for each candidate node, calculating minimum delay paths from the candidate node to each destination node, and obtaining a difference between the maximum value and the minimum value among delays of the calculated minimum delay paths; selecting, as the rendezvous point node, a candidate node by which the difference is smallest; and outputting a minimum delay path from the source node to the rendezvous point node and minimum delay paths from the rendezvous point node to each destination node.Type: ApplicationFiled: December 10, 2003Publication date: November 4, 2004Applicant: NIPPON TELEGRAPH AND TELEPHONE CORP.Inventors: Seisho Yasukawa, Koji Sugisono, Masanori Uga
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Patent number: 5892604Abstract: An ATM switch includes a plurality of input line corresponding units, a plurality of output line corresponding units, and a wavelength shifting unit. The wavelength shifting unit is arranged between the input line corresponding units and the output line corresponding units to shift optical signals having different wavelengths in a plurality of wavelength-multiplexed optical signals arriving from the input line corresponding units and output the wavelength-multiplexed optical signals. Each input line corresponding unit includes an input-side basic switch for distributing N (N is a positive integer) cells respectively input to input ports to N lines, an electro-optic converter for converting the cells into optical signals having different wavelengths in units of N lines, and a multiplexer for multiplexing the optical signals into one wavelength-multiplexed optical signal.Type: GrantFiled: May 7, 1997Date of Patent: April 6, 1999Assignee: Nippon Telegraph and Telephone CorporationInventors: Naoaki Yamanaka, Kohei Shiomoto, Eiji Oki, Seisho Yasukawa