Patents by Inventor Seiya Inoue
Seiya Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230343566Abstract: A wafer placement includes an alumina substrate having a wafer placement surface at an upper surface, and incorporating an electrode; a brittle cooling substrate which is bonded to a lower surface of the alumina substrate, and in which a refrigerant flow path is formed; and a ductile connection member stored in a storage hole opened in a lower surface of the cooling substrate in a state of restricted axial rotation and in a state of being engaged with an engagement section of the storage hole, the ductile connection member having a male thread section or a female thread section, wherein the storage hole is provided in the refrigerant flow path.Type: ApplicationFiled: February 24, 2023Publication date: October 26, 2023Applicant: NGK Insulators, Ltd.Inventors: Tatsuya KUNO, Seiya INOUE
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Publication number: 20230343565Abstract: A wafer placement table includes: a ceramic substrate having a wafer placement surface at an upper surface, and incorporating an electrode; a cooling substrate which is bonded to a lower surface of the ceramic substrate, and in which a refrigerant flow path is formed; a power supply terminal connected to the electrode; and a power supply terminal hole vertically penetrating the cooling substrate and storing the power supply terminal. The power supply terminal hole intersects with the refrigerant flow path.Type: ApplicationFiled: February 21, 2023Publication date: October 26, 2023Applicant: NGK Insulators, Ltd.Inventors: Tatsuya KUNO, Seiya INOUE
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Publication number: 20230343564Abstract: A wafer placement table includes a ceramic substrate having a wafer placement surface on an upper surface thereof and containing an electrode therein; a conductive substrate disposed adjacent to a lower surface of the ceramic substrate, serving also as a plasma generating electrode, and having the same diameter as the ceramic substrate; a support substrate disposed adjacent to a lower surface of the conductive substrate, having a greater diameter than the conductive substrate, and electrically insulated from the conductive substrate; and a mounting flange constituting a part of the support substrate and radially extending out of the conductive substrate.Type: ApplicationFiled: February 16, 2023Publication date: October 26, 2023Applicant: NGK Insulators, Ltd.Inventors: Seiya INOUE, Tatsuya KUNO
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Publication number: 20230317432Abstract: In a wafer placement table, a cooling plate having a refrigerant flow channel is provided on a bottom surface side of a ceramic plate incorporating an electrode. A gas intermediate passage that is a horizontal space is provided parallel to a wafer placement surface at a location closer to the wafer placement surface than the refrigerant flow channel in the wafer placement table and has an overlapping part that overlaps the refrigerant flow channel along the refrigerant flow channel in plan view.Type: ApplicationFiled: January 20, 2023Publication date: October 5, 2023Applicant: NGK Insulators, Ltd.Inventors: Tatsuya KUNO, Seiya INOUE
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Publication number: 20230317430Abstract: The wafer placement table includes a ceramic plate and a conductive substrate. The ceramic plate includes a plate annular portion at an outer circumference of a plate central portion having a wafer placement surface. The plate annular portion has an annular focus ring placement surface. The conductive substrate is provided on a lower surface of the ceramic plate and used as a radio-frequency source electrode. At the same height from the focus ring placement surface in the plate annular portion, a focus ring attraction electrode and a focus-ring-side radio-frequency bias electrode to which a bias radio frequency is supplied are embedded.Type: ApplicationFiled: February 6, 2023Publication date: October 5, 2023Applicant: NGK Insulators, Ltd.Inventors: Ikuhisa MORIOKA, Hiroshi TAKEBAYASHI, Tatsuya KUNO, Seiya INOUE
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Publication number: 20230317433Abstract: A wafer placement table includes: a ceramic plate having a wafer placement surface on its upper surface and incorporating an electrode; an electrically conductive plate provided on a lower surface side of the ceramic plate; an electrically conductive bonding layer that bonds the ceramic plate with the electrically conductive plate; a gas intermediate passage embedded in the electrically conductive bonding layer or provided at an interface between the electrically conductive bonding layer and the electrically conductive plate; a plurality of gas supply passages extending from the gas intermediate passage through the electrically conductive bonding layer and the ceramic plate to the wafer placement surface; and a gas introduction passage provided so as to extend through the electrically conductive plate and communicate with the gas intermediate passage, the number of the gas introduction passages being smaller than the number of the gas supply passages communicating with the gas intermediate passage.Type: ApplicationFiled: February 9, 2023Publication date: October 5, 2023Applicant: NGK Insulators, Ltd.Inventors: Seiya INOUE, Tatsuya KUNO, Ikuhisa MORIOKA
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Publication number: 20230298861Abstract: A member for semiconductor manufacturing apparatus includes: a ceramic plate having a wafer placement surface on its upper surface; and a porous plug that is disposed in a plug insertion hole penetrating the ceramic plate in a up-down direction, and allows a gas to flow, wherein the porous plug has a first porous member exposed to the wafer placement surface, and a second porous member having an upper surface covered by the first porous member, the first porous member is higher in purity and smaller in thickness than the second porous member, and the second porous member is higher in porosity than the first porous member.Type: ApplicationFiled: November 4, 2022Publication date: September 21, 2023Applicant: NGK Insulators, Ltd.Inventors: Seiya INOUE, Tatsuya KUNO, Tomoki NAGAE, Yusuke OGISO, Takuya YOTO
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Patent number: 11762332Abstract: An image forming apparatus includes a main body, a drum cartridge removably attached to the main body, and a belt unit removably attached to the main body. The main body includes a drum power supply, a belt power supply, and a controller configured to start supplying power from the drum power supply to a drum memory of the drum cartridge, start supplying power from the belt power supply to a belt memory of the belt unit, stop supplying the power from the drum power supply to the drum memory after starting supplying the power from the drum power supply to the drum memory, and stop supplying the power from the belt power supply to the belt memory after starting supplying the power from the belt power supply to the belt memory.Type: GrantFiled: January 10, 2022Date of Patent: September 19, 2023Assignee: Brother Kogyo Kabushiki KaishaInventors: Toshinori Araki, Tatsuro Yokoi, Seiya Sato, Shinta Sugiura, Koji Akagi, Masaaki Wakizaka, Keita Inoue, Osamu Takahashi
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Publication number: 20230290622Abstract: A member for a semiconductor manufacturing apparatus, includes: a base substrate that has a wafer-placement-table support and a focus-ring-placement-table support; a focus-ring placement table that is joined to the focus-ring-placement-table support; a wafer placement table that is separate from the focus-ring placement table, that overlaps an inner peripheral portion of the focus-ring placement table in plan view, and that is joined to the inner peripheral portion of the focus-ring placement table and to the wafer-placement-table support; an internal space that is surrounded by a lower surface of the wafer placement table, an outer peripheral surface of the wafer-placement-table support, an inner peripheral surface of the focus-ring placement table, and an upper surface of the focus-ring-placement-table support; and a communication path that is provided at the base substrate and that causes the internal space and an outside of the base substrate to communicate with each other.Type: ApplicationFiled: January 23, 2023Publication date: September 14, 2023Applicant: NGK Insulators, Ltd.Inventors: Hiroshi TAKEBAYASHI, Tatsuya KUNO, Seiya INOUE
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Publication number: 20230238224Abstract: A member for semiconductor manufacturing apparatus has a ceramic plate, a porous plug, an insulating lid, and pores. The ceramic plate has a wafer placement surface as an upper surface. The porous plug is disposed in a plug insertion hole penetrating the ceramic plate in an up-down direction, and allows a gas to flow. The insulating lid is provided in contact with an upper surface of the porous plug, and exposed to the wafer placement surface. A plurality of pores are provided in the insulating lid, and penetrate the insulating lid in an up-down direction.Type: ApplicationFiled: November 18, 2022Publication date: July 27, 2023Applicant: NGK Insulators, Ltd.Inventors: Seiya INOUE, Tatsuya KUNO, Shinya YOSHIDA, Tomoki NAGAE, Yusuke OGISO, Takuya YOTO
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Publication number: 20230238258Abstract: A wafer placement table includes a ceramic base having a wafer placement surface on its top surface and incorporating an electrode, a cooling base provided on a bottom surface side of the ceramic base, and a refrigerant flow channel groove provided in the cooling base so as to open at a bottom surface of the cooling base.Type: ApplicationFiled: September 1, 2022Publication date: July 27, 2023Applicant: NGK Insulators, Ltd.Inventors: Seiya INOUE, Tatsuya KUNO
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Publication number: 20230223291Abstract: A member for semiconductor manufacturing apparatus includes a ceramic plate that has an upper surface including a wafer placement surface and resin porous plugs that have upper surfaces that are exposed from the wafer placement surface. The resin porous plugs are press-fitted and secured in plug insertion holes that extend through the ceramic plate in an up-down direction and allow gas to flow.Type: ApplicationFiled: October 24, 2022Publication date: July 13, 2023Applicant: NGK Insulators, Ltd.Inventors: Seiya INOUE, Tatsuya KUNO, Natsuki HIRATA
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Publication number: 20230207370Abstract: A member for semiconductor manufacturing apparatus includes: a ceramic plate; a metal joining layer and a cooling plate (conductive substrate) provided at a lower surface of the ceramic plate; a first hole penetrating the ceramic plate in an up-down direction; and a through-hole and a gas hole (second hole) penetrating the conductive substrate in an up-down direction, and communicating with the first hole. A dense insulating case has a bottomed hole 64 opened in a lower surface, and is disposed in the first hole and the second hole. A plurality of microholes penetrates a bottom of the bottomed hole in an up-down direction. A porous plug is disposed in the bottomed hole and in contact with the bottom.Type: ApplicationFiled: November 15, 2022Publication date: June 29, 2023Applicant: NGK Insulators, Ltd.Inventors: Seiya INOUE, Tatsuya KUNO
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Publication number: 20230197500Abstract: A wafer placement table includes a ceramic substrate having a wafer placement surface on an upper surface thereof and containing an electrode therein, a cooling substrate made of a metal-ceramic composite and having a cooling medium passage therein, and a metal joining layer configured to join a lower surface of the ceramic substrate to an upper surface of the cooling substrate. A thickness of a lower part of the cooling substrate below the cooling medium passage is greater than or equal to 13 mm, or greater than or equal to 43% of an overall thickness of the cooling substrate.Type: ApplicationFiled: February 13, 2023Publication date: June 22, 2023Applicant: NGK Insulators, Ltd.Inventors: Seiya INOUE, Hiroshi TAKEBAYASHI, Tatsuya KUNO
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Publication number: 20230197502Abstract: A member for semiconductor manufacturing apparatus includes: a ceramic plate that has an upper surface including a wafer placement surface; a conductive base that is disposed on a lower surface of the ceramic plate; a first hole that extends through the ceramic plate; a second hole that extends through the conductive base; a porous plug that has an upper surface that is exposed from an upper opening of the first hole and a lower surface that is flush with or below an upper surface of the conductive base; an insulating pipe that has an upper surface that is located below the wafer placement surface and a lower surface that is located below the lower surface of the porous plug; and an integrally formed member that is obtained by integrally forming the porous plug and the insulating pipe.Type: ApplicationFiled: December 13, 2022Publication date: June 22, 2023Applicant: NGK Insulators, Ltd.Inventors: Seiya INOUE, Tatsuya KUNO, Kanta MIYAMOTO
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Publication number: 20230170191Abstract: A wafer placement table has a wafer placement surface that allows a wafer to be placed thereon. The wafer placement table includes a ceramic substrate having a built-in electrode, a cooling substrate including a refrigerant flow path, a metal joining layer that joins the ceramic substrate to the cooling substrate, and a plurality of small protrusions disposed on a reference plane of the wafer placement surface. The top surfaces of the small protrusions can support the lower surface of a wafer. The top surfaces of all the small protrusions are located on the same plane. In a flow path overlapping range of the wafer placement surface in which the wafer placement surface overlaps the refrigerant flow path in plan view, an area ratio of the small protrusions is minimized in a portion facing a most upstream portion of the refrigerant flow path.Type: ApplicationFiled: September 14, 2022Publication date: June 1, 2023Applicant: NGK Insulators, Ltd.Inventors: Seiya INOUE, Tatsuya KUNO, Ikuhisa MORIOKA
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Publication number: 20230154781Abstract: A wafer placement table includes an alumina base that has a wafer placement surface on its upper surface, and incorporates an electrode; a brittle cooling base bonded to a lower surface of the alumina base; and a ductile connection member stored in a storage hole, opened in a lower surface of the cooling base, in a state of restricted axial rotation and in a state of engaging with an engagement section of the storage hole, the ductile connection member having a male thread section or a female thread section.Type: ApplicationFiled: July 29, 2022Publication date: May 18, 2023Applicant: NGK Insulators, Ltd.Inventors: Tatsuya KUNO, Seiya INOUE
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Publication number: 20230146815Abstract: A wafer placement table includes a ceramic base having a wafer placement surface on its top surface where a wafer is able to be placed and incorporating an electrode; a cooling base having a refrigerant flow channel; and a bonding layer that bonds the ceramic base with the cooling base, wherein in an area that overlaps the wafer placement surface in plan view of the refrigerant flow channel, a cross-sectional area of the refrigerant flow channel at a most downstream part of the refrigerant flow channel is less than the cross-sectional area at a most upstream part of the refrigerant flow channel.Type: ApplicationFiled: August 15, 2022Publication date: May 11, 2023Applicant: NGK Insulators, Ltd.Inventors: Seiya INOUE, Tatsuya KUNO, Ikuhisa MORIOKA
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Publication number: 20230144107Abstract: A wafer placement table includes a ceramic base having a wafer placement surface on its top surface where a wafer is able to be placed and incorporating an electrode, a cooling base having a refrigerant flow channel, and a bonding layer that bonds the ceramic base with the cooling base, wherein in an area that overlaps the wafer placement surface in plan view of the refrigerant flow channel, a distance from a ceiling surface of the refrigerant flow channel to the wafer placement surface at a most downstream part of the refrigerant flow channel is shorter than the distance at a most upstream part of the refrigerant flow channel.Type: ApplicationFiled: August 10, 2022Publication date: May 11, 2023Applicant: NGK Insulators, Ltd.Inventors: Seiya INOUE, Tatsuya KUNO, Ikuhisa MORIOKA
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Publication number: 20230146001Abstract: A wafer placement table includes a central ceramic base that has an upper surface including a wafer placement surface, an outer circumferential ceramic base that has an upper surface including a focus ring placement surface, and a cooling base that includes a central portion, an outer circumferential portion, and a coupler that couples the central portion and the outer circumferential portion with each other. The cooling base has a central refrigerant flow path that is formed in the central portion and an outer circumferential refrigerant flow path that is formed in the outer circumferential portion. The coupler has an upward groove that open from an upper surface and that have an annular shape, and a downward groove that opens from a lower surface, that have a ceiling surface higher than a bottom surface of the upward groove, and that have an annular shape.Type: ApplicationFiled: August 15, 2022Publication date: May 11, 2023Applicant: NGK Insulators, Ltd.Inventors: Tatsuya KUNO, Seiya INOUE