Patents by Inventor Selcuk Kose

Selcuk Kose has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11573586
    Abstract: A DLDO has a configuration that mitigates performance degradation associated with limit cycle oscillation (LCO). The DLDO comprises a clocked comparator, an array of power transistors, a digital controller and a clock pulsewidth reduction circuit. The digital controller comprises control logic configured to generate control signals that cause the power transistors to be turned ON or OFF in accordance with a preselected activation/deactivation control scheme. The clock pulsewidth reduction circuit receives an input clock signal having a first pulsewidth and generates the DLDO clock signal having the preselected pulsewidth that is narrower that the first pulsewidth, which is then delivered to the clock terminals of the clocked comparator and the digital controller. The narrower pulsewidth of the DLDO clock reduces the LCO mode to mitigate performance degradation caused by LCO.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: February 7, 2023
    Assignees: UNIVERSITY OF SOUTH FLORIDA, REGENTS OF THE UNIVERSITY OF MINNESOTA
    Inventors: Selçuk Köse, Longfei Wang, S. Karen Khatamifard, Ulya R. Karpuzcu
  • Patent number: 11493945
    Abstract: An apparatus and method are provided for mitigating performance degradation in digital low-dropout voltage regulators (DLDOs) caused by the effects of aging on the power transistors of the DLDO, such as by the effects of negative bias temperature instability (NBTI)-induced aging, for example. The apparatus comprises a shift register for use in a DLDO that is configured to activate and deactivate power transistors of the DLDO to evenly distribute electrical stress among the transistors in a way that mitigates performance degradation of the DLDO under various load current conditions. In addition, the shift register and methodology can be implemented in such a way that nearly no extra power and area overhead are consumed.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: November 8, 2022
    Assignees: UNIVERSITY OF SOUTH FLORIDA, REGENTS OF THE UNIVERSITY OF MINNESOTA
    Inventors: Longfei Wang, S. Karen Khatamifard, Ulya R. Karpuzcu, Selçuk Köse
  • Publication number: 20220043473
    Abstract: A DLDO has a configuration that mitigates performance degradation associated with limit cycle oscillation (LCO). The DLDO comprises a clocked comparator, an array of power transistors, a digital controller and a clock pulsewidth reduction circuit. The digital controller comprises control logic configured to generate control signals that cause the power transistors to be turned ON or OFF in accordance with a preselected activation/deactivation control scheme. The clock pulsewidth reduction circuit receives an input clock signal having a first pulsewidth and generates the DLDO clock signal having the preselected pulsewidth that is narrower that the first pulsewidth, which is then delivered to the clock terminals of the clocked comparator and the digital controller. The narrower pulsewidth of the DLDO clock reduces the LCO mode to mitigate performance degradation caused by LCO.
    Type: Application
    Filed: August 24, 2021
    Publication date: February 10, 2022
    Applicant: University of South Florida
    Inventors: Selçuk Köse, Longfei Wang, S. Karen Khatamifard, Ulya R. Karpuzcu
  • Patent number: 11243559
    Abstract: Modern integrated circuits have an increasing need for various levels of both supply voltage (V) and operating frequency (f) available at fine spatial and temporal granularity. This work introduces a solution that provides a number and quality of locally distributed V/f domains through FOPAC. Opportunistically sharing design resources and features between multi-phase voltage regulators (MPVRs) and resonant rotary clocks (ReRoCs) enabling i) the scalability to hundreds of domains, ii) fast switching times for both voltage and frequency, leading to temporal flexibility, and iii) locally distributed designs, leading to spatial flexibility.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: February 8, 2022
    Assignee: Drexel University
    Inventors: Baris Taskin, Ragh Kuttappa, Selcuk Kose
  • Patent number: 11099591
    Abstract: A DLDO has a configuration that mitigates performance degradation associated with limit cycle oscillation (LCO). The DLDO comprises a clocked comparator, an array of power transistors, a digital controller and a clock pulsewidth reduction circuit. The digital controller comprises control logic configured to generate control signals that cause the power transistors to be turned ON or OFF in accordance with a preselected activation/deactivation control scheme. The clock pulsewidth reduction circuit receives an input clock signal having a first pulsewidth and generates the DLDO clock signal having the preselected pulsewidth that is narrower that the first pulsewidth, which is then delivered to the clock terminals of the clocked comparator and the digital controller. The narrower pulsewidth of the DLDO clock reduces the LCO mode to mitigate performance degradation caused by LCO.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: August 24, 2021
    Assignee: UNIVERSITY OF SOUTH FLORIDA
    Inventors: Selçuk Köse, Longfei Wang, S. Karen Khatamifard, Ulya R. Karpuzcu
  • Patent number: 11050449
    Abstract: A system and method for frame structure compliant adaptive extensionless windowing that maximizes fair proportional network capacity in the download. Gains are provided by emulating the multipath multiple access channel to the base station to calculate almost-optimum transmitter windowing durations prior to transmission and using the variance of received symbols using different window durations to allow the user equipment nodes to estimate optimal receiver windowing durations without calculations requiring further knowledge about the network.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: June 29, 2021
    Assignee: University of South Florida
    Inventors: Berker Pekoz, Selcuk Kose, Huseyin Arslan
  • Publication number: 20210034094
    Abstract: Modern integrated circuits have an increasing need for various levels of both supply voltage (V) and operating frequency (f) available at fine spatial and temporal granularity. This work introduces a solution that provides a number and quality of locally distributed V/f domains through FOPAC. Opportunistically sharing design resources and features between multi-phase voltage regulators (MPVRs) and resonant rotary clocks (ReRoCs) enabling i) the scalability to hundreds of domains, ii) fast switching times for both voltage and frequency, leading to temporal flexibility, and iii) locally distributed designs, leading to spatial flexibility.
    Type: Application
    Filed: May 29, 2020
    Publication date: February 4, 2021
    Applicants: Drexel University, University of South Florida
    Inventors: Baris Taskin, Ragh Kuttappa, Selcuk Kose
  • Patent number: 10873446
    Abstract: Methods and systems are provided for single false key-controlled (SFKC) aggressive voltage scaling (AVS) and multiple parallel false key controlled (MPFKC) AVS countermeasure systems. When a plaintext value is input into a cryptographic circuit for modification by a correct key, power supplied to the cryptographic circuit is scaled based on a result of the plaintext value modified by a false key or by a random number of parallel false keys, which occurs during every clock cycle. The scaling may be triggered when the operating frequency of the cryptographic circuit falls below a threshold, which indicates occurrence of a leakage power attack. A key that is detectable within a power trace of the scaled power provided to the cryptographic circuit, with a highest correlation coefficient relative to a known key, is a key other than the correct key. The MPFKC AVS technique also inhibits unriddling of the input power scaling scheme.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: December 22, 2020
    Assignee: UNIVERSITY OF SOUTH FLORIDA
    Inventors: Selcuk Kose, Weize Yu
  • Patent number: 10691836
    Abstract: Methods and systems are provided for a charge withholding converter reshuffling technique that decorrelates input power of a multi-phase switched capacitor (SC) voltage converter relative to the output power provided to a load. The load may be a cryptographic device. The technique provides a countermeasure against power analysis attacks. A controller including a first random number generator coupled to the stages of the SC voltage converter controls gating for charging a first subset of the stages. A controller including a second random number generator coupled the stages of the SC voltage converter controls gating for discharging a second subset the stages. A number of the switched capacitor stages maintain their charge beyond the switch period in which they are charged. The SC voltage converter withholds a random portion of input charge and delivers this charge to the load after a random time period.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: June 23, 2020
    Assignee: University of South Florida
    Inventors: Selcuk Kose, Weize Yu
  • Patent number: 10680797
    Abstract: Methods and systems are provided for a security adaptive (SA) voltage converter that receives input power from a power source and provides power to a cryptographic system. The SA voltage converter triggers countermeasures against leakage power analysis (LPA) attacks that slow down an operating frequency of the cryptographic circuit. When an LPA attack is detected, a discharging resistor sinks redundant current to alter the signature of load power dissipation of at the input to the SA voltage converter system. The SA voltage converter includes a converter reshuffling converter. The power dissipation induced by the discharging resistor, as measured at the input received from the power source, is scrambled by the SA voltage converter to increase noise inserted into the input power and to alter the power profile that is measured for the cryptographic circuit.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: June 9, 2020
    Assignee: University of South Florida
    Inventors: Selcuk Kose, Weize Yu
  • Patent number: 10644771
    Abstract: A system and method for increasing the capacity of a Multiple-Input Multiple-Output (MIMO) system at desired user's locations and reducing the capacity at locations, other than that of the desired user, while also providing secrecy. Knowing the channel coefficient between each transmitter and receiver antenna pair at the transmitter, the method of the present invention calculates the artificial signal that minimizes the Euclidean distance between the desired and received data symbols if the precoding/combining matrix pair from the set that has the minimum Euclidean distance to the singular value decomposition (SVD) of the channel matrix is used for transmission and reception. The artificial signal may be fed to the precoder, instead of the actual desired data symbols, or may be transmitted directly to reduce computational complexity, power consumption and processing delay if the hardware configuration allows.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: May 5, 2020
    Assignee: University of South Florida
    Inventors: Berker Pekoz, Mohammed Hafez, Selcuk Kose, Huseyin Arslan
  • Publication number: 20200106495
    Abstract: A system and method for increasing the capacity of a Multiple-Input Multiple-Output (MIMO) system at desired user's locations and reducing the capacity at locations, other than that of the desired user, while also providing secrecy. Knowing the channel coefficient between each transmitter and receiver antenna pair at the transmitter, the method of the present invention calculates the artificial signal that minimizes the Euclidean distance between the desired and received data symbols if the precoding/combining matrix pair from the set that has the minimum Euclidean distance to the singular value decomposition (SVD) of the channel matrix is used for transmission and reception. The artificial signal may be fed to the precoder, instead of the actual desired data symbols, or may be transmitted directly to reduce computational complexity, power consumption and processing delay if the hardware configuration allows.
    Type: Application
    Filed: December 3, 2019
    Publication date: April 2, 2020
    Applicant: University of South Florida
    Inventors: Berker Pekoz, Mohammed Hafez, Selcuk Kose, Huseyin Arslan
  • Patent number: 10547489
    Abstract: System and method based upon an OFDM symbol, including a cyclic prefix (CP), that is received after being transmitted over a multiple access channel, wherein the CP is removed, and a Hann window is applied to the symbol. FFT is then applied to the Hann windowed symbol to obtain the frequency domain subcarriers. The pilot symbols are filtered accordingly to obtain Hann windowed pilots to estimate effective channel. Inter-carrier interference is calculated and removed.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: January 28, 2020
    Assignee: University of South Florida
    Inventors: Berker Pekoz, Zekeriyya Esat Ankarali, Selcuk Kose, Huseyin Arslan
  • Patent number: 10516452
    Abstract: A system and method for increasing the capacity of a Multiple-Input Multiple-Output (MIMO) system at desired user's locations and reducing the capacity at locations, other than that of the desired user, while also providing secrecy. Knowing the channel coefficient between each transmitter and receiver antenna pair at the transmitter, the method of the present invention calculates the artificial signal that minimizes the Euclidean distance between the desired and received data symbols if the precoding/combining matrix pair from the set that has the minimum Euclidean distance to the singular value decomposition (SVD) of the channel matrix is used for transmission and reception. The artificial signal may be fed to the precoder, instead of the actual desired data symbols, or may be transmitted directly to reduce computational complexity, power consumption and processing delay if the hardware configuration allows.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: December 24, 2019
    Assignee: University of South Florida
    Inventors: Berker Pekoz, Mohammed Hafez, Selcuk Kose, Huseyin Arslan
  • Patent number: 10511338
    Abstract: A system and method for adaptively utilizing transmitter windowing, receiver windowing and alignment signals for minimizing interference and maximizing capacity and energy efficiency based upon the received power ratios of links in adjacent bands of a cellular communication network.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: December 17, 2019
    Assignee: University of South Florida
    Inventors: Berker Pekoz, Selcuk Kose, Huseyin Arslan
  • Publication number: 20190379430
    Abstract: A system and method for increasing the capacity of a Multiple-Input Multiple-Output (MIMO) system at desired user's locations and reducing the capacity at locations, other than that of the desired user, while also providing secrecy. Knowing the channel coefficient between each transmitter and receiver antenna pair at the transmitter, the method of the present invention calculates the artificial signal that minimizes the Euclidean distance between the desired and received data symbols if the precoding/combining matrix pair from the set that has the minimum Euclidean distance to the singular value decomposition (SVD) of the channel matrix is used for transmission and reception. The artificial signal may be fed to the precoder, instead of the actual desired data symbols, or may be transmitted directly to reduce computational complexity, power consumption and processing delay if the hardware configuration allows.
    Type: Application
    Filed: January 3, 2019
    Publication date: December 12, 2019
    Applicant: University of South Florida
    Inventors: Berker Pekoz, Mohammed Hafez, Selcuk Kose, Huseyin Arslan
  • Patent number: 10476705
    Abstract: Adaptive windowing of insufficient cyclic prefix (CP) for joint minimization of intersymbol interference (ISI) and adjacent channel interference (ACI) is provided. The proposed subcarrier specific windowing scheme improves the signal-to-interference ratio (SIR) even when the cyclic prefix (CP) is insufficient. Average optimal window lengths depend only on the power density profiles (PDPs), and although instantaneous optimal window lengths depend on users' channel impulse responses (CIRs), fluctuation is little. Therefore, subcarrier specific windowing outperforms fixed windowing, even with outdated window lengths in the case of powerful interferers.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: November 12, 2019
    Assignee: University of South Florida
    Inventors: Berker Pekoz, Selcuk Kose, Huseyin Arslan
  • Publication number: 20190288901
    Abstract: System and method based upon an OFDM symbol, including a cyclic prefix (CP), that is received after being transmitted over a multiple access channel, wherein the CP is removed, and a Hann window is applied to the symbol. FFT is then applied to the Hann windowed symbol to obtain the frequency domain subcarriers. The pilot symbols are filtered accordingly to obtain Hann windowed pilots to estimate effective channel. Inter-carrier interference is calculated and removed.
    Type: Application
    Filed: January 8, 2019
    Publication date: September 19, 2019
    Applicant: University of South Florida
    Inventors: Berker Pekoz, Zekeriyya Esat Ankarali, Selcuk Kose, Huseyin Arslan
  • Publication number: 20190280905
    Abstract: Adaptive windowing of insufficient cyclic prefix (CP) for joint minimization of intersymbol interference (ISI) and adjacent channel interference (ACI) is provided. The proposed subcarrier specific windowing scheme improves the signal-to-interference ratio (SIR) even when the cyclic prefix (CP) is insufficient. Average optimal window lengths depend only on the power density profiles (PDPs), and although instantaneous optimal window lengths depend on users' channel impulse responses (CIRs), fluctuation is little. Therefore, subcarrier specific windowing outperforms fixed windowing, even with outdated window lengths in the case of powerful interferers.
    Type: Application
    Filed: May 20, 2019
    Publication date: September 12, 2019
    Applicant: University of South Florida
    Inventors: Berker Pekoz, Selcuk Kose, Huseyin Arslan
  • Patent number: 10348530
    Abstract: Adaptive windowing of insufficient cyclic prefix (CP) for joint minimization of intersymbol interference (ISI) and adjacent channel interference (ACI) is provided. The proposed subcarrier specific windowing scheme improves the signal-to-interference ratio (SIR) even when the cyclic prefix (CP) is insufficient. Average optimal window lengths depend only on the power density profiles (PDPs), and although instantaneous optimal window lengths depend on users' channel impulse responses (CIRs), fluctuation is little. Therefore, subcarrier specific windowing outperforms fixed windowing, even with outdated window lengths in the case of powerful interferers.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: July 9, 2019
    Assignee: University of South Florida
    Inventors: Berker Pekoz, Selcuk Kose, Huseyin Arslan