Patents by Inventor Senaka Krishna Kanakamedala

Senaka Krishna Kanakamedala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9570460
    Abstract: A method of making a semiconductor device includes forming a stack of alternating layers of a first material and a second material over a substrate, etching the stack to form at least one opening in the stack such that a damaged region is located on a bottom surface of the at least one opening, forming a masking layer on a sidewall of the at least one opening while the bottom surface of the at least one opening is not covered by the masking layer, and further etching the bottom surface of the at least one opening remove the damaged region.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: February 14, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Senaka Krishna Kanakamedala, Yao-Sheng Lee, Raghuveer S. Makala, George Matamis
  • Patent number: 9484357
    Abstract: A plurality of blocking dielectric portions can be formed between a memory stack structure and an alternating stack of first material layers and second material layers by selective deposition of a dielectric material layer. The plurality of blocking dielectric portions can be formed after removal of the second material layers selective to the first material layers by depositing a dielectric material on surfaces of the memory stack structure while avoiding deposition on surfaces of the first material layers. A deposition inhibitor material layer or a deposition promoter material layer can be optionally employed. Alternatively, the plurality of blocking dielectric portions can be formed on surfaces of the second material layers while avoiding deposition on surfaces of the first material layers after formation of the memory opening and prior to formation of the memory stack structure. The plurality of blocking dielectric portions are vertically spaced annular structures.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: November 1, 2016
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Raghuveer S. Makala, Rahul Sharangpani, Senaka Krishna Kanakamedala, Xiaofeng Liang, George Matamis, Sateesh Koka, Johann Alsmeier
  • Patent number: 9397107
    Abstract: A method of making a three dimensional NAND string includes providing a stack of alternating first material layers and second material layers over a substrate. The method further includes forming a front side opening in the stack, forming a tunnel dielectric in the front side opening, forming a semiconductor channel in the front side opening over the tunnel dielectric and forming a back side opening in the stack. The method also includes selectively removing the second material layers through the back side opening to form back side recesses between adjacent first material layers, forming a metal charge storage layer in the back side opening and in the back side recesses and forming discrete charge storage regions in the back side recesses by removing the metal charge storage layer from the back side opening and selectively recessing the metal charge storage layer in the back side recesses.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: July 19, 2016
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Raghuveer S. Makala, Yao-Sheng Lee, Senaka Krishna Kanakamedala, Yanli Zhang, George Matamis, Johann Alsmeier
  • Publication number: 20160172370
    Abstract: A plurality of blocking dielectric portions can be formed between a memory stack structure and an alternating stack of first material layers and second material layers by selective deposition of a dielectric material layer. The plurality of blocking dielectric portions can be formed after removal of the second material layers selective to the first material layers by depositing a dielectric material on surfaces of the memory stack structure while avoiding deposition on surfaces of the first material layers. A deposition inhibitor material layer or a deposition promoter material layer can be optionally employed. Alternatively, the plurality of blocking dielectric portions can be formed on surfaces of the second material layers while avoiding deposition on surfaces of the first material layers after formation of the memory opening and prior to formation of the memory stack structure. The plurality of blocking dielectric portions are vertically spaced annular structures.
    Type: Application
    Filed: December 16, 2014
    Publication date: June 16, 2016
    Inventors: Raghuveer S. MAKALA, Rahul SHARANGPANI, Senaka Krishna KANAKAMEDALA, Xiaofeng LIANG, George MATAMIS, Sateesh KOKA, Johann ALSMEIER
  • Publication number: 20160148945
    Abstract: A method of making a monolithic three dimensional NAND string including forming a stack of alternating layers of insulating first material and sacrificial second material different from the first material over a major surface of the substrate, forming a front side opening in the stack, forming at least one charge storage region in the front side opening and forming a tunnel dielectric layer over the at least one charge storage region in front side opening. The method also includes forming a semiconductor channel over the tunnel dielectric layer in the front side opening, forming a back side opening in the stack and selectively removing at least portions of the second material layers to form back side recesses between adjacent first material layers.
    Type: Application
    Filed: November 25, 2014
    Publication date: May 26, 2016
    Inventors: Rahul SHARANGPANI, Raghuveer S. MAKALA, Senaka Krishna KANAKAMEDALA, Sateesh KOKA, Yao-Sheng LEE, George MATAMIS
  • Patent number: 9305932
    Abstract: A method of making a monolithic three dimensional NAND string includes providing a first stack of alternating first material layers and second material layers over a major surface of a substrate. The first material layers include first silicon oxide layers, the second material layers include second silicon oxide layers, and the first silicon oxide layers have a different etch rate from the second silicon oxide when exposed to the same etching medium. The first stack includes a back side opening, a front side opening, and at least a portion of a floating gate layer, a tunnel dielectric and a semiconductor channel located in the front side opening. The method also includes selectively removing the first material layers through the back side opening to form back side control gate recesses between adjacent second material layers.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: April 5, 2016
    Assignee: SANDISK TECHNOLOGIES INC.
    Inventors: Senaka Krishna Kanakamedala, Yanli Zhang, Raghuveer S. Makala, Yao-Sheng Lee, Johann Alsmeier, George Matamis
  • Publication number: 20160064532
    Abstract: Methods of making a monolithic three dimensional NAND string that include forming a stack of alternating first material layers and second material layers over a substrate, where each of the second material layers includes a layer of a first silicon oxide material between two layers of a second silicon oxide material different from the first silicon oxide material, etching the stack to form a front side opening in the stack, forming a memory film over a sidewall of the front side opening, and forming a semiconductor channel in the front side opening such that at least a portion of the memory film is located between the semiconductor channel and the sidewall of the front side opening, where at least one of an air gap or a material which has a dielectric constant below 3.9 is formed between the respective two layers of second silicon oxide material.
    Type: Application
    Filed: August 26, 2014
    Publication date: March 3, 2016
    Inventors: Raghuveer S. MAKALA, Yanli ZHANG, Rahul SHARANGPANI, Yao-Sheng LEE, Senaka Krishna KANAKAMEDALA, George MATAMIS, Johann ALSMEIER
  • Publication number: 20160035742
    Abstract: A method of making a semiconductor device includes forming a stack of alternating layers of a first material and a second material over a substrate, etching the stack to form at least one opening in the stack such that a damaged region is located on a bottom surface of the at least one opening, forming a masking layer on a sidewall of the at least one opening while the bottom surface of the at least one opening is not covered by the masking layer, and further etching the bottom surface of the at least one opening remove the damaged region.
    Type: Application
    Filed: February 12, 2015
    Publication date: February 4, 2016
    Inventors: Senaka Krishna KANAKAMEDALA, Yao-Sheng LEE, Raghuveer S. MAKALA, George MATAMIS
  • Publication number: 20150380423
    Abstract: A method of making a monolithic three dimensional NAND string includes providing a first stack of alternating first material layers and second material layers over a major surface of a substrate. The first material layers include first silicon oxide layers, the second material layers include second silicon oxide layers, and the first silicon oxide layers have a different etch rate from the second silicon oxide when exposed to the same etching medium. The first stack includes a back side opening, a front side opening, and at least a portion of a floating gate layer, a tunnel dielectric and a semiconductor channel located in the front side opening. The method also includes selectively removing the first material layers through the back side opening to form back side control gate recesses between adjacent second material layers.
    Type: Application
    Filed: June 30, 2014
    Publication date: December 31, 2015
    Inventors: Senaka Krishna Kanakamedala, Yanli Zhang, Raghuveer S. Makala, Yao-Sheng Lee, Johann Alsmeier, George Matamis
  • Publication number: 20150380424
    Abstract: A method of making a three dimensional NAND string includes providing a stack of alternating first material layers and second material layers over a substrate. The method further includes forming a front side opening in the stack, forming a tunnel dielectric in the front side opening, forming a semiconductor channel in the front side opening over the tunnel dielectric and forming a back side opening in the stack. The method also includes selectively removing the second material layers through the back side opening to form back side recesses between adjacent first material layers, forming a metal charge storage layer in the back side opening and in the back side recesses and forming discrete charge storage regions in the back side recesses by removing the metal charge storage layer from the back side opening and selectively recessing the metal charge storage layer in the back side recesses.
    Type: Application
    Filed: June 30, 2014
    Publication date: December 31, 2015
    Inventors: Raghuveer S. Makala, Yao-Sheng Lee, Senaka Krishna Kanakamedala, Yanli Zhang, George Matamis, Johann Alsmeier
  • Patent number: 9159739
    Abstract: A monolithic three dimensional NAND string includes a semiconductor channel, with at least one end portion of the semiconductor channel extending substantially perpendicular to a major surface of a substrate, and a plurality of copper containing control gate electrodes extending substantially parallel to the major surface of the substrate. The plurality of control gate electrodes include at least a first control gate electrode located in a first device level and a second control gate electrode located in a second device level located over the major surface of the substrate and below the first device level. The NAND string also includes a blocking dielectric located over the plurality of control gates, a tunnel dielectric in contact with the semiconductor channel, and at least one charge storage region located between the blocking dielectric and the tunnel dielectric.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: October 13, 2015
    Assignee: SANDISK TECHNOLOGIES INC.
    Inventors: Raghuveer S. Makala, Yanli Zhang, Yao-Sheng Lee, Senaka Krishna Kanakamedala, Rahul Sharangpani, George Matamis, Johann Alsmeier, Seiji Shimabukuro, Genta Mizuno, Naoki Takeguchi
  • Publication number: 20150179662
    Abstract: A memory film and a semiconductor channel can be formed within each memory opening that extends through a stack including an alternating plurality of insulator layers and sacrificial material layers. After formation of backside recesses through removal of the sacrificial material layers selective to the insulator layers, a metallic barrier material portion can be formed in each backside recess. A cobalt portion can be formed in each backside recess. Each backside recess can be filled with a cobalt portion alone, or can be filled with a combination of a cobalt portion and a metallic material portion including a material other than cobalt.
    Type: Application
    Filed: February 4, 2015
    Publication date: June 25, 2015
    Inventors: Raghuveer S. MAKALA, Rahul SHARANGPANI, Sateesh KOKA, Genta MIZUNO, Naoki TAKEGUCHI, Senaka Krishna KANAKAMEDALA, George MATAMIS, Yao-Sheng LEE, Johann ALSMEIER
  • Publication number: 20140353738
    Abstract: A method of making a monolithic three dimensional NAND string including providing a stack of alternating first material layers and second material layers over a substrate. The first material layers comprise an insulating material and the second material layers comprise sacrificial layers. The method also includes forming a back side opening in the stack, selectively removing the second material layers through the back side opening to form back side recesses between adjacent first material layers and forming a blocking dielectric inside the back side recesses and the back side opening. The blocking dielectric has a clam shaped regions inside the back side recesses. The method also includes forming a plurality of copper control gate electrodes in the respective clam shell shaped regions of the blocking dielectric in the back side recesses.
    Type: Application
    Filed: August 20, 2014
    Publication date: December 4, 2014
    Inventors: Raghuveer S. Makala, Yanli Zhang, Yao-Sheng Lee, Senaka Krishna Kanakamedala, Rahul Sharangpani, George Matamis, Johann Alsmeier, Seiji Shimabukuro, Genta Mizuno, Naoki Takeguchi