Patents by Inventor Sensho USAMI
Sensho USAMI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11069655Abstract: A semiconductor device includes a composite chip mounted over a wiring substrate, the composite chip including a first area, a second area that is provided independently from the first area, and a third area including a first material between the first and second areas. The first area includes a first circuit formed in the first area, and the second area includes a second circuit formed in the second area. The first area is spaced apart from the second area by the first material.Type: GrantFiled: November 17, 2017Date of Patent: July 20, 2021Assignee: Micron Technology, Inc.Inventors: Sensho Usami, Kazuhiko Shibata, Yutaka Kagaya
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Patent number: 10537018Abstract: One semiconductor device includes a wiring substrate, a first semiconductor chip that is mounted on one surface of the wiring substrate, a second semiconductor chip that is laminated on the first semiconductor chip so as to form exposed surfaces where the surface of the first semiconductor chip is partially exposed, silicon substrates that are mounted on the exposed surfaces and serve as warping control members, and an encapsulation body that is formed on the wiring substrate so as to cover the first semiconductor chip, the second semiconductor chip and the silicon substrates.Type: GrantFiled: April 24, 2019Date of Patent: January 14, 2020Assignee: Longitude Licensing LimitedInventor: Sensho Usami
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Patent number: 10431556Abstract: A semiconductor chip 10 flip-chip mounted on a first surface 32 of a wiring substrate 30, a semiconductor chip 20 flip-chip mounted on a second surface 33 of the wiring substrate 30, a sealing resin 71 covering the semiconductor chip 10, a sealing resin 72 covering the semiconductor chip 20, a plurality of conductive posts provided to penetrate through the sealing resin 72, and a plurality of solder balls mounted on second ends of the plurality of conductive posts exposed from the sealing resin 72 are provided; and the mounting directions of the semiconductor chips 10 and 20 are mutually different by 90°. Both of the planar shapes of the semiconductor chips 10 and 20 are rectangular shapes, the semiconductor chip 10 is mounted so that the long sides thereof are parallel to the long sides of the wiring substrate 30, and the semiconductor chip 20 is mounted so that the long sides thereof are perpendicular to the long sides of the wiring substrate 30.Type: GrantFiled: September 8, 2017Date of Patent: October 1, 2019Assignee: Micron Technology, Inc.Inventors: Sensho Usami, Koji Hosokawa
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Publication number: 20190254160Abstract: One semiconductor device includes a wiring substrate, a first semiconductor chip that is mounted on one surface of the wiring substrate, a second semiconductor chip that is laminated on the first semiconductor chip so as to form exposed surfaces where the surface of the first semiconductor chip is partially exposed, silicon substrates that are mounted on the exposed surfaces and serve as warping control members, and an encapsulation body that is formed on the wiring substrate so as to cover the first semiconductor chip, the second semiconductor chip and the silicon substrates.Type: ApplicationFiled: April 24, 2019Publication date: August 15, 2019Inventor: Sensho Usami
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Patent number: 10342118Abstract: One semiconductor device includes a wiring substrate, a first semiconductor chip that is mounted on one surface of the wiring substrate, a second semiconductor chip that is laminated on the first semiconductor chip so as to form exposed surfaces where the surface of the first semiconductor chip is partially exposed, silicon substrates that are mounted on the exposed surfaces and serve as warping control members, and an encapsulation body that is formed on the wiring substrate so as to cover the first semiconductor chip, the second semiconductor chip and the silicon substrates.Type: GrantFiled: March 20, 2014Date of Patent: July 2, 2019Assignee: LONGITUDE LICENSING LIMITEDInventor: Sensho Usami
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Publication number: 20180076173Abstract: A semiconductor device includes a composite chip mounted over the a wiring substrate, the composite chip including a first area, a second area that is provided independently from the first area, and a third area including a first material between the first and second areas. the first area including a first circuit formed in the first area, and the second area including a second circuit formed in the second area. The first area is spaced apart from the second area by the first material.Type: ApplicationFiled: November 17, 2017Publication date: March 15, 2018Inventors: Sensho Usami, Kazuhiko Shibata, Yutaka Kagaya
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Publication number: 20170373021Abstract: A semiconductor chip 10 flip-chip mounted on a first surface 32 of a wiring substrate 30, a semiconductor chip 20 flip-chip mounted on a second surface 33 of the wiring substrate 30, a sealing resin 71 covering the semiconductor chip 10, a sealing resin 72 covering the semiconductor chip 20, a plurality of conductive posts provided to penetrate through the sealing resin 72, and a plurality of solder balls mounted on second ends of the plurality of conductive posts exposed from the sealing resin 72 are provided; and the mounting directions of the semiconductor chips 10 and 20 are mutually different by 90°. Both of the planar shapes of the semiconductor chips 10 and 20 are rectangular shapes, the semiconductor chip 10 is mounted so that the long sides thereof are parallel to the long sides of the wiring substrate 30, and the semiconductor chip 20 is mounted so that the long sides thereof are perpendicular to the long sides of the wiring substrate 30.Type: ApplicationFiled: September 8, 2017Publication date: December 28, 2017Inventors: Sensho Usami, Koji Hosokawa
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Patent number: 9837377Abstract: A semiconductor device includes a composite chip mounted over the a wiring substrate, the composite chip including a first area and a second area that is provided independently from the first area, the first area including a first circuit formed in the first area, and the second area including a second circuit formed in the second area.Type: GrantFiled: October 21, 2014Date of Patent: December 5, 2017Assignee: Micron Technology, Inc.Inventors: Sensho Usami, Kazuhiko Shibata, Yutaka Kagaya
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Patent number: 9799611Abstract: A semiconductor chip 10 flip-chip mounted on a first surface 32 of a wiring substrate 30, a semiconductor chip 20 flip-chip mounted on a second surface 33 of the wiring substrate 30, a sealing resin 71 covering the semiconductor chip 10, a sealing resin 72 covering the semiconductor chip 20, a plurality of conductive posts provided to penetrate through the sealing resin 72, and a plurality of solder balls mounted on second ends of the plurality of conductive posts exposed from the sealing resin 72 are provided; and the mounting directions of the semiconductor chips 10 and 20 are mutually different by 90°. Both of the planar shapes of the semiconductor chips 10 and 20 are rectangular shapes, the semiconductor chip 10 is mounted so that the long sides thereof are parallel to the long sides of the wiring substrate 30, and the semiconductor chip 20 is mounted so that the long sides thereof are perpendicular to the long sides of the wiring substrate 30.Type: GrantFiled: August 5, 2016Date of Patent: October 24, 2017Assignee: Micron Technology, Inc.Inventors: Sensho Usami, Koji Hosokawa
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Patent number: 9748204Abstract: According to the present invention, a semiconductor device includes a substrate including a first surface and a second surface opposite to the first surface, a first layer formed over the first surface, a second layer thicker than the first layer formed over the first portion of the first layer, the first and second layers being formed of a same material, a first semiconductor chip mounted over a second portion of the first layer; and a second semiconductor chip commonly mounted over the first semiconductor chip and the second layer.Type: GrantFiled: August 24, 2015Date of Patent: August 29, 2017Assignee: Micron Technology, Inc.Inventors: Sensho Usami, Koji Hosokawa
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Patent number: 9601447Abstract: A semiconductor chip at least includes a row of first electrode pad group, which includes at least one first independent electrode pad and multiple first common electrode pads. The interval between the first independent electrode pad and an electrode pad adjacent thereto is defined as “first pitch”, and the interval between adjacent electrode pads making up the multiple first common electrode pads is defined as “second pitch”. The first pitch is determined to be larger than the second pitch.Type: GrantFiled: May 15, 2015Date of Patent: March 21, 2017Assignee: Micron Technology, Inc.Inventor: Sensho Usami
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Publication number: 20170005020Abstract: A sample semiconductor device is manufactured and the curvature of the sample is measured. An area is set to be removed from an encapsulation resin layer on the basis of the measurement value. After forming the encapsulation resin layer during the process of manufacturing the semiconductor device, the removal area is removed.Type: ApplicationFiled: July 11, 2016Publication date: January 5, 2017Inventor: Sensho Usami
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Publication number: 20160343675Abstract: A semiconductor chip 10 flip-chip mounted on a first surface 32 of a wiring substrate 30, a semiconductor chip 20 flip-chip mounted on a second surface 33 of the wiring substrate 30, a sealing resin 71 covering the semiconductor chip 10, a sealing resin 72 covering the semiconductor chip 20, a plurality of conductive posts provided to penetrate through the sealing resin 72, and a plurality of solder balls mounted on second ends of the plurality of conductive posts exposed from the sealing resin 72 are provided; and the mounting directions of the semiconductor chips 10 and 20 are mutually different by 90°. Both of the planar shapes of the semiconductor chips 10 and 20 are rectangular shapes, the semiconductor chip 10 is mounted so that the long sides thereof are parallel to the long sides of the wiring substrate 30, and the semiconductor chip 20 is mounted so that the long sides thereof are perpendicular to the long sides of the wiring substrate 30.Type: ApplicationFiled: August 5, 2016Publication date: November 24, 2016Inventors: Sensho Usami, Koji Hosokawa
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Patent number: 9418907Abstract: A sample semiconductor device is manufactured and the curvature of the sample is measured. An area is set to be removed from an encapsulation resin layer on the basis of the measurement value. After forming the encapsulation resin layer during the process of manufacturing the semiconductor device, the removal area is removed.Type: GrantFiled: January 17, 2014Date of Patent: August 16, 2016Assignee: PS5 LUXCO S.A.R.L.Inventor: Sensho Usami
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Patent number: 9418968Abstract: A semiconductor chip 10 flip-chip mounted on a first surface 32 of a wiring substrate 30, a semiconductor chip 20 flip-chip mounted on a second surface 33 of the wiring substrate 30, a sealing resin 71 covering the semiconductor chip 10, a sealing resin 72 covering the semiconductor chip 20, a plurality of conductive posts provided to penetrate through the sealing resin 72, and a plurality of solder balls mounted on second ends of the plurality of conductive posts exposed from the sealing resin 72 are provided; and the mounting directions of the semiconductor chips 10 and 20 are mutually different by 90°. Both of the planar shapes of the semiconductor chips 10 and 20 are rectangular shapes, the semiconductor chip 10 is mounted so that the long sides thereof are parallel to the long sides of the wiring substrate 30, and the semiconductor chip 20 is mounted so that the long sides thereof are perpendicular to the long sides of the wiring substrate 30.Type: GrantFiled: March 25, 2015Date of Patent: August 16, 2016Assignee: Micron Technology, Inc.Inventors: Sensho Usami, Koji Hosokawa
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Publication number: 20160064358Abstract: According to the present invention, a semiconductor device includes a substrate including a first surface and a second surface opposite to the first surface, a first layer formed over the first surface, a second layer thicker than the first layer formed over the first portion of the first layer, the first and second layers being formed of a same material, a first semiconductor chip mounted over a second portion of the first layer; and a second semiconductor chip commonly mounted over the first semiconductor chip and the second layer.Type: ApplicationFiled: August 24, 2015Publication date: March 3, 2016Inventors: Sensho Usami, Koji Hosokawa
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Publication number: 20160050748Abstract: One semiconductor device includes a wiring substrate, a first semiconductor chip that is mounted on one surface of the wiring substrate, a second semiconductor chip that is laminated on the first semiconductor chip so as to form exposed surfaces where the surface of the first semiconductor chip is partially exposed, silicon substrates that are mounted on the exposed surfaces and serve as warping control members, and an encapsulation body that is formed on the wiring substrate so as to cover the first semiconductor chip, the second semiconductor chip and the silicon substrates.Type: ApplicationFiled: March 20, 2014Publication date: February 18, 2016Inventor: Sensho Usami
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Publication number: 20150357251Abstract: A sample semiconductor device is manufactured and the curvature of the sample is measured. An area is set to be removed from an encapsulation resin layer on the basis of the measurement value. After forming the encapsulation resin layer during the process of manufacturing the semiconductor device, the removal area is removed.Type: ApplicationFiled: January 17, 2014Publication date: December 10, 2015Inventor: Sensho Usami
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Publication number: 20150340311Abstract: A semiconductor chip at least includes a row of first electrode pad group, which includes at least one first independent electrode pad and multiple first common electrode pads. The interval between the first independent electrode pad and an electrode pad adjacent thereto is defined as “first pitch”, and the interval between adjacent electrode pads making up the multiple first common electrode pads is defined as “second pitch”. The first pitch is determined to be larger than the second pitch.Type: ApplicationFiled: May 15, 2015Publication date: November 26, 2015Applicant: MICRON TECHNOLOGY, INC.Inventor: Sensho Usami
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Publication number: 20150279820Abstract: A semiconductor chip 10 flip-chip mounted on a first surface 32 of a wiring substrate 30, a semiconductor chip 20 flip-chip mounted on a second surface 33 of the wiring substrate 30, a sealing resin 71 covering the semiconductor chip 10, a sealing resin 72 covering the semiconductor chip 20, a plurality of conductive posts provided to penetrate through the sealing resin 72, and a plurality of solder balls mounted on second ends of the plurality of conductive posts exposed from the sealing resin 72 are provided; and the mounting directions of the semiconductor chips 10 and 20 are mutually different by 90°. Both of the planar shapes of the semiconductor chips 10 and 20 are rectangular shapes, the semiconductor chip 10 is mounted so that the long sides thereof are parallel to the long sides of the wiring substrate 30, and the semiconductor chip 20 is mounted so that the long sides thereof are perpendicular to the long sides of the wiring substrate 30.Type: ApplicationFiled: March 25, 2015Publication date: October 1, 2015Inventors: Sensho Usami, Koji Hosokawa