Abstract: Provides is an ultra-microlight transmission device using secondary electrons according to various embodiments of the present invention for implementing the above-objects. The ultra-microlight transmission device includes a light source module configured to generate light, a housing which includes an interior space and performs spectroscopy and diffuse reflection on light introduced into the interior space, a first filter unit configured to convert the spectroscopic and diffusely reflected light into monochromatic light, and a second filter unit configured to cause diffraction and interference for the converted light.

Abstract: The present disclosure relates to a method and apparatus for representing dynamic neural radiance fields from unsynchronized videos. A method of acquiring a video at an arbitrary viewpoint based on a dynamic neural radiance fields model according to an embodiment of the present disclosure may comprise: inputting one or more videos acquired from one or more views for one scene into the dynamic neural radiance fields model; inputting a time embedding for the one or more videos into the dynamic neural radiance fields model; and rendering the video at the arbitrary viewpoint based on color information and density information output by the dynamic neural radiance fields model. Herein, time synchronization related to the time embedding may be performed by applying an individual time offset learned for each view, for the one or more views.

Abstract: A method of manufacturing a semiconductor device includes forming a stacked structure with first material layers and second material layers that are alternately stacked with each other, forming a first opening that passes through the stacked structure, forming second openings between the first material layers, forming first sacrificial layers in the second openings, forming first isolation layers that protrude into the first opening by oxidizing the first sacrificial layers, forming mold patterns on the first material layers between the protruding portions of the first isolation layers, forming third openings by etching portions of the first isolation layers that are exposed between the mold patterns, forming second sacrificial layers in the third openings, and forming second isolation layers that protrude farther toward the center of the first opening than the mold patterns by oxidizing the second sacrificial layers.

Abstract: A wafer cleaning method is provided. The wafer cleaning method includes providing a wafer on a stage that is inside of a chamber. The wafer is fixed to the stage by moving a grip pin connected to an edge of the stage. First ultrapure water is supplied onto the wafer while the wafer is rotating at a first rotation speed. The grip pin is released from the wafer by moving the grip pin. A development process is performed by supplying liquid chemical onto the wafer while the wafer is rotating at a second rotation speed that is less than the first rotation speed.

Abstract: A method for fabricating a semiconductor device includes: forming a mold stack layer including a mold layer and a supporter layer over a substrate; forming opening by etching the mold stack layer; selectively forming a supporter reinforcement layer on an exposed surface of the supporter layer which is positioned in the opening; forming a bottom electrode in the opening in which the supporter reinforcement layer is formed; and forming a supporter opening by etching a portion of the supporter layer to form a supporter that supports an outer wall of the bottom electrode.

Abstract: There are provided a semiconductor memory device and a manufacturing method of the same. The semiconductor memory device includes: a stack structure including conductive patterns and interlayer insulating layers, which are alternately stacked in a first direction; a channel layer penetrating the stack structure; a first semiconductor layer disposed on the stack structure, the first semiconductor layer including a first impurity of a first conductivity type; a second semiconductor layer disposed on the first semiconductor layer, the second semiconductor layer including a well region with a second impurity of a second conductivity type, wherein the second conductivity type is different from the first conductivity type; and a memory layer between the channel layer and the stack structure.

Abstract: A semiconductor memory device and a method of manufacturing the semiconductor memory device are provided. The semiconductor memory device includes a channel layer with a first portion and a second portion, the first portion and the second portion extending in a longitudinal direction, a gate stacked structure surrounding the first portion of the channel layer, a first semiconductor layer of a first conductivity type that contacts the second portion of the channel layer, and a second semiconductor layer of a second conductivity type.

Abstract: A method of manufacturing a semiconductor device includes forming a stacked structure with first material layers and second material layers that are alternately stacked with each other, forming a first opening that passes through the stacked structure, forming second openings between the first material layers, forming first sacrificial layers in the second openings, forming first isolation layers that protrude into the first opening by oxidizing the first sacrificial layers, forming mold patterns on the first material layers between the protruding portions of the first isolation layers, forming third openings by etching portions of the first isolation layers that are exposed between the mold patterns, forming second sacrificial layers in the third openings, and forming second isolation layers that protrude farther toward the center of the first opening than the mold patterns by oxidizing the second sacrificial layers.

Abstract: A method for fabricating a semiconductor device includes: forming a mold stack layer including a mold layer and a supporter layer over a substrate; forming opening by etching the mold stack layer; selectively forming a supporter reinforcement layer on an exposed surface of the supporter layer which is positioned in the opening; forming a bottom electrode in the opening in which the supporter reinforcement layer is formed; and forming a supporter opening by etching a portion of the supporter layer to form a supporter that supports an outer wall of the bottom electrode.

Abstract: A semiconductor memory device and a method of manufacturing the semiconductor memory device are provided. The semiconductor memory device includes a channel layer with a first portion and a second portion, the first portion and the second portion extending in a longitudinal direction, a gate stacked structure surrounding the first portion of the channel layer, a first semiconductor layer of a first conductivity type that contacts the second portion of the channel layer, and a second semiconductor layer of a second conductivity type.

Abstract: The present invention relates to: an adenosine derivative capable of acting as an antagonist on A2A and A3 adenosine receptors through the introduction of substituents into the 2nd and 8th carbons and 6th and/or 9th amine(s); a pharmaceutical composition including the same; and a method for preparing the same, wherein the adenosine derivative regulates the activity of an A2A or A3 adenosine receptor, and thus can effectively prevent or treat brain diseases, cardiovascular diseases, sleep disorders, inflammation, immune system diseases and the like in which the receptors are involved.

Abstract: A semiconductor memory device includes a semiconductor substrate including a first circuit group and a second circuit group spaced apart from each other. The memory device also includes a memory cell array overlapping with the semiconductor substrate. The memory device further includes a vertical conductive line crossing the memory cell array, the vertical conductive line being connected to the first circuit group and the second circuit group.

Abstract: There are provided a semiconductor memory device and a manufacturing method of the same. The semiconductor memory device includes: a stack structure including conductive patterns and interlayer insulating layers, which are alternately stacked in a first direction; a channel layer penetrating the stack structure; a first semiconductor layer disposed on the stack structure, the first semiconductor layer including a first impurity of a first conductivity type; a second semiconductor layer disposed on the first semiconductor layer, the second semiconductor layer including a well region with a second impurity of a second conductivity type, wherein the second conductivity type is different from the first conductivity type; and a memory layer between the channel layer and the stack structure.

Abstract: The present invention relates to a position recognition method comprising the steps of: measuring a space in a first direction by means of at least one measurement device provided in a vehicle; recognizing a first marker by means of the measurement means; computing first positional information of the vehicle; acquiring map information; and specifying comprehensive positional information of the vehicle, wherein the first marker includes a coordinate value of the first marker, the first positional information is a coordinate value of the vehicle computed through recognition of the first marker, and the step of specifying the comprehensive positional information combines the first positional information of the vehicle with the map information.

Abstract: A method for fabricating a semiconductor device includes: forming a mold stack layer including a mold layer and a supporter layer over a substrate; forming opening by etching the mold stack layer; selectively forming a supporter reinforcement layer on an exposed surface of the supporter layer which is positioned in the opening; forming a bottom electrode in the opening in which the supporter reinforcement layer is formed; and forming a supporter opening by etching a portion of the supporter layer to form a supporter that supports an outer wall of the bottom electrode.

Abstract: A semiconductor memory device and a method of manufacturing the semiconductor memory device are provided. The semiconductor memory device includes a channel layer with a first portion and a second portion, the first portion and the second portion extending in a longitudinal direction, a gate stacked structure surrounding the first portion of the channel layer, a first semiconductor layer of a first conductivity type that contacts the second portion of the channel layer, and a second semiconductor layer of a second conductivity type.

Abstract: A method of manufacturing a semiconductor device includes forming a stacked structure with first material layers and second material layers that are alternately stacked with each other, forming a first opening that passes through the stacked structure, forming second openings between the first material layers, forming first sacrificial layers in the second openings, forming first isolation layers that protrude into the first opening by oxidizing the first sacrificial layers, forming mold patterns on the first material layers between the protruding portions of the first isolation layers, forming third openings by etching portions of the first isolation layers that are exposed between the mold patterns, forming second sacrificial layers in the third openings, and forming second isolation layers that protrude farther toward the center of the first opening than the mold patterns by oxidizing the second sacrificial layers.

Abstract: A method for fabricating a semiconductor device includes: forming a mold stack layer including a mold layer and a supporter layer over a substrate; forming opening by etching the mold stack layer; selectively forming a supporter reinforcement layer on an exposed surface of the supporter layer which is positioned in the opening; forming a bottom electrode in the opening in which the supporter reinforcement layer is formed; and forming a supporter opening by etching a portion of the supporter layer to form a supporter that supports an outer wall of the bottom electrode.

Abstract: A substrate drying apparatus includes; a drying chamber configured to load a substrate and including a lower chamber and an upper chamber above the lower chamber, a supply port configured to supply a supercritical fluid into the drying chamber and including a main supply port and a sub-supply port horizontally spaced apart from the main supply port, wherein the main supply port penetrates a center portion of the upper chamber, and a first buffer member coupled to the upper chamber, vertically separated from the sub-supply port, and vertically overlapping the sub-supply port, such that supercritical fluid vertically introduced into the drying chamber through the sub-supply port is impeded by the first buffer member to change a flow direction for the supercritical fluid.

Abstract: A wafer cleaning method is provided. The wafer cleaning method includes providing a wafer on a stage that is inside of a chamber. The wafer is fixed to the stage by moving a grip pin connected to an edge of the stage. First ultrapure water is supplied onto the wafer while the wafer is rotating at a first rotation speed. The grip pin is released from the wafer by moving the grip pin. A development process is performed by supplying liquid chemical onto the wafer while the wafer is rotating at a second rotation speed that is less than the first rotation speed.