Abstract: Provided is a computation method of a memory processor configured to perform an operation between a first vector including first elements and a second vector including second elements, the first elements including respective first bits and the second elements including respective second bits, the method performed by the memory processor including: applying, to single-bit operation gates, the respective first bits and the respective second bits; obtaining bit operation result sum values for the respective first and second elements based on bit operation results obtained using the single-bit operation gates; and obtaining an operation result of the first vector and the second vector based on the bit operation result sum value.

Abstract: A multi-bit accumulator including a plurality of 1-bit Wallace trees configured to perform an add operation on single-bit input data, a plurality of tristate buffers configured to output a result of the add operation of the 1-bit Wallace trees, according to an enable signal, and a shift-adder configured to perform an accumulation operation on the result of the add operation of the plurality of 1-bit Wallace trees by a shift operation based on a clock signal.

Abstract: A multi-bit accumulator includes 1-bit Wallace trees each configured to perform an add operation on single-bit input data, tristate logic circuits each configured to output a result of the add operation of the 1-bit Wallace trees according to an enable signal provided to the tristate logic circuits, and a shift-adder configured to perform an accumulation operation on the result of the add operation of the 1-bit Wallace trees by a shift operation based on a clock signal.

Abstract: A method and memory device with in-memory computing defection detection is disclosed. A memory device includes a memory including banks, wherein each bank includes a respective plurality of bit-cells, an in-memory computation (IMC) operator configured to perform an IMC operation between first data while the first data is in the bit-cells of the memory and second data received as input to the memory device, wherein the banks share the operator, and wherein the memory device is configured to: generate a first test pattern that is stored in the memory and generate a second test pattern applied to the IMC operator, and based thereon determine whether a defect has occurred in either the memory or the operator, and perform a repair based on the determination that a defect has occurred.

Abstract: An apparatus and method with in-memory computing (IMC) are provided. An in-memory computing (IMC) circuit includes a plurality of memory banks, each memory bank including a bit cell configured to store a weight value and an operator configured to receive an input value, the operator being connected to the bit cell such that the operator upon receiving the input value outputs a logic operation result between the input value and the weight value, and a logic gate configured to receive the logic operation result of each of the memory banks.

Abstract: An in-memory computing (IMC) processor includes IMC macros, and includes a static random access memory (SRAM) IMC device including the plurality of IMC macros, and configured to perform a multiply and accumulate (MAC) operation between input data and first weight data of a first weight map applied to a first of IMC macros in a first direction in which an input feature map including the input data is written to the first IMC macro, and a two-dimensional (2D) shift accumulator configured to perform a shift operation on partial sums corresponding to respective MAC operation results of the IMC macros and accumulate a result of the shift operation.

Abstract: A method of transaction between a first cryptocurrency transacted based on a first blockchain and a second cryptocurrency transacted based on a second blockchain includes obtaining first transaction information with respect to a first transaction in which a first user transmits the first cryptocurrency to a second user, and second transaction information with respect to a second transaction accompanying the first transaction and in which the first user receives the second cryptocurrency from the second user; if the first transaction information satisfies terms of agreement between the first user and the second user, adding, to the first transaction information, first condition information depending on validity of the second transaction information and activating the first transaction of the first cryptocurrency; and digitally signing the first transaction information to which the first condition information is added, to prove the terms of agreement, and transmitting the first transaction information to a node

Abstract: A memory device performs a multiplication operation using a multiplying cell including a memory cell and a switching element, in which the memory cell includes a pair of inverters connected to each other in opposite directions, a first transistor connected to one end of the pair of inverters, and a second transistor connected to the other end of the pair of inverters, and has a set weight; and the switching element is connected to an output end of the memory cell and configured to perform switching in response to an input value and output a signal corresponding to a multiplication result between the input value and the weight.

Abstract: A method and apparatus with flash memory control are provided. The method includes performing first programming on a target memory cell of a cell array while adjusting a first programming time and a programming voltage, when a cell current of the target memory cell is determined to satisfy a primary target in association with the first programming, performing second programming on the target memory cell while adjusting a second programming time, and when the cell current of the target memory cell is determined to satisfy a secondary target in association with the second programming, terminating programming on the target memory cell.

Abstract: A wireless communication apparatus may include: an oscillator including a coil assembly exposed to an outside of the wireless communication apparatus, a variable capacitor, and a negative resistor; and a phase locking circuit connected to the coil assembly and the negative resistor. The phase locking circuit may be configured to generate a control signal to lock an oscillation frequency of the oscillator based on an oscillation signal generated by the oscillator, and provide the generated control signal to the variable capacitor.

Abstract: Provided is method and apparatus with memory array programming. A memory apparatus may include a memory array including memory cells, and a memory controller, where the memory controller is configured to configured to repeat, for a plurality of times, a generation of a first present time current error between a first present time current and a first target current, both of a first memory cell, a generation of a second present time current error between a second present time current and a second target current, both of a second memory cell, where a greatest among the first present time current error and the second present time current error is a greatest present time current error, and a programming of a select one of the first and second memory cells that has the greatest present time current error.

Abstract: A computing device for performing a digital pulse-based crossbar operation and a method of operating the computing device. The computing device includes a plurality of input lines to which a pulse is selectively input in a sequential manner based on a corresponding input signal; a plurality of output lines crossing the input lines; a plurality of elements, each element being disposed at a cross point between a corresponding input line and a corresponding output line to transfer, to the corresponding output line, a pulse input to the corresponding input line in response to a corresponding weight being a first value; and a plurality of pulse counters, each pulse counter counting a number of pulses output from a corresponding output line.

Abstract: A multiply-accumulate (MAC) computation circuit includes: a bit-cell array configured to generate an analog output corresponding to a MAC operation result of an input signal; a first analog-to-digital conversion (ADC) circuit configured to determine an upper part of a digital output corresponding to the analog output; and a second ADC circuit configured to determine a lower part of the digital output based on a reference voltage corresponding to the upper part.

Abstract: A communication apparatus and a communication method are provided. The communication apparatus includes an antenna configured to receive a wireless signal, an oscillator driven by a driving current and configured to generate an oscillating signal based on the wireless signal, a measurer configured to measure an oscillation degree of the oscillating signal, and an accumulator configured to accumulate a difference between a target value and a measurement value of the oscillation degree. A value of the wireless signal is determined based on a cumulative signal corresponding to the accumulated difference.

Abstract: A wireless communication apparatus may include: an oscillator including a coil assembly exposed to an outside of the wireless communication apparatus, a variable capacitor, and a negative resistor; and a phase locking circuit connected to the coil assembly and the negative resistor. The phase locking circuit may be configured to generate a control signal to lock an oscillation frequency of the oscillator based on an oscillation signal generated by the oscillator, and provide the generated control signal to the variable capacitor.

Abstract: Disclosed is a near-field communication (NFC) system that includes an NFC supporting apparatus. The NFC supporting apparatus includes a dual coil and a first switch. The dual coil includes an NFC band coil and a radio frequency (RF) band coil. An RF amplitude modulation signal is generated at the RF band coil in response to a transmission from an implantable device. The first switch is configured to switch the NFC band coil based on the RF amplitude modulation signal. The NFC band coil is configured to generate an NFC amplitude modulation signal at an NFC band coil of an NFC reader in response to the first switch.

Abstract: A wireless communication apparatus may include: an oscillator including a coil assembly exposed to an outside of the wireless communication apparatus, a variable capacitor, and a negative resistor; and a phase locking circuit connected to the coil assembly and the negative resistor. The phase locking circuit may be configured to generate a control signal to lock an oscillation frequency of the oscillator based on an oscillation signal generated by the oscillator, and provide the generated control signal to the variable capacitor.

Abstract: A communication apparatus and a communication method are provided. The communication apparatus includes an antenna configured to receive a wireless signal, an oscillator driven by a driving current and configured to generate an oscillating signal based on the wireless signal, a measurer configured to measure an oscillation degree of the oscillating signal, and an accumulator configured to accumulate a difference between a target value and a measurement value of the oscillation degree. A value of the wireless signal is determined based on a cumulative signal corresponding to the accumulated difference.

Abstract: A method of transaction between a first cryptocurrency transacted based on a first blockchain and a second cryptocurrency transacted based on a second blockchain includes obtaining first transaction information with respect to a first transaction in which a first user transmits the first cryptocurrency to a second user, and second transaction information with respect to a second transaction accompanying the first transaction and in which the first user receives the second cryptocurrency from the second user; if the first transaction information satisfies terms of agreement between the first user and the second user, adding, to the first transaction information, first condition information depending on validity of the second transaction information and activating the first transaction of the first cryptocurrency; and digitally signing the first transaction information to which the first condition information is added, to prove the terms of agreement, and transmitting the first transaction information to a node

Abstract: Disclosed is a near-field communication (NFC) system that includes an NFC supporting apparatus. The NFC supporting apparatus includes a dual coil and a first switch. The dual coil includes an NFC band coil and a radio frequency (RF) band coil. An RF amplitude modulation signal is generated at the RF band coil in response to a transmission from an implantable device. The first switch is configured to switch the NFC band coil based on the RF amplitude modulation signal. The NFC band coil is configured to generate an NFC amplitude modulation signal at an NFC band coil of an NFC reader in response to the first switch.