Patents by Inventor Seok-Kyu Lee

Seok-Kyu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961720
    Abstract: Disclosed herein is a multi-channel device for detecting plasma at an ultra-fast speed, including: a first antenna module connected to a first output terminal in contact with a substrate on a chuck of a process chamber and extending to ground, and receiving a first leakage current leaking through the substrate to increase reception sensitivity of the leakage current; a first current detection module detecting the first leakage current; a current measurement module receiving the first leakage current output from the first current detection module, and extracting the received first leakage current for each predetermined period to generate a first leakage current measurement information; and a control module comparing the first leakage current measurement information with a reference value to generate first arcing occurrence information.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: April 16, 2024
    Assignee: T.O.S Co., Ltd.
    Inventors: Yong Kyu Kim, Bum Ho Choi, Yong Sik Kim, Kwang Ki Kang, Hong Jong Jung, Seok Ho Lee, Seung Soo Lee
  • Publication number: 20240120616
    Abstract: A secondary battery includes an electrode assembly having a positive electrode provided with a positive electrode tab, a separator, and a negative electrode provided with a negative electrode tab, the positive electrode, the separator, and the negative electrode being wound, the electrode assembly having a core part at a center thereof; a can configured to receive the electrode assembly therein, the negative electrode tab being connected to the can; a cap assembly coupled to an opening of the can, the positive electrode tab being connected to the cap assembly; and a reinforcing member provided on an end of the separator exposed beyond the positive electrode or the negative electrode to prevent heat of the positive electrode tab or the negative electrode tab from being transferred to the separator.
    Type: Application
    Filed: April 19, 2022
    Publication date: April 11, 2024
    Applicant: LG ENERGY SOLUTION, LTD.
    Inventors: Soon Kwan KWON, Su Taek JUNG, Seok Hoon JANG, Hyeok JEONG, Sang Ho BAE, Byeong Kyu LEE, Seong Won CHOI, Min Wook KIM, Yong Jun LEE
  • Publication number: 20240073666
    Abstract: The present disclosure relates to a method of providing a proximal user networking service by means of a near-field communication network and a system therefor. Specifically, the present disclosure implements an environment in which, when an ad packet is broadcast using a certain host device, a guest device that receives the ad packet in the vicinity uploads relevant information to a service server, thereby allowing the host device to check guest devices that have been present in proximity thereto in the vicinity.
    Type: Application
    Filed: October 26, 2023
    Publication date: February 29, 2024
    Inventors: Seok Ki KIM, Jung In CHOI, Jae Kyu LEE, Keol HEO, Hyun Seo LIM
  • Publication number: 20160212856
    Abstract: Disclosed herein are a method for manufacturing an electronic component embedding substrate and an electronic component embedding substrate. The method for manufacturing an electronic component embedding substrate includes: inserting an electronic component into a cavity formed in a core substrate; stacking a first insulating layer on one side of the core substrate into which the electronic component is inserted; performing surface treatment on the other side of the core substrate opposite to a direction in which the first insulating layer is stacked to improve a surface roughness of at least an exposed surface of the first insulating layer; and stacking a second insulating layer on the other side of the core substrate so as to be bonded to the exposed surface of the first insulating layer of which the surface roughness is improved. In addition, disclosed herein is the electronic component embedding substrate.
    Type: Application
    Filed: March 25, 2016
    Publication date: July 21, 2016
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hong Won KIM, Seok Kyu LEE, Tae Gon LEE, Byung Hak KANG, Jung Soo BYUN, Yeon Seop YU, Sang Mi YOON
  • Publication number: 20150062850
    Abstract: Disclosed herein is a printed circuit board of a build-up structure in which an insulating layer and a circuit layer are stacked on a core layer, the core layer including: an electronic chip cavity in which an electronic chip is accommodated; and a dummy chip cavity in which a dummy chip is accommodated to offset warpage by the electronic chip.
    Type: Application
    Filed: December 12, 2013
    Publication date: March 5, 2015
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Cheol Ho CHOI, Sung Jin Chun, Seok Kyu Lee, Dong Hoon Kim
  • Publication number: 20150049445
    Abstract: Disclosed herein are a method for manufacturing an electronic component embedding substrate and an electronic component embedding substrate. The method for manufacturing an electronic component embedding substrate includes: inserting an electronic component into a cavity formed in a core substrate; stacking a first insulating layer on one side of the core substrate into which the electronic component is inserted; performing surface treatment on the other side of the core substrate opposite to a direction in which the first insulating layer is stacked to improve a surface roughness of at least an exposed surface of the first insulating layer; and stacking a second insulating layer on the other side of the core substrate so as to be bonded to the exposed surface of the first insulating layer of which the surface roughness is improved. In addition, disclosed herein is the electronic component embedding substrate.
    Type: Application
    Filed: January 16, 2014
    Publication date: February 19, 2015
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hong Won KIM, Seok Kyu Lee, Tae Gon Lee, Byung Hak Kang, Jung Soo Byun, Yeon Seop Yu, Sang Mi Yoon
  • Publication number: 20140347834
    Abstract: An electronic component embedded printed circuit board and a method for manufacturing the same. The printed circuit board includes: a core having a cavity formed therein; an electronic component unit embedded in the cavity, including a plurality of electronic components, and having a coating layer formed on an outer peripheral surface of the electronic component unit to fix the plurality of electronic components; and an insulating layer laminated at least on the top of the core. An outer layer circuit pattern may be formed on the insulating layer.
    Type: Application
    Filed: May 23, 2014
    Publication date: November 27, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seok Kyu LEE, Takayuki HAZE, Soon Jin CHO
  • Patent number: 8883016
    Abstract: Disclosed is a carrier for manufacturing a printed circuit board, which includes a first carrier including a first binder having a first opening and a first metal layer formed in the first opening of the first binder, and a second carrier, stacked with the first carrier and including a second binder having a second opening and a second metal layer which is formed in the second opening of the second binder and which partially overlaps with the first metal layer, so that the carrier is simply configured and the binders are formed not only on the lateral surfaces of the metal layers but also on the upper surfaces thereof, thus improving the reliability of bonding of the carrier at the periphery. A method of manufacturing the carrier and a method of manufacturing a printed circuit board using the carrier are also provided.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: November 11, 2014
    Inventors: Jae Joon Lee, Jin Yong Ahn, Suk Hyeon Cho, Ki Hwan Kim, Seok Kyu Lee
  • Publication number: 20140186581
    Abstract: Disclosed herein are a primer-coated copper foil and a method for producing the same. The primer-coated copper foil includes a copper foil layer; and a primer resin layer having a first surface on which the copper foil layer is coated and a second surface as a counter side on which a roughness is formed, so that the primer-coated copper foil can exhibit excellent adhesive strength.
    Type: Application
    Filed: December 24, 2013
    Publication date: July 3, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seok Kyu LEE, Takayuki HAZE, Soon Jin CHO
  • Publication number: 20140027047
    Abstract: Disclosed is a carrier for manufacturing a printed circuit board, which includes a first carrier including a first binder having a first opening and a first metal layer formed in the first opening of the first binder, and a second carrier, stacked with the first carrier and including a second binder having a second opening and a second metal layer which is formed in the second opening of the second binder and which partially overlaps with the first metal layer, so that the carrier is simply configured and the binders are formed not only on the lateral surfaces of the metal layers but also on the upper surfaces thereof, thus improving the reliability of bonding of the carrier at the periphery. A method of manufacturing the carrier and a method of manufacturing a printed circuit board using the carrier are also provided.
    Type: Application
    Filed: September 30, 2013
    Publication date: January 30, 2014
    Inventors: Jae Joon LEE, Jin Yong Ahn, Suk Hyeon Cho, Ki Hwan Kim, Seok Kyu Lee
  • Patent number: 8563141
    Abstract: Disclosed is a carrier for manufacturing a printed circuit board, which includes a first carrier including a first binder having a first opening and a first metal layer formed in the first opening of the first binder, and a second carrier, stacked with the first carrier and including a second binder having a second opening and a second metal layer which is formed in the second opening of the second binder and which partially overlaps with the first metal layer, so that the carrier is simply configured and the binders are formed not only on the lateral surfaces of the metal layers but also on the upper surfaces thereof, thus improving the reliability of bonding of the carrier at the periphery. A method of manufacturing the carrier and a method of manufacturing a printed circuit board using the carrier are also provided.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: October 22, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Joon Lee, Jin Yong Ahn, Suk Hyeon Cho, Ki Hwan Kim, Seok Kyu Lee
  • Publication number: 20130243995
    Abstract: Disclosed herein is a carrier for manufacturing a substrate, including: a base plate; adhesive layers formed on one side or both sides of the base plate; auxiliary adhesive layers, each of which is buried in one side of each of the adhesive layers, has a smaller area than each of the adhesive layers and has lower adhesivity than each of the adhesive layers; and metal layers, each of which is formed on one side of each of the auxiliary adhesive layers, whose edges are attached to the adhesive layers, and whose other portions excluding the edges are attached to the auxiliary adhesive layers. The carrier is advantageous in that a metal layer and an auxiliary adhesive layer are attached to each other by the adhesivity of the auxiliary adhesive layer, so that it is not required to use vacuum adsorption, with the result that a process of manufacturing a substrate can be performed more stably.
    Type: Application
    Filed: May 6, 2013
    Publication date: September 19, 2013
    Inventors: Jin Ho KIM, Jin Yong AHN, Ki Hwan KIM, Byung Moon KIM, Seok Kyu LEE
  • Publication number: 20130243941
    Abstract: A method of manufacturing a coreless substrate having filled via pads, including: forming a first insulating layer on one side of a carrier forming a build-up layer including a build-up insulating layer and a build-up circuit layer having a build-up via on the first insulating layer, and forming a second insulating layer on the build-up layer; removing the carrier, and forming via-holes in the first and second insulating layers; and conducting a filled plating process in the via-holes of the first and second insulating layers thus forming first and second filled via pads therein.
    Type: Application
    Filed: May 7, 2013
    Publication date: September 19, 2013
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seok Kyu LEE, Soon Oh Jung, Jong Kuk Hong, Soon Jin Cho
  • Patent number: 8445790
    Abstract: Disclosed herein is a coreless substrate having filled via pads and a method of manufacturing the same. Insulating layers are formed on both sides of a build-up layer, and via-pads are embedded in the insulating layers such that the via-pads are flush with the insulating layers. The via pads are not separated from a substrate, and thus reliability of the pads is increased. Flatness of bumps is increased, and thus bonding of flip chips becomes easy.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: May 21, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seok Kyu Lee, Soon Oh Jung, Jong Kuk Hong, Soon Jin Cho
  • Patent number: 8435376
    Abstract: Disclosed herein is a carrier for manufacturing a substrate, including: a base plate; adhesive layers formed on one side or both sides of the base plate; auxiliary adhesive layers, each of which is buried in one side of each of the adhesive layers, has a smaller area than each of the adhesive layers and has lower adhesivity than each of the adhesive layers; and metal layers, each of which is formed on one side of each of the auxiliary adhesive layers, whose edges are attached to the adhesive layers, and whose other portions excluding the edges are attached to the auxiliary adhesive layers. The carrier is advantageous in that a metal layer and an auxiliary adhesive layer are attached to each other by the adhesivity of the auxiliary adhesive layer, so that it is not required to use vacuum adsorption, with the result that a process of manufacturing a substrate can be performed more stably.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: May 7, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin Ho Kim, Jin Yong Ahn, Ki Hwan Kim, Byung Moon Kim, Seok Kyu Lee
  • Patent number: 8209860
    Abstract: Disclosed herein are a printed circuit board having metal bumps which have uniform diameter and are formed at fine pitch, and a method of manufacturing the printed circuit board.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: July 3, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin Yong An, Seok Kyu Lee
  • Publication number: 20110163064
    Abstract: Disclosed is a carrier for manufacturing a printed circuit board, which includes a first carrier including a first binder having a first opening and a first metal layer formed in the first opening of the first binder, and a second carrier, stacked with the first carrier and including a second binder having a second opening and a second metal layer which is formed in the second opening of the second binder and which partially overlaps with the first metal layer, so that the carrier is simply configured and the binders are formed not only on the lateral surfaces of the metal layers but also on the upper surfaces thereof, thus improving the reliability of bonding of the carrier at the periphery. A method of manufacturing the carrier and a method of manufacturing a printed circuit board using the carrier are also provided.
    Type: Application
    Filed: March 2, 2010
    Publication date: July 7, 2011
    Inventors: Jae Joon LEE, Jin Yong Ahn, Suk Hyeon Cho, Ki Hwan Kim, Seok Kyu Lee
  • Patent number: 7971352
    Abstract: A method of manufacturing a printed circuit board having solder balls. The method may include: stacking a second carrier, in which at least one hole is formed, over one side of a first carrier; forming at least one solder bump by filling the hole with a conductive material; forming a circuit pattern layer, which is electrically connected with the solder bump, on the second carrier; and exposing the solder bump by removing the first carrier and the second carrier. Using this method, uniform hemispherical solder balls with fine pitch can be formed as a part of the manufacturing process, without having to attach the solder balls separately. Carriers may be used to serve as supports during the manufacturing process, whereby deformations can be prevented in the board.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: July 5, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Shuhichi Okabe, Jin-Yong An, Seok-Kyu Lee, Soon-Oh Jung, Jong-Kuk Hong, Hae-Nam Seo
  • Publication number: 20110159282
    Abstract: Disclosed herein is a carrier for manufacturing a substrate, including: a base plate; adhesive layers formed on one side or both sides of the base plate; auxiliary adhesive layers, each of which is buried in one side of each of the adhesive layers, has a smaller area than each of the adhesive layers and has lower adhesivity than each of the adhesive layers; and metal layers, each of which is formed on one side of each of the auxiliary adhesive layers, whose edges are attached to the adhesive layers, and whose other portions excluding the edges are attached to the auxiliary adhesive layers. The carrier is advantageous in that a metal layer and an auxiliary adhesive layer are attached to each other by the adhesivity of the auxiliary adhesive layer, so that it is not required to use vacuum adsorption, with the result that a process of manufacturing a substrate can be performed more stably.
    Type: Application
    Filed: May 25, 2010
    Publication date: June 30, 2011
    Inventors: Jin Ho KIM, Jin Yong Ahn, Ki Hwan Kim, Byung Moon Kim, Seok Kyu Lee
  • Publication number: 20110079349
    Abstract: The present invention provides a method of manufacturing a printed circuit board including the steps of: preparing a pair of raw materials, each formed by sequentially stacking a release film and a first insulating layer, and an adhesive layer, respectively; embedding the pair of raw materials, which are opposed to each other, in the adhesive layer while disposing the release films toward an inner layer; forming a second insulating layer, which has a via formed therethrough and a circuit pattern formed on an upper surface to be connected to the via, on the first insulating layer; cutting edge portions of the second and first insulating layers, the release film, and the adhesive layer; and removing the release film from the first insulating layer.
    Type: Application
    Filed: December 17, 2009
    Publication date: April 7, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk Hyeon Cho, Chang Sup Ryu, Jin Yong An, Soon Oh Jung, Sung Won Jeong, Byung Moon Kim, Dong Ju Jeon, Seok Kyu Lee, Jin Ho Kim