Patents by Inventor Seok-Pyo Song
Seok-Pyo Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9223519Abstract: A semiconductor device includes a resistance variable element including a free magnetic layer, a tunnel barrier layer and a pinned magnetic layer; and a magnetic correction layer disposed over the resistance variable element to be separated from the resistance variable element, and having a magnetization direction which is opposite to a magnetization direction of the pinned magnetic layer.Type: GrantFiled: October 22, 2013Date of Patent: December 29, 2015Assignee: SK hynix Inc.Inventors: Seok-Pyo Song, Se-Dong Kim, Hong-Ju Suh
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Publication number: 20150349074Abstract: Devices and methods based on disclosed technology include, among others, an electronic device capable of improving a signal transfer characteristic and a method for fabricating the same. Specifically, an electronic device in one implementation includes a plurality of buried gates formed in a substrate, open parts formed in the substrate on both sides of the buried gate, isolation layers each formed between a sidewall of the open part and a sidewall of the buried gate, source/drain regions formed in the substrate under the respective open parts, and contact plugs buried in the respective open parts.Type: ApplicationFiled: August 7, 2015Publication date: December 3, 2015Inventors: Seok-Pyo Song, Jae-Yun Yi, Se-Dong Kim
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Patent number: 9171889Abstract: Provided is an electronic device including a semiconductor memory which includes a cell array region having a first variable resistance element and a peripheral circuit region having a decoupling capacitor, the decoupling capacitor including a bottom electrode, a dielectric layer pattern, and a top electrode. The cell array region may include: a first gate; a first contact over the first gate; a second contact over an active region at one side of the first gate; and the first variable resistance element over the second contact, and the peripheral circuit region may include: a second gate formed of the same material at the same level as the first gate; the bottom electrode disposed over the second gate and formed at the same level as the first contact; and the dielectric layer pattern and the top electrode disposed over the bottom electrode.Type: GrantFiled: May 9, 2014Date of Patent: October 27, 2015Assignee: SK hynix Inc.Inventors: Jae-Yun Yi, Seok-Pyo Song, Joon-Seop Sim
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Patent number: 9147442Abstract: This patent document relates to memory circuits or devices and their applications in electronic devices or systems. The disclosed technology in this patent document includes memory circuits or devices and their applications in electronic devices or systems and various implementations of an electronic device in which an electronic device capable of reducing an area, improving device characteristics due to a reduction in the resistance of a switching transistor, simplifying the process, and reducing a cost is provided. In accordance with the electronic device of this patent document, an area can be reduced, device characteristics can be improved due to a reduction in the resistance of the switching transistor, the process can be simplified, and a cost can be reduced.Type: GrantFiled: March 21, 2014Date of Patent: September 29, 2015Assignee: SK hynix Inc.Inventors: Jae-Yun Yi, Sung-Woong Chung, Seok-Pyo Song
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Publication number: 20150248932Abstract: Provided is an electronic device including a semiconductor memory unit. The semiconductor memory unit may include: a storage cell comprising a variable resistance element; a first selecting element coupled to one end of the storage cell and having a threshold voltage set to a first voltage; and a second selecting element coupled to the other end of the storage cell and having a threshold voltage set to a second voltage higher than the first voltage.Type: ApplicationFiled: July 28, 2014Publication date: September 3, 2015Inventors: Jae-Yun Yi, Sung-Woong Chung, Seok-Pyo Song
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Patent number: 9105574Abstract: Devices and methods based on disclosed technology include, among others, an electronic device capable of improving a signal transfer characteristic and a method for fabricating the same. Specifically, an electronic device in one implementation includes a plurality of buried gates formed in a substrate, open parts formed in the substrate on both sides of the buried gate, isolation layers each formed between a sidewall of the open part and a sidewall of the buried gate, source/drain regions formed in the substrate under the respective open parts, and contact plugs buried in the respective open parts.Type: GrantFiled: December 30, 2013Date of Patent: August 11, 2015Assignee: SK hynix Inc.Inventors: Seok-Pyo Song, Jae-Yun Yi, Se-Dong Kim
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Publication number: 20150092472Abstract: Provided is an electronic device including a semiconductor memory which includes a cell array region having a first variable resistance element and a peripheral circuit region having a decoupling capacitor, the decoupling capacitor including a bottom electrode, a dielectric layer pattern, and a top electrode. The cell array region may include: a first gate; a first contact over the first gate; a second contact over an active region at one side of the first gate; and the first variable resistance element over the second contact, and the peripheral circuit region may include: a second gate formed of the same material at the same level as the first gate; the bottom electrode disposed over the second gate and formed at the same level as the first contact; and the dielectric layer pattern and the top electrode disposed over the bottom electrode.Type: ApplicationFiled: May 9, 2014Publication date: April 2, 2015Applicant: SK HYNIX INC.Inventors: Jae-Yun Yi, Seok-Pyo Song, Joon-Seop Sim
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Publication number: 20150055397Abstract: An electronic device including a semiconductor memory. The semiconductor memory includes a bit line; a source line; a plurality of resistive memory cells among which a selected memory cell forms a current path between the bit line and the source line; a read current supply unit configured to supply read current to the bit line in a read operation; a sense amplifier configured to generate read data in response to a voltage level of the bit line in the read operation; and a variable switch element configured to flow current from the source line to a ground terminal in the read operation, and be decreased in its resistance value as a voltage level of the source line is high.Type: ApplicationFiled: May 13, 2014Publication date: February 26, 2015Applicant: SK hynix Inc.Inventors: Jae-Yun Yi, Sung-Woong Chung, Seok-Pyo Song
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Publication number: 20150049537Abstract: An electronic device includes a semiconductor device that includes: a substrate including a switching element having a buried gate electrode; a buried decoupling capacitor having a line width same as a line width of the buried gate electrode; and a variable resistance element, electrically coupled to the switching element, formed over the substrate.Type: ApplicationFiled: July 2, 2014Publication date: February 19, 2015Inventors: Joon-Seop Sim, Seok-Pyo Song, Jae-Yun Yi
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Patent number: 8933427Abstract: A variable resistance memory device includes active regions defined by an isolation layer in a semiconductor substrate, trenches in the semiconductor substrate, which extend in a direction crossing the active regions, junction regions formed in the active regions on both sides of the trenches, and variable resistance patterns interposed between the word lines and the junction regions.Type: GrantFiled: September 14, 2012Date of Patent: January 13, 2015Assignee: SK Hynix Inc.Inventors: Jae-Yun Yi, Seok-Pyo Song, Seung-Hwan Lee
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Publication number: 20140293684Abstract: A nonvolatile memory apparatus includes: a memory cell coupled to a bit line and a source line; a word line configured to select the memory cell; and a local switch block configured to apply a write voltage, a read voltage, and a source line voltage to the bit line and the source line in response to a local switch select signal. In a write or read operation of the nonvolatile memory apparatus, the word line has a first voltage level, and the local switch select signal has a second voltage level higher than the first voltage level.Type: ApplicationFiled: August 28, 2013Publication date: October 2, 2014Applicant: SK Hynix Inc.Inventors: Jae Yun YI, Seok Pyo SONG
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Publication number: 20140293672Abstract: This patent document relates to memory circuits or devices and their applications in electronic devices or systems. The disclosed technology in this patent document includes memory circuits or devices and their applications in electronic devices or systems and various implementations of an electronic device in which an electronic device capable of reducing an area, improving device characteristics due to a reduction in the resistance of a switching transistor, simplifying the process, and reducing a cost is provided. In accordance with the electronic device of this patent document, an area can be reduced, device characteristics can be improved due to a reduction in the resistance of the switching transistor, the process can be simplified, and a cost can be reduced.Type: ApplicationFiled: March 21, 2014Publication date: October 2, 2014Applicant: SK HYNIX INC.Inventors: Jae-Yun Yi, Sung-Woong Chung, Seok-Pyo Song
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Publication number: 20140254239Abstract: Devices and methods based on disclosed technology include, among others, an electronic device capable of improving a signal transfer characteristic and a method for fabricating the same. Specifically, an electronic device in one implementation includes a plurality of buried gates formed in a substrate, open parts formed in the substrate on both sides of the buried gate, isolation layers each formed between a sidewall of the open part and a sidewall of the buried gate, source/drain regions formed in the substrate under the respective open parts, and contact plugs buried in the respective open parts.Type: ApplicationFiled: December 30, 2013Publication date: September 11, 2014Applicant: SK HYNIX INC.Inventors: Seok-Pyo Song, Jae-Yun Yi, Se-Dong Kim
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Publication number: 20140247647Abstract: Electronic devices having semiconductor elements and methods for fabricating such devices including, a method for fabricating an electronic device including a semiconductor memory, which includes: forming a sacrificial layer on a substrate including a first region and a second region; selectively etching the sacrificial layer and the substrate of the first region to form a trench; forming a first gate that fills a part of the trench in the first region; forming a gate protection layer on the first gate to fill the remaining part of the trench; removing the sacrificial layer of the first region to form a grooved portion surrounded by the gate protection layer; forming a conductive plug to cover the grooved portion; removing the sacrificial layer of the second region; and forming a second gate on the substrate of the second region.Type: ApplicationFiled: February 24, 2014Publication date: September 4, 2014Applicant: SK HYNIX INC.Inventors: Seok-Pyo Song, Sung-Woong Chung, Jong-Han Shin
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Publication number: 20140250244Abstract: A semiconductor device includes a resistance variable element including a free magnetic layer, a tunnel barrier layer and a pinned magnetic layer; and a magnetic correction layer disposed over the resistance variable element to be separated from the resistance variable element, and having a magnetization direction which is opposite to a magnetization direction of the pinned magnetic layer.Type: ApplicationFiled: October 22, 2013Publication date: September 4, 2014Applicant: SK HYNIX INC.Inventors: Seok-Pyo Song, Se-Dong Kim, Hong-Ju Suh
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Patent number: 8785902Abstract: A resistive memory device includes a lower electrode formed on a substrate, a resistive layer formed on the lower electrode, and an upper electrode on the resistive layer, wherein a lower portion of the upper electrode is narrower than an upper portion of the upper electrode.Type: GrantFiled: July 22, 2013Date of Patent: July 22, 2014Assignee: SK Hynix Inc.Inventors: Seok-Pyo Song, Yu-Jin Lee
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Patent number: 8754394Abstract: A variable resistive memory device includes a bit line, a word line, first electrodes and second electrodes, which are respectively arrayed in different directions, wherein a unit cell including a variable resistive material layer interposed between the first electrode and the second electrode is located at every intersection between the first electrode and the second electrode.Type: GrantFiled: August 27, 2012Date of Patent: June 17, 2014Assignee: SK Hynix Inc.Inventors: Jae-Yun Yi, Seok-Pyo Song
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Patent number: 8675386Abstract: A memory device includes a memory unit including a plurality of first conductive lines and a plurality of second conductive lines that cross the first conductive lines, and a driving unit module coupled with the plurality of the first conductive lines through respective ones of a plurality of contacts and coupled with and the plurality of the second conductive lines through respective ones of the plurality of contacts, wherein as the first conductive lines become farther from the driving unit module along a direction that the second conductive lines extend, the respective contacts of the first conductive lines have lower resistance values.Type: GrantFiled: December 29, 2010Date of Patent: March 18, 2014Assignee: Hynix Semiconductor Inc.Inventor: Seok-Pyo Song
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Patent number: 8598011Abstract: A resistive memory device includes a plurality of resistive units, each resistive unit including: a lower electrode formed over a substrate; a resistive layer formed over the lower electrode; and an upper electrode formed over the resistive layer, wherein edge parts of the lower and upper electrodes, which come in contact with the resistive layer, is formed with a rounding shape.Type: GrantFiled: December 17, 2010Date of Patent: December 3, 2013Assignee: Hynix Semiconductor Inc.Inventors: Seok-Pyo Song, Yu-Jin Lee
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Publication number: 20130313507Abstract: A resistive memory device includes a lower electrode formed on a substrate, a resistive layer formed on the lower electrode, and an upper electrode on the resistive layer, wherein a lower portion of the upper electrode is narrower than an upper portion of the upper electrode.Type: ApplicationFiled: July 22, 2013Publication date: November 28, 2013Applicant: SK hynix Inc.Inventors: Seok-Pyo SONG, Yu-Jin LEE