Abstract: Disclosed are a method and apparatus for reusing wastewater. The method for reusing wastewater disclosed herein includes: generating a mixed wastewater by mixing multiple types of wastewater (S20); performing a first purification by passing the mixed wastewater through a flocculation-sedimentation unit (S40); performing a second purification by passing an effluent of the flocculation-sedimentation unit through a membrane bioreactor (MBR) (S60); performing a third purification by passing an effluent of the MBR through a reverse-osmosis membrane unit (S80); and reusing an effluent of the reverse-osmosis membrane unit as cooling water or industrial water (S100).

Abstract: Provided are a method for fabricating a human nasal turbinate-derived mesenchymal stem cell-based 3D bioprinted construct, and a use thereof, wherein the human nasal turbinate-derived mesenchymal stem cell-based, 3D bioprinted construct is advantageous over conventional mesenchymal stem cell-based, 3D bioprinted constructs in that the former can survive and proliferate stably in vitro and/or in vivo and shows high osteogenic differentiation ability as well, therefore is expected to make a great contribution to the practical use of cellular therapeutic agents.

Abstract: Provided is a semiconductor architecture including a carrier substrate, alignment marks provided in the carrier substrate, the alignment marks being provided from a first surface of the carrier substrate to a second surface of the carrier substrate, a first semiconductor device provided on the first surface of the carrier substrate based on the alignment marks, a second semiconductor device provided on the second surface of the carrier substrate based on the alignment marks and aligned with the first semiconductor device.

Abstract: Provided is a semiconductor architecture including a carrier substrate, alignment marks provided in the carrier substrate, the alignment marks being provided from a first surface of the carrier substrate to a second surface of the carrier substrate, a first semiconductor device provided on the first surface of the carrier substrate based on the alignment marks, a second semiconductor device provided on the second surface of the carrier substrate based on the alignment marks and aligned with the first semiconductor device.

Abstract: Provided is a compound for an organic electric device, an organic electric device using the same, and an electronic device including the organic electric device. Further provided is an organic electric device having high luminous efficiency, low driving voltage, and high heat resistance can be provided, and color purity and lifespan of the organic electric device can be improved.

Abstract: Provided is a semiconductor architecture including a carrier substrate, alignment marks provided in the carrier substrate, the alignment marks being provided from a first surface of the carrier substrate to a second surface of the carrier substrate, a first semiconductor device provided on the first surface of the carrier substrate based on the alignment marks, a second semiconductor device provided on the second surface of the carrier substrate based on the alignment marks and aligned with the first semiconductor device.

Abstract: Disclosed herein is a method of predicting engine knocking, which includes calculating initial pressure in cylinder based on operating data and pressure in intake manifold measured using manifold absolute pressure sensor, calculating pressure at spark timing in the cylinder by interpreting compression process as polytropic process based on the calculated initial pressure in the cylinder, calculating heat release rate for individual operating conditions based on the calculated pressure in the cylinder at spark timing, calculating pressure change in the cylinder based on the calculated heat release rate, calculating unburned gas temperature in adiabatic compression process based on the calculated pressure change in the cylinder, and determining whether knock occurs by calculating ignition delay based on the calculated unburned gas temperature and calculating unburned gas mass fraction at crank angle at the end of the ignition delay.

Abstract: Disclosed herein is a method of predicting engine knocking, which includes calculating initial pressure in cylinder based on operating data and pressure in intake manifold measured using manifold absolute pressure sensor, calculating pressure at spark timing in the cylinder by interpreting compression process as polytropic process based on the calculated initial pressure in the cylinder, calculating heat release rate for individual operating conditions based on the calculated pressure in the cylinder at spark timing, calculating pressure change in the cylinder based on the calculated heat release rate, calculating unburned gas temperature in adiabatic compression process based on the calculated pressure change in the cylinder, and determining whether knock occurs by calculating ignition delay based on the calculated unburned gas temperature and calculating unburned gas mass fraction at crank angle at the end of the ignition delay.

Abstract: Example embodiments relate to a method for fabricating a semiconductor device. The method for fabricating a semiconductor device includes stacking on a substrate an etching target layer, a first mask layer, and a photoresist layer, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, patterning the first mask layer to form a first mask pattern using the photoresist pattern as an etching mask, and patterning the etching target layer to form a target pattern using the first mask pattern as an etching mask. The first mask layer includes at least one of a silicon layer and a titanium oxide layer.

Abstract: A method of fabricating a semiconductor device includes forming first cell patterns on a substrate, forming a first layer relative to the first cell patterns, and forming a second cell pattern and a peripheral pattern on the first layer. The second cell pattern includes first holes in a cell region and the peripheral pattern is located in a peripheral region. The method also includes filling the first holes, removing the second cell pattern to expose pillars, and forming second holes. Each of the second holes corresponds to adjacent cell spacers of the pillars. The method also includes removing the pillars to form third holes corresponding to respective ones of the cell spacers, and etching the substrate using the cell spacers, the first cell patterns, and the peripheral pattern as etch masks to form a trench.

Abstract: A phosphate solution for a zinc or zinc-based alloy plated steel sheet, and a zinc or zinc-based alloy plated steel sheet using the same are provided. The phosphate solution for a zinc or zinc-based alloy plated steel sheet contains a molybdenum (Mo) ion, a calcium (Ca) ion and a phosphate ion. A zinc or zinc-based alloy plated steel sheet includes a base steel sheet, a zinc-based or zinc alloy-based plating layer formed on the base steel sheet, and a phosphate film formed on the zinc-based or zinc alloy-based plating layer. The phosphate film contains a molybdenum compound, Ca and a phosphate. A pitting phenomenon occurring at the time of treating a steel sheet with a phosphate is prevented, and excellent corrosion resistance is exhibited on a phosphate film.

Abstract: Example embodiments relate to a method for fabricating a semiconductor device. The method for fabricating a semiconductor device includes stacking on a substrate an etching target layer, a first mask layer, and a photoresist layer, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, patterning the first mask layer to form a first mask pattern using the photoresist pattern as an etching mask, and patterning the etching target layer to form a target pattern using the first mask pattern as an etching mask. The first mask layer includes at least one of a silicon layer and a titanium oxide layer.

Abstract: A method of fabricating a semiconductor device includes forming first cell patterns on a substrate, forming a first layer relative to the first cell patterns, and forming a second cell pattern and a peripheral pattern on the first layer. The second cell pattern includes first holes in a cell region and the peripheral pattern is located in a peripheral region. The method also includes filling the first holes, removing the second cell pattern to expose pillars, and forming second holes. Each of the second holes corresponds to adjacent cell spacers of the pillars. The method also includes removing the pillars to form third holes corresponding to respective ones of the cell spacers, and etching the substrate using the cell spacers, the first cell patterns, and the peripheral pattern as etch masks to form a trench.

Abstract: A phosphate solution for a zinc or zinc-based alloy plated steel sheet, and a zinc or zinc-based alloy plated steel sheet using the same are provided. The phosphate solution for a zinc or zinc-based alloy plated steel sheet contains a molybdenum (Mo) ion, a calcium (Ca) ion and a phosphate ion. A zinc or zinc-based alloy plated steel sheet includes a base steel sheet, a zinc-based or zinc alloy-based plating layer formed on the base steel sheet, and a phosphate film formed on the zinc-based or zinc alloy-based plating layer. The phosphate film contains a molybdenum compound, Ca and a phosphate. A pitting phenomenon occurring at the time of treating a steel sheet with a phosphate is prevented, and excellent corrosion resistance is exhibited on a phosphate film.

Abstract: Optimizing search engine advertising inventory includes storing a plurality of advertisements for a plurality of advertising techniques in an inventory database. The system and method includes, in response to a user search request, selecting one or more advertisements from the inventory database to be displayed in a selected advertising technique based on user click activity, advertisement performance data and the plurality of advertisements, selected for a search results page having the selected advertisement disposed thereon. The system and method thereby determines prospective inventory content for the inventory database based on the selected advertisements and advertising techniques. This prospective inventory content may be used to optimize storage of advertisements and advertising sales techniques, such as giving sales people an indication of which advertising techniques to be marketed or sold.

Abstract: Optimizing search advertising on a search results page in response to a search request includes the search engine determining advertisements for inclusion with the search results, where the advertisements include different advertisement techniques. The method includes selecting one or more of the advertisements for inclusion with the search results page, which may be from different advertising techniques. Additionally, the selection of the advertisements may be based on user click activity, advertisement performance data and the plurality of advertisements, where the advertisements are associated with the different techniques. Thereupon, search result page includes selected advertisements optimized for the benefit of the sponsor and page revenue.

Abstract: A thin film transistor and a method for fabricating the same are disclosed, in which an offset region is affected or biased by a gate voltage to increase on-current, thereby improving on/off characteristic of a device. A first semiconductor layer is formed on a substrate, and insulating layer patterns are formed at both ends of the first semiconductor layer. A second semiconductor layer is formed on the first semiconductor layer and the insulating layer patterns. A gate insulating film is formed on the first and second semiconductor layers and the insulating layer patterns, and an active layer formed on the gate insulating film.

Abstract: Thin film transistor and method for fabricating the same, is disclosed, in which a channel width of the thin film transistor is made greater in a narrow area for improving an on/off performance of the thin film transistor, the thin film transistor including a source electrode formed on a substrate, a columnar conductive layer connected to the source electrode, a drain electrode formed on the conductive layer, a gate insulating film formed to cover the conductive layer and the drain electrode, a gate electrode formed on the gate insulating film surrounding the conductive layer, and an insulting film formed between the source electrode and the gate electrode.

Abstract: A multi-layer semiconductor having a semiconductor substrate, a first gate electrode formed over the substrate, first source and drain electrodes in the substrate on both sides of first and second gate electrodes, the second source and drain electrodes connected to the semiconductor layer. The method includes the steps of forming the first gate electrode over the semiconductor substrate with a first insulating layer inbetween, forming the first source and the first drain electrodes in the substrate on both sides of the first gate electrodes, forming a semiconductor layer over the first gate electrode with a second insulating layer therebetween, forming a second gate electrode on the semiconductor layer, and forming second source, and drain electrodes connected to the semiconductor layer.

Abstract: A CMOS device includes a first conductivity type semiconductor substrate having an active region, the active region including two second conductivity type of impurity regions and a first channel region between the two second conductivity type impurity regions, a field insulation region on the semiconductor substrate for electrical isolation of the active region from other adjacent active regions, a second conductivity type semiconductor layer on the field insulation layer, the semiconductor layer including two first conductivity type impurity regions and a second channel region between the two first conductivity type impurity regions, and a gate electrode over the first channel region in the active region and the second channel region in the semiconductor layer.