Patents by Inventor Seong Hee CHOI
Seong Hee CHOI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200091583Abstract: A chip antenna module includes: a substrate including a feed wiring layer to provide a feed signal, a feeding via connected to the feed wiring layer, and a dummy via separated from the feed wiring layer; and a chip antenna disposed on a first surface of the substrate and including a body portion formed of a dielectric substance, a radiating portion that extends from a first surface of the body portion and is connected to the feeding via and the dummy via, and a grounding portion that extends from a second surface of the body portion opposite the first surface of the body portion.Type: ApplicationFiled: July 9, 2019Publication date: March 19, 2020Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seong Hee CHOI, Sang Jong LEE
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Publication number: 20200083593Abstract: An antenna module includes: a board having a first surface including a ground region and a feed region; and chip antennas mounted on the first surface, each of the chip antennas including a first antenna and a second antenna. The first antenna and the second antenna each include a ground portion bonded to the ground region, and a radiation portion bonded to the feed region. A length of a radiating surface of the first antenna is greater than a mounting height of the first antenna, and a mounting height of the second antenna is greater than a length of a radiating surface of the second antenna. A horizontal spacing distance between the radiation portion of the first antenna and the ground region is greater than a horizontal spacing distance between the radiation portion of the second antenna and the ground region.Type: ApplicationFiled: June 28, 2019Publication date: March 12, 2020Applicant: Samsung Electro-Mechanics.,Co., Ltd.Inventors: Seong Hee CHOI, Sang Jong LEE, Sung Yong AN, Jae Yeong KIM, Ju Hyoung PARK
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Patent number: 10475751Abstract: A fan-out semiconductor package includes: a core member having at least one through-hole formed therein and having a metal layer disposed on an internal surface thereof; an electronic component disposed in the through-hole; an encapsulant encapsulating the core member and the electronic component; a metal plate disposed on an upper surface of the encapsulant; and a wall penetrating the encapsulant to connect the metal layer and the metal plate to each other. The wall includes sections spaced apart from each other.Type: GrantFiled: August 31, 2018Date of Patent: November 12, 2019Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seong Hee Choi, Han Kim, Hyung Joon Kim, Mi Ja Han
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Publication number: 20190237406Abstract: A fan-out semiconductor package includes: a core member having at least one through-hole formed therein and having a metal layer disposed on an internal surface thereof; an electronic component disposed in the through-hole; an encapsulant encapsulating the core member and the electronic component; a metal plate disposed on an upper surface of the encapsulant; and a wall penetrating the encapsulant to connect the metal layer and the metal plate to each other. The wall includes sections spaced apart from each other.Type: ApplicationFiled: August 31, 2018Publication date: August 1, 2019Inventors: Seong Hee CHOI, Han KIM, Hyung Joon KIM, Mi Ja HAN
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Publication number: 20190237861Abstract: A chip antenna includes a radiation portion having a block shape and a first surface and a second surface opposing each other, and configured to receive and radiate a feed signal as an electromagnetic wave; a first block made of a dielectric material and coupled to the first surface of the radiation portion; a second block made of a dielectric material and coupled to the second surface of the radiation portion; a ground portion having a block shape and coupled to the first block, and configured to reflect the electromagnetic wave radiated by the radiation portion back toward the radiation portion; and a director having a block shape and coupled to the second block, wherein an overall width of the ground portion, the first block, and the radiation portion is 2 mm or less, and the first block has a dielectric constant of 3.5 or more to 25 or less.Type: ApplicationFiled: November 9, 2018Publication date: August 1, 2019Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Jae Yeong KIM, Sung Yong AN, Sang Jong LEE, Seong Hee CHOI, Kyu Bum HAN, Jeong Ki RYOO, Byeong Cheol MOON, Chang Hak CHOI
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Publication number: 20190182950Abstract: A circuit board includes a first conductive layer, a second conductive layer, and a first insulating layer disposed between the first conductive layer and the second conductive layer, wherein the first conductive layer includes a signal line, the second conductive layer includes a ground line, and the ground line of the second conductive layer includes a pattern area patterned in a meander shape.Type: ApplicationFiled: February 4, 2019Publication date: June 13, 2019Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Han KIM, Seong Hee CHOI, Dae Hyun PARK
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Patent number: 10251259Abstract: A circuit board includes a first conductive layer, a second conductive layer, and a first insulating layer disposed between the first conductive layer and the second conductive layer, wherein the first conductive layer includes a signal line, the second conductive layer includes a ground line, and the ground line of the second conductive layer includes a pattern area patterned in a meander shape.Type: GrantFiled: June 30, 2016Date of Patent: April 2, 2019Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Han Kim, Seong Hee Choi, Dae Hyun Park
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Patent number: 10217631Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads. The first connection member includes a first electromagnetic interference (EMI) blocking part surrounding side surfaces of the semiconductor chip, the second connection member includes a second EMI blocking part surrounding the redistribution layer, and the first EMI blocking part and the second EMI blocking part are connected to each other.Type: GrantFiled: August 9, 2017Date of Patent: February 26, 2019Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Han Kim, Mi Ja Han, Dae Hyun Park, Sang Jong Lee, Seong Hee Choi
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Patent number: 10083929Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, the second connection member includes a coil pattern layer electrically connected to the connection pads of the semiconductor chip, and at least one of the first connection member and the second connection member includes a dummy pattern layer.Type: GrantFiled: August 1, 2017Date of Patent: September 25, 2018Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seong Hee Choi, Han Kim, Dae Hyun Park, Mi Ja Han
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Publication number: 20180174994Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, the second connection member includes a coil pattern layer electrically connected to the connection pads of the semiconductor chip, and at least one of the first connection member and the second connection member includes a dummy pattern layer.Type: ApplicationFiled: August 1, 2017Publication date: June 21, 2018Inventors: Seong Hee CHOI, Han KIM, Dae Hyun PARK, Mi Ja HAN
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Publication number: 20180138029Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads. The first connection member includes a first electromagnetic interference (EMI) blocking part surrounding side surfaces of the semiconductor chip, the second connection member includes a second EMI blocking part surrounding the redistribution layer, and the first EMI blocking part and the second EMI blocking part are connected to each other.Type: ApplicationFiled: August 9, 2017Publication date: May 17, 2018Inventors: Han KIM, Mi Ja HAN, Dae Hyun PARK, Sang Jong LEE, Seong Hee CHOI
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Patent number: 9853003Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, and the first connection member includes a coil pattern layer electrically connected to the connection pads of the semiconductor chip.Type: GrantFiled: April 6, 2017Date of Patent: December 26, 2017Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Mi Ja Han, Seong Hee Choi, Han Kim, Moon Il Kim, Dae Hyun Park
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Publication number: 20170099729Abstract: A circuit board includes a first conductive layer, a second conductive layer, and a first insulating layer disposed between the first conductive layer and the second conductive layer, wherein the first conductive layer includes a signal line, the second conductive layer includes a ground line, and the ground line of the second conductive layer includes a pattern area patterned in a meander shape.Type: ApplicationFiled: June 30, 2016Publication date: April 6, 2017Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Han KIM, Seong Hee CHOI, Dae Hyun PARK
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Patent number: 9496594Abstract: A printed circuit board includes a signal transmitting part and a ground part disposed having an insulating layer therebetween. The ground part includes an impedance adjusting part.Type: GrantFiled: August 20, 2014Date of Patent: November 15, 2016Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Dae Hyun Park, Han Kim, Seong Hee Choi, Mi Ja Han
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Publication number: 20150340753Abstract: A printed circuit board includes a signal transmitting part and a ground part disposed having an insulating layer therebetween. The ground part includes an impedance adjusting part.Type: ApplicationFiled: August 20, 2014Publication date: November 26, 2015Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Dae Hyun PARK, Han KIM, Seong Hee CHOI, Mi Ja HAN