Patents by Inventor Seong-Young Seo
Seong-Young Seo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11961742Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: GrantFiled: August 23, 2021Date of Patent: April 16, 2024Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Patent number: 10224114Abstract: A memory device may include a memory cell array including a plurality of memory cells, and an internal operation circuit configured to perform a test operation in a test mode using a parallel bit operation of simultaneously comparing a plurality of bits and also perform an internal operation including a comparison operation with respect to external data in a normal mode other than the test mode using the parallel bit operation.Type: GrantFiled: May 20, 2017Date of Patent: March 5, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Je-min Ryu, Hak-soo Yu, Reum Oh, Seong-young Seo, Soo-jung Rho
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Publication number: 20170352434Abstract: A memory device may include a memory cell array including a plurality of memory cells, and an internal operation circuit configured to perform a test operation in a test mode using a parallel bit operation of simultaneously comparing a plurality of bits and also perform an internal operation including a comparison operation with respect to external data in a normal mode other than the test mode using the parallel bit operation.Type: ApplicationFiled: May 20, 2017Publication date: December 7, 2017Inventors: Je-min RYU, Hak-soo YU, Reum OH, Seong-young SEO, Soo-jung RHO
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Patent number: 9659621Abstract: A memory system is provided which includes multiple semiconductor memories having arrays of memory cells and a memory controller configured to provide an address in common to the multiple memories. First and second addresses corresponding to first and second rows of memory cells in first and second memories are selected according to the address in common. The first row and its adjacent rows in the first memory can all be different from the second row and its adjacent rows in the second semiconductor memory. Different conversion schemes can provide scramble information used to convert the address in common into the first and second addresses.Type: GrantFiled: December 9, 2013Date of Patent: May 23, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seong-Young Seo, Chul Woo Park
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Patent number: 9519531Abstract: In one example embodiment, a memory device includes a cell array configured to receive data at an associated address in response to a write command. The memory device further includes a storage unit configured to receive the associated address and the data in response to the write command and output the data to the associated address of the cell array in response to a rewrite command. The memory device further includes a violation determining unit configured to determine violation data, count a number of the violation data and determine data written to the storage unit as the violation data if a storage duration of the written data is less than a write recovery time (tWR).Type: GrantFiled: October 16, 2013Date of Patent: December 13, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Seong-Young Seo, Chul-Woo Park
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Patent number: 9465757Abstract: A memory device used with a relaxed timing requirement specification according to temperatures, an operation method thereof, and a memory controller and a memory system using the memory device are provided. The memory device has a first timing characteristic at a first temperature and a second timing characteristic that is longer than the first timing characteristic at a second temperature. If a temperature of the memory device is higher than a reference temperature, the memory controller controls the first timing characteristic as a timing requirement specification of the memory device. If the temperature of the memory device is lower than the reference temperature, the memory controller controls the second timing characteristic as the timing requirement specification of the memory device.Type: GrantFiled: May 30, 2014Date of Patent: October 11, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jong-pil Son, Uk-song Kang, Chul-woo Park, Seong-young Seo
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Patent number: 9449673Abstract: A memory device includes a memory cell array, a multi-purpose register (MPR) and a control unit. The memory cell array includes a plurality of memory blocks. The multi-purpose register (MPR) stores physical address information for each of the plurality of memory blocks. The control unit outputs the physical address information stored in the multi-purpose register in response to an MPR read command received from a memory controller.Type: GrantFiled: October 15, 2013Date of Patent: September 20, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Seong-Young Seo
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Publication number: 20150199234Abstract: A method of operating a memory device includes: checking for errors in data read from a first address of a memory cell array of the memory device; counting the number of errors that occurred in the data read from the first address; receiving a first command for data read from the first address; determining whether the number of errors that occurred in the data read from the first address is greater than or equal to a first value; and mapping the first address to a second address, if the number of errors that occurred in the data read from the first address is greater than or equal to the first value.Type: ApplicationFiled: January 13, 2015Publication date: July 16, 2015Inventors: HYOJIN CHOI, SU-A KIM, HAK-SOO YU, SEONG-YOUNG SEO, MU-JIN SEO
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Patent number: 9076514Abstract: A method of copying a page in a memory device having a plurality of memory blocks and a plurality of sets of bit lines is disclosed, wherein each of the plurality of memory blocks includes a plurality of pages, and each set of bit lines corresponds to a respective memory block, wherein first bit lines of a source memory block that includes a source page are respectively coupled to second bit lines of a target memory block that includes a target page. The method includes disconnecting between the first bit lines of the source memory block including a source page and from the second bit lines of a the target memory block including a target page; transferring data stored in the source page to the first bit lines of the source memory block; transferring the data from the first bit lines of the source memory block to the second bit lines of the target memory block; and writing the data transferred to the second bit lines of the target memory block into the target page.Type: GrantFiled: October 15, 2013Date of Patent: July 7, 2015Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Seong-Young Seo
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Publication number: 20140359242Abstract: A memory device used with a relaxed timing requirement specification according to temperatures, an operation method thereof, and a memory controller and a memory system using the memory device are provided. The memory device has a first timing characteristic at a first temperature and a second timing characteristic that is longer than the first timing characteristic at a second temperature. If a temperature of the memory device is higher than a reference temperature, the memory controller controls the first timing characteristic as a timing requirement specification of the memory device. If the temperature of the memory device is lower than the reference temperature, the memory controller controls the second timing characteristic as the timing requirement specification of the memory device.Type: ApplicationFiled: May 30, 2014Publication date: December 4, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: Jong-pil Son, Uk-song Kang, Chul-woo Park, Seong-young Seo
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Publication number: 20140241099Abstract: A memory system is provided which includes multiple semiconductor memories having arrays of memory cells and a memory controller configured to provide an address in common to the multiple memories. First and second addresses corresponding to first and second rows of memory cells in first and second memories are selected according to the address in common. The first row and its adjacent rows in the first memory can all be different from the second row and its adjacent rows in the second semiconductor memory. Different conversion schemes can provide scramble information used to convert the address in common into the first and second addresses.Type: ApplicationFiled: December 9, 2013Publication date: August 28, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: Seong-Young Seo, Chul Woo Park
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Publication number: 20140185395Abstract: A method of copying a page in a memory device having a plurality of memory blocks and a plurality of sets of bit lines is disclosed, wherein each of the plurality of memory blocks includes a plurality of pages, and each set of bit lines corresponds to a respective memory block, wherein first bit lines of a source memory block that includes a source page are respectively coupled to second bit lines of a target memory block that includes a target page. The method includes disconnecting between the first bit lines of thea source memory block including a source page and from the second bit lines of a the target memory block including a target page; transferring data stored in the source page to the first bit lines of the source memory block; transferring the data from the first bit lines of the source memory block to the second bit lines of the target memory block; and writing the data transferred to the second bit lines of the target memory block into the target page.Type: ApplicationFiled: October 15, 2013Publication date: July 3, 2014Inventor: Seong-Young Seo
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Publication number: 20140189226Abstract: A memory device includes a memory cell array, a multi-purpose register (MPR) and a control unit. The memory cell array includes a plurality of memory blocks. The multi-purpose register (MPR) stores physical address information for each of the plurality of memory blocks. The control unit outputs the physical address information stored in the multi-purpose register in response to an MPR read command received from a memory controller.Type: ApplicationFiled: October 15, 2013Publication date: July 3, 2014Inventor: Seong-Young SEO
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Publication number: 20140149808Abstract: In one example embodiment, a memory device includes a cell array configured to receive data at an associated address in response to a write command. The memory device further includes a storage unit configured to receive the associated address and the data in response to the write command and output the data to the associated address of the cell array in response to a rewrite command. The memory device further includes a violation determining unit configured to determine violation data, count a number of the violation data and determine data written to the storage unit as the violation data if a storage duration of the written data is less than a write recovery time (tWR).Type: ApplicationFiled: October 16, 2013Publication date: May 29, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seong-Young SEO, Chul-Woo PARK
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Patent number: 8478366Abstract: A mobile terminal is disclosed. Specifically, in a mobile terminal having an image photographing or projecting function, the present invention is able to change a photographing or projecting angle of the mobile terminal into a horizontal or vertical direction. And, the present invention is able to change a display direction of an image displayed on a display unit of the mobile terminal in correspondence with the changed photographing or projecting angle to correspond to the changed photographing or projecting angle.Type: GrantFiled: October 19, 2009Date of Patent: July 2, 2013Assignee: LG Electronics Inc.Inventors: Duck Moon Shin, Seong Young Seo, Jeong Hyuk Yoon
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Patent number: 8223568Abstract: A semiconductor memory device capable of preventing or minimizing bit line disturbance and performing a low-voltage high-speed operation includes a read data path circuit including a bit line sense amplifier, a local input/output line sense amplifier, a column selecting unit to operationally connect bit lines connected to the bit line sense amplifier to local input/output lines connected to the local input/output line sense amplifier in response to a column selection signal, and a local input/output line precharging unit to precharge the pair of local input/output lines by a first precharging unit, equalizing the pair of local input/output lines by an equalizing unit, and to precharge the local input/output lines by a second precharging unit following an elapsed time after the bit line sense amplifier is activated, while the column selection is deactivated.Type: GrantFiled: October 19, 2009Date of Patent: July 17, 2012Assignee: Samsung Electronics Co., Ltd.Inventor: Seong-Young Seo
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Publication number: 20100157702Abstract: A semiconductor memory device capable of preventing or minimizing bit line disturbance and performing a low-voltage high-speed operation includes a read data path circuit including a bit line sense amplifier, a local input/output line sense amplifier, a column selecting unit to operationally connect bit lines connected to the bit line sense amplifier to local input/output lines connected to the local input/output line sense amplifier in response to a column selection signal, and a local input/output line precharging unit to precharge the pair of local input/output lines by a first precharging unit, equalizing the pair of local input/output lines by an equalizing unit, and to precharge the local input/output lines by a second precharging unit following an elapsed time after the bit line sense amplifier is activated, while the column selection is deactivated.Type: ApplicationFiled: October 19, 2009Publication date: June 24, 2010Inventor: Seong-Young Seo
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Publication number: 20100099458Abstract: A mobile terminal is disclosed. Specifically, in a mobile terminal having an image photographing or projecting function, the present invention is able to change a photographing or projecting angle of the mobile terminal into a horizontal or vertical direction. And, the present invention is able to change a display direction of an image displayed on a display unit of the mobile terminal in correspondence with the changed photographing or projecting angle to correspond to the changed photographing or projecting angle.Type: ApplicationFiled: October 19, 2009Publication date: April 22, 2010Inventors: Duck Moon SHIN, Seong Young Seo, Jeong Hyuk Yoon
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Patent number: 7684279Abstract: A semiconductor memory device having a hierarchical input/output (I/O) line structure may include a plurality of core blocks, with each core block including a plurality of memory banks sharing an input/output sense amplifier. Data input/output lines may be arranged on each of the plurality of core blocks.Type: GrantFiled: June 28, 2007Date of Patent: March 23, 2010Assignee: Samsung Electronics Co., Ltd.Inventor: Seong-young Seo
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Patent number: 7602653Abstract: A data buffer, such as a data strobe input buffer or a data input buffer, which may operate in multiple modes, such as a single mode (SM) and a dual mode (DM) and where the mode is selected by providing a signal, such as an external signal such as an address signal or an external command signal. A data buffer which can be used for a SM/DM dual-use and can improve a data setup/hold margin. A semiconductor memory device including one or more of the data buffers described above. A method for controlling propagation delay times which can improve a data setup/hold margin in a SM/DM dual-use data buffer.Type: GrantFiled: September 15, 2004Date of Patent: October 13, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Seong-young Seo, Jung-bae Lee, Byong-mo Moon