Patents by Inventor Serge Pontarollo

Serge Pontarollo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10396736
    Abstract: The transmission device comprising a transmit stage configured to deliver a transmission signal on an input-output node of an antenna and comprising a power transistor coupled to the input-output node and configured to amplify a signal to be transmitted. The device comprises a receive stage configured to receive a reception signal on the input-output node and comprising an attenuator circuit configured to attenuate the reception signal. The attenuator circuit comprising the power transistor and a control circuit able to place the power transistor in a triode mode.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: August 27, 2019
    Assignee: STMICROELECTRONICS (GRENOBLE₂SAS
    Inventors: Michel Ayraud, Serge Ramet, Serge Pontarollo
  • Patent number: 10024886
    Abstract: A circuit includes a Wheatstone bridge and a correction circuit operable to correct an output voltage offset of the Wheatstone bridge. The correction circuit includes a supply module configured to supply the Wheatstone bridge with a voltage and output a first current applied to the Wheatstone bridge and output a second current proportional to the first current. A digital/analog current converter outputs a correction current to the outputs of the Wheatstone bridge circuit in response to a digital correction signal and the second current.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: July 17, 2018
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Thierry Masson, Serge Pontarollo
  • Publication number: 20180152158
    Abstract: The transmission device comprising a transmit stage configured to deliver a transmission signal on an input-output node of an antenna and comprising a power transistor coupled to the input-output node and configured to amplify a signal to be transmitted. The device comprises a receive stage configured to receive a reception signal on the input-output node and comprising an attenuator circuit configured to attenuate the reception signal. The attenuator circuit comprising the power transistor and a control circuit able to place the power transistor in a triode mode.
    Type: Application
    Filed: May 31, 2017
    Publication date: May 31, 2018
    Inventors: Michel Ayraud, Serge Ramet, Serge Pontarollo
  • Patent number: 9607906
    Abstract: An integrated circuit chip includes trenches at least partially surrounding a critical portion of a circuit that is sensitive to temperature variations. The trenches are locally interrupted in order to permit circuit connections to pass between the critical portion and an outer portion containing a remainder of the circuit. The critical portion includes heating resistors and a temperature sensor.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: March 28, 2017
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Serge Pontarollo, Philippe Maige
  • Publication number: 20160154031
    Abstract: A circuit includes a Wheatstone bridge and a correction circuit operable to correct an output voltage offset of the Wheatstone bridge. The correction circuit includes a supply module configured to supply the Wheatstone bridge with a voltage and output a first current applied to the Wheatstone bridge and output a second current proportional to the first current. A digital/analog current converter outputs a correction current to the outputs of the Wheatstone bridge circuit in response to a digital correction signal and the second current.
    Type: Application
    Filed: August 27, 2015
    Publication date: June 2, 2016
    Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Thierry Masson, Serge Pontarollo
  • Publication number: 20160049341
    Abstract: An integrated circuit chip includes trenches at least partially surrounding a critical portion of a circuit that is sensitive to temperature variations. The trenches are locally interrupted in order to permit circuit connections to pass between the critical portion and an outer portion containing a remainder of the circuit. The critical portion includes heating resistors and a temperature sensor.
    Type: Application
    Filed: June 22, 2015
    Publication date: February 18, 2016
    Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Serge Pontarollo, Philippe Maige
  • Patent number: 8665024
    Abstract: An amplifier including: an output stage having two first power supply terminals capable of receiving a first voltage defined by first positive and negative variable potentials with respect to a reference potential; and a circuit for controlling the current in transistors of the output stage with a reference value, wherein the output stage includes a first and a second MOS transistors in series between the first two terminals, the junction point of this series association defining an output terminal of the amplifier; the control circuit includes two measurement MOS transistors having their respective sources and gates coupled to the respective sources and gates of the first and second transistors of the output stage; at least one control branch, comprising transistors in series between two terminals of application of a second voltage, defines nodes connected to the gates of the output transistors, said second voltage being greater than the first one.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: March 4, 2014
    Assignee: EASII IC SAS
    Inventors: Alexandre Huffenus, Serge Pontarollo
  • Patent number: 8564096
    Abstract: Methods and apparatus according to various aspects of the present invention may operate in conjunction with a resistor formed of a lightly-doped P-type region formed in a portion of a lightly-doped N-type semiconductor well extending on a lightly-doped P-type semiconductor substrate, the well being laterally delimited by a P-type wall extending down to the substrate, the portion of the well being delimited, vertically, by a heavily-doped N-type area at the limit between the well and the substrate and, horizontally, by a heavily-doped N-type wall. A diode may be placed between a terminal of the resistor and the heavily-doped N-type wall, the cathode of the diode being connected to said terminal.
    Type: Grant
    Filed: July 4, 2008
    Date of Patent: October 22, 2013
    Assignee: STMicroelectronics SA
    Inventors: Serge Pontarollo, Dominique Berger
  • Publication number: 20120274405
    Abstract: An amplifier including: an output stage having two first power supply terminals capable of receiving a first voltage defined by first positive and negative variable potentials with respect to a reference potential; and a circuit for controlling the current in transistors of the output stage with a reference value, wherein the output stage includes a first and a second MOS transistors in series between the first two terminals, the junction point of this series association defining an output terminal of the amplifier; the control circuit includes two measurement MOS transistors having their respective sources and gates coupled to the respective sources and gates of the first and second transistors of the output stage; at least one control branch, comprising transistors in series between two terminals of application of a second voltage, defines nodes connected to the gates of the output transistors, said second voltage being greater than the first one.
    Type: Application
    Filed: April 10, 2012
    Publication date: November 1, 2012
    Applicant: EASII IC
    Inventors: Alexandre HUFFENUS, Serge PONTAROLLO
  • Patent number: 8149056
    Abstract: An amplifier having an output stage with a complementary pair of first and second transistors each coupled to an output node of the amplifier; control circuitry arranged to provide a control signal at a control node of the first transistor based on the voltage at an input node of the amplifier; and adjustment circuitry arranged to adjust the control signal to maintain the current through the first transistor above a minimum value.
    Type: Grant
    Filed: August 12, 2009
    Date of Patent: April 3, 2012
    Assignee: STMicroelectronics (Grenoble) SAS
    Inventors: Serge Pontarollo, Serge Ramet
  • Publication number: 20120007663
    Abstract: An integrated circuit includes an electronic circuit and a device for adjustment of the operating parameter value of the electronic circuit. The electronic circuit comprises a resistive stage. The device comprises a first circuit portion adapted to adjust said operating parameter when the device is active and the electronic circuit is inactive, and adapted to be inactive when the electronic circuit is active, and a second circuit portion adapted to determine the active or inactive state of the device in response to the value of an external control signal. The integrated circuit comprises a first external terminal for the connection to ground, a second external terminal for inputting said control signal, a further external terminal for inputting a further external signal and a deactivation circuit driven by said further external signal to deactivate the electronic circuit when the device is active.
    Type: Application
    Filed: June 16, 2011
    Publication date: January 12, 2012
    Applicants: STMICROELECTRONICS S.R.L., STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Mario Ricca, Jean Camiolo, Michele Vaiana, Serge Pontarollo, Giuseppe Bruno
  • Publication number: 20100253423
    Abstract: Methods and apparatus according to various aspects of the present invention may operate in conjunction with a resistor formed of a lightly-doped P-type region formed in a portion of a lightly-doped N-type semiconductor well extending on a lightly-doped P-type semiconductor substrate, the well being laterally delimited by a P-type wall extending down to the substrate, the portion of the well being delimited, vertically, by a heavily-doped N-type area at the limit between the well and the substrate and, horizontally, by a heavily-doped N-type wall. A diode may be placed between a terminal of the resistor and the heavily-doped N-type wall, the cathode of the diode being connected to said terminal.
    Type: Application
    Filed: July 4, 2008
    Publication date: October 7, 2010
    Inventors: Serge Pontarollo, Dominique Berger
  • Publication number: 20100039180
    Abstract: An amplifier having an output stage with a complementary pair of first and second transistors each coupled to an output node of the amplifier; control circuitry arranged to provide a control signal at a control node of the first transistor based on the voltage at an input node of the amplifier; and adjustment circuitry arranged to adjust the control signal to maintain the current through the first transistor above a minimum value.
    Type: Application
    Filed: August 12, 2009
    Publication date: February 18, 2010
    Applicant: STMicroelectronics (Grenoble) SAS
    Inventors: Serge Pontarollo, Serge Ramet
  • Patent number: 6963239
    Abstract: Adjustment of an operating parameter of an analog electronic circuit is effectuated through a set of adjustment resistances (22) that can be configured from outside the circuit to modulate the value of resistances (R1, R2) in the circuit and thus to adjust the value of the parameter. Fusible elements (20) each associated with one of the said adjustment resistances are selected and activated to configure the resistances of the adjustment device. A combinational logic circuit (18) receives a control signal as input applied from outside the circuit onto a terminal (C) operates to select one of the fusible elements (20) as a function of a signal applied thereto.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: November 8, 2005
    Assignee: STMicroelectronics S.A.
    Inventors: Sebastien Laville, Serge Pontarollo
  • Patent number: 6953971
    Abstract: A device for adjusting an integrated circuit before encapsulation includes a first MOS transistor having a gate and a source connected together, and a body connected to a voltage reference. A first resistor is connected in parallel with the first MOS transistor. A second MOS transistor is connected in series with the first MOS transistor. The second MOS transistor has a gate and a source connected together, and a body connected to the voltage reference. A second resistor is connected in parallel with the second MOS transistor. A first terminal is connected to the source of the first MOS transistor, and a second terminal is connected to the source of the second MOS transistor. The first terminal is accessible externally after the integrated circuit has been encapsulated.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: October 11, 2005
    Assignee: STMircoelectronics SA
    Inventors: Sébastien Laville, Serge Pontarollo
  • Patent number: 6940319
    Abstract: A device for controlling a voltage-controlled switch, including two circuits respectively for setting to the high level and for setting to the low level a control terminal of the voltage-controlled switch, one at least of the circuits including a power transistor capable of connecting the control terminal to a high, respectively low voltage, a bipolar control transistor having its emitter, respectively its collector, connected to the control terminal of the power transistor, the base of the control transistor being likely to receive a control current and a first diode connected between a first predetermined voltage smaller than the high voltage, and the base of the control transistor.
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: September 6, 2005
    Assignee: STMicroelectronics S.A.
    Inventors: Laurent Dulau, Serge Pontarollo
  • Publication number: 20050073350
    Abstract: Adjustment of an operating parameter of an analog electronic circuit is effectuated through a set of adjustment resistances (22) that can be configured from outside the circuit to modulate the value of resistances (R1, R2) in the circuit and thus to adjust the value of the parameter. Fusible elements (20) each associated with one of the said adjustment resistances are selected and activated to configure the resistances of the adjustment device. A combinational logic circuit (18) receives a control signal as input applied from outside the circuit onto a terminal (C) operates to select one of the fusible elements (20) as a function of a signal applied thereto.
    Type: Application
    Filed: July 28, 2003
    Publication date: April 7, 2005
    Inventors: Sebastien Laville, Serge Pontarollo
  • Publication number: 20040239402
    Abstract: A device for controlling a voltage-controlled switch, including two circuits respectively for setting to the high level and for setting to the low level a control terminal of the voltage-controlled switch, one at least of the circuits including a power transistor capable of connecting the control terminal to a high, respectively low voltage, a bipolar control transistor having its emitter, respectively its collector, connected to the control terminal of the power transistor, the base of the control transistor being likely to receive a control current and a first diode connected between a first predetermined voltage smaller than the high voltage, and the base of the control transistor.
    Type: Application
    Filed: July 9, 2003
    Publication date: December 2, 2004
    Inventors: Laurent Dulau, Serge Pontarollo
  • Publication number: 20040150049
    Abstract: A device for adjusting an integrated circuit before encapsulation includes a first MOS transistor having a gate and a source connected together, and a body connected to a voltage reference. A first resistor is connected in parallel with the first MOS transistor. A second MOS transistor is connected in series with the first MOS transistor. The second MOS transistor has a gate and a source connected together, and a body connected to the voltage reference. A second resistor is connected in parallel with the second MOS transistor. A first terminal is connected to the source of the first MOS transistor, and a second terminal is connected to the source of the second MOS transistor. The first terminal is acessible externally after the integrated circuit has been encapsulated.
    Type: Application
    Filed: January 20, 2004
    Publication date: August 5, 2004
    Inventors: Sebastien Laville, Serge Pontarollo
  • Patent number: 6653669
    Abstract: An integrated circuit includes an adjustment resistor, and at least one control transistor connected to a first voltage reference. An adjustment element is connected in parallel with the adjustment resistor for adjusting a combined electrical resistance of the adjustment element and the resistor. The adjustment element is connected to the control transistor, and includes a substrate, and a MOS transistor having a source, a drain, and a gate on the substrate. The MOS transistor defines a parasitic bipolar transistor with the substrate. The adjustment element further includes a first resistor connected between the substrate and the source, and a second resistor is connected between the substrate and the drain. A diode is connected in series with the second resistor between the substrate and the drain. The gate and the source of the MOS transistor are connected together with the MOS transistor being broken down so that the adjustable element forms an electrical resistance.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: November 25, 2003
    Assignee: STMicroelectronics SA
    Inventors: Sébastien Laville, Serge Pontarollo