Abstract: An integrated circuit includes an adjustment resistor, and at least one control transistor connected to a first voltage reference. An adjustment element is connected in parallel with the adjustment resistor for adjusting a combined electrical resistance of the adjustment element and the resistor. The adjustment element is connected to the control transistor, and includes a substrate, and a MOS transistor having a source, a drain, and a gate on the substrate. The MOS transistor defines a parasitic bipolar transistor with the substrate. The adjustment element further includes a first resistor connected between the substrate and the source, and a second resistor is connected between the substrate and the drain. A diode is connected in series with the second resistor between the substrate and the drain. The gate and the source of the MOS transistor are connected together with the MOS transistor being broken down so that the adjustable element forms an electrical resistance.

Abstract: A method is provided for controlling a capacitive charge pump. The charge pump is regulated by a regulating voltage when the supply voltage is greater than the regulating voltage. When the supply voltage is less than a triggering voltage, which is less than or equal to the regulating voltage, the charge pump is automatically supplied between the supply voltage and ground. In one preferred method, the charge pump has a first supply terminal connected to the supply voltage and a second supply terminal that is automatically grounded when the supply voltage is less than the triggering voltage. Also provided is a capacitive charge pump device that includes a charge pump having first and second supply terminals, a voltage regulator delivering a regulating voltage, a switch connected between the second supply terminal and ground, and switch control circuitry for automatically controlling the switch.

Abstract: A process for forming an electrical resistance in an integrated MOS transistor includes applying a first voltage to the source and gate of the MOS transistor, and applying a second voltage to the drain of the MOS transistor. A prebiasing voltage is applied to the substrate of the MOS transistor to make the base/emitter junction of a parasitic bipolar transistor of the MOS transistor conduct. The first and second voltages are capable of initiating a breakdown of the MOS transistor by an avalanche of the drain/substrate junction, an irreversible breakdown of the drain/substrate junction, and a short circuit between the drain and the source.

Abstract: A method is provided for generating a pulse signal with modulable-width pulses. A set-point signal is generated and compared with a control signal so as to produce the pulse signal. When the control signal is a two-state logical signal, a first reference voltage is taken as the set-point signal. When the control signal is a continuous analog voltage, the set-point signal is varied between the first reference voltage and a predetermined second reference voltage, which is higher than the first reference voltage. Also provided is a device for generating a pulse signal with modulable-width pulses. The device includes a set-point signal generator, a control signal generator, and a comparator that outputs the pulse signal. The set-point signal generator includes a first voltage source for generating a first reference voltage, and a second voltage source for generating a second reference voltage, which is higher than the first reference voltage.

Abstract: The present invention relates to a Vbe/R bias source of the type including a first reference branch, a second output branch, and means of correction of an output current by an error current proportional to the current flowing in the reference branch.

Abstract: This invention relates to a device for protecting a circuit against voltage surges, including a MOS transistor of a first type connected to first and second supply terminals by its source and its drain, respectively; a MOS transistor of a second type connected between the second supply terminal and the gate of the first type transistor, by its source and its drain, respectively; and a capacitor having a first terminal connected to the first supply terminal and a second terminal connected to the gate of the second type transistor.

Abstract: A DC-to-DC converter includes an inductor and a diode that are connected in series between a positive supply terminal and a positive output terminal, and a storage capacitor connected between the positive output terminal and a negative terminal. The DC-to-DC converter further includes a first switch including a lateral MOS transistor connected between the anode of the diode and the negative terminal, a second switch including a vertical MOS transistor connected in parallel to the first switch, a first active load circuit connected between the positive and negative supply terminals and designed to control the first switch, a second active load circuit connected between the positive output terminal and the negative terminal and designed to control the second switch, and an oscillator providing a periodic signal for controlling the active loads.

Abstract: A device for compensating the offset of an input stage having two current output legs, the first of which is connected to the input of a real stage pushing into this first leg a parasitic current; the device including a fake stage pushing a compensation current having a value equal to the value of the parasitic current divided by a predetermined factor greater than 1, this compensation current being amplified by an amplifier having a gain equal to said predetermined factor, before being pushed into the second output leg of the input stage.