Patents by Inventor Sergey Sofer

Sergey Sofer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050174159
    Abstract: An apparatus for voltage level shifting comprising a voltage shifter for converting a first input voltage to a second output voltage; a first semiconductor switch arrangement and a second semiconductor switch arrangement that are responsive to a control signal for switching the voltage shifter between a first operational state and a second operational state and thereby allow the voltage shifter to be placed in the first operational state when the first input voltage is within a first voltage region and to place the voltage shifter in the second operational state when the first input voltage is in a second voltage region.
    Type: Application
    Filed: February 10, 2005
    Publication date: August 11, 2005
    Inventors: Anton Rozen, Michael Priel, Sergey Sofer
  • Publication number: 20040263266
    Abstract: An arrangement (100) and method for a high precision and low distortion digital delay line with infinite delay. The digital delay line has an oscillating ring (110) with an odd number of inverting elements that triggers a counter (120). A comparator (130) compares the counter and the MSB of a given delay word. A line of inverters (150-159), double the odd number in the ring oscillator, is connected to a MUX (160) controlled by the LSB of the delay word.
    Type: Application
    Filed: June 18, 2004
    Publication date: December 30, 2004
    Inventors: Yair Rosenbaum, Shai Sade, Sergey Sofer, Emil Yehushua
  • Publication number: 20040061488
    Abstract: A digital test module (5) is provided for testing a phase locked loop circuit. The module (5) includes phase detection circuitry (10) for performing phase measurements of the phase locked loop circuit and analogue test circuitry (20) for testing at least one analogue element of the phase locked loop circuit. Frequency measurement circuitry (30) is provided for performing frequency measurements of the phase locked loop circuit, as is circuitry (40) for performing calibration and jitter measurements. In this way cycle-to-cycle and phase jitter measurements may be made. A calibration mechanism is provided allowing a process evaluation to be made and which allows the jitter data to be provided in a few seconds. The fully digital design facilitates easy manufacture and ready retargeting of the module to diverse applications and processes.
    Type: Application
    Filed: September 25, 2003
    Publication date: April 1, 2004
    Inventors: Yair Rosenbaum, Sergey Sofer, Emil Yehushua