Patents by Inventor Sergio Lecce

Sergio Lecce has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11888304
    Abstract: An integrated circuit with a hot-plug protection circuit includes input pins and an output pin. The input pins are electrically coupled to a common node in the hot-plug protection circuit via respective electrical connections. The integrated circuit includes clamping circuitry coupled between the common node and the output pin, the clamping circuitry activatable as a result of a voltage spike applied across the clamping circuitry. The plurality of electrical connections and the clamping circuitry provide respective current discharge paths between the input pins in the input pins and the output pin, the respective current discharge paths configured to become conductive as a result of a voltage spike applied to any of the input pins in the plurality of input pins being transferred to the common node via the respective electrical connection in the plurality of electrical connections electrically coupling said any of said input pins to the common node.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: January 30, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Vittorio D'Angelo, Salvatore Cannavacciuolo, Sergio Lecce, Valerio Bendotti, Orazio Pennisi
  • Patent number: 11637683
    Abstract: An input signal arranged in frames is received. The frames include a cyclic redundancy check (CRC) field including a number of bits having bit edges. A timing signal is generated to include adjustable duration waveforms at one of a first duration value and a second duration value. A CRC check determines the occurrence, over the duration, of a number of waveforms of the timing signal having their duration adjusted to one of the first duration value and the second duration value which corresponds to the number of bits. A check signal is produced having a pass/fail value. If pass, the duration of the waveforms in the timing signal is maintained adjusted to the one of the first duration value and the second duration value. If fail, the duration of the waveforms in the timing signal is re-adjusted to the other of the first duration value and the second duration value.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: April 25, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Carmelo Burgio, Walter Girardi, Sergio Lecce
  • Publication number: 20210385059
    Abstract: An input signal arranged in frames is received. The frames include a cyclic redundancy check (CRC) field including a number of bits having bit edges. A timing signal is generated to include adjustable duration waveforms at one of a first duration value and a second duration value. A CRC check determines the occurrence, over the duration, of a number of waveforms of the timing signal having their duration adjusted to one of the first duration value and the second duration value which corresponds to the number of bits. A check signal is produced having a pass/fail value. If pass, the duration of the waveforms in the timing signal is maintained adjusted to the one of the first duration value and the second duration value. If fail, the duration of the waveforms in the timing signal is re-adjusted to the other of the first duration value and the second duration value.
    Type: Application
    Filed: June 1, 2021
    Publication date: December 9, 2021
    Applicant: STMicroelectronics S.r.l.
    Inventors: Carmelo BURGIO, Walter GIRARDI, Sergio LECCE
  • Patent number: 11150279
    Abstract: A circuit includes a switching circuit including a first switch and a second switch. A current sensing circuit is coupled to the switching circuit to sense a first current through the first switch and to generate a first sensed current signal based on the sensed first current, and configured to sense a second current through the second switch and to generate a second sensed current signal based on the sensed second current. An output circuit is coupled to the current sensing circuit and is configured to generate a failure signal based on the first sensed current signal and the second sensed current signal.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: October 19, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventors: Vanni Poletto, Riccardo Miglierina, Antonio Davide Leone, Sergio Lecce
  • Patent number: 10982785
    Abstract: A circuit for controlling current in an inductive load is provided. The circuit includes a driver circuit for driving a load current in the inductive load. The driver circuit includes a switch, which is switched on to increase the load current and a recirculation diode, which re-circulates the load current when the switch is off. The circuit includes a control module that generates a control signal to switch on and off the switch. The control module includes a PWM current controller comprising a negative feedback closed loop implementing at least a proportional control and an integral control. The PWM current controller receives a target current value and an estimated current flowing in the load during a measurement PWM cycle. The PWM current controller generates the control signal for a control input of the switch based on an error between the target current and the estimated current.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: April 20, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventor: Sergio Lecce
  • Patent number: 10813187
    Abstract: An integrated device for driving a lighting load, such as a LED, has a first memory element, configured to store a nominal duty-cycle at a nominal supply voltage. An actual voltage acquisition element is configured to detect an actual supply voltage. A processing unit is coupled to the first memory element and to the actual voltage acquisition element and configured to calculate a voltage compensated duty-cycle. A driver unit is coupled to the processing unit and is configured to be supplied according to the voltage compensated duty-cycle.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: October 20, 2020
    Assignees: STMicroelectronics S.R.L., STMicroelectronics Application GMBH
    Inventors: Manuel Gaertner, Sergio Lecce, Giovanni Luca Torrisi
  • Patent number: 10784858
    Abstract: A driver circuit includes a supply node, a control node configured to receive a control signal, and an output node. An output transistor is coupled to the output node to provide the CAN bus drive signal via the current path through the output transistor. A current mirror is in a current line from the supply node to the output node through the output transistor. The current line includes an intermediate portion between the current mirror and the output transistor. The current mirror is configured to be switched, as a function of the control signal between a first, dominant mode, with the CAN bus drive signal applied to the output node via the output transistor, and a second, recessive mode, with the output transistor providing a high output impedance at the output node.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: September 22, 2020
    Assignees: STMICROELECTRONICS S.R.L., STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Sergio Lecce, Gilles Troussel
  • Publication number: 20200136366
    Abstract: An integrated circuit with a hot-plug protection circuit includes input pins and an output pin. The input pins are electrically coupled to a common node in the hot-plug protection circuit via respective electrical connections. The integrated circuit includes clamping circuitry coupled between the common node and the output pin, the clamping circuitry activatable as a result of a voltage spike applied across the clamping circuitry. The plurality of electrical connections and the clamping circuitry provide respective current discharge paths between the input pins in the input pins and the output pin, the respective current discharge paths configured to become conductive as a result of a voltage spike applied to any of the input pins in the plurality of input pins being transferred to the common node via the respective electrical connection in the plurality of electrical connections electrically coupling said any of said input pins to the common node.
    Type: Application
    Filed: October 29, 2019
    Publication date: April 30, 2020
    Inventors: Vittorio D'Angelo, Salvatore Cannavacciuolo, Sergio Lecce, Valerio Bendotti, Orazio Pennisi
  • Publication number: 20190383861
    Abstract: A circuit includes a switching circuit including a first switch and a second switch. A current sensing circuit is coupled to the switching circuit to sense a first current through the first switch and to generate a first sensed current signal based on the sensed first current, and configured to sense a second current through the second switch and to generate a second sensed current signal based on the sensed second current. An output circuit is coupled to the current sensing circuit and is configured to generate a failure signal based on the first sensed current signal and the second sensed current signal.
    Type: Application
    Filed: August 28, 2019
    Publication date: December 19, 2019
    Inventors: Vanni Poletto, Riccardo Miglierina, Antonio Davide Leone, Sergio Lecce
  • Patent number: 10499547
    Abstract: A thermal control process for an electronic power device including a multi junction integrated circuit may include defining a first and at least one second groups of junctions, with each group including one first and at least one second junctions, and associating a thermal detector with each group. A first group control may be executed which detects group electric signals representative of the temperature detected by the thermal detectors, processes the group electric signals with reference to a group critical thermal event, identifies a critical group when the corresponding group electric signal detects the critical group thermal event, and generates group deactivating signals suitable for selectively deactivating the first and the at least one second junctions of the identified critical group with respect to the remaining junctions of the integrated circuit.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: December 3, 2019
    Assignees: STMICROELECTRONICS S.R.L., STMICROELECTRONICS APPLICATION GMBH
    Inventors: Domenico Massimo Porto, Giovanni Luca Torrisi, Manuel Gaertner, Sergio Lecce
  • Patent number: 10444264
    Abstract: A device measures the current in an inductive load using two separate current-measuring paths to detect the current in the inductive load. The inductive load is connected between first and second nodes, and the first node connected to a first voltage. The device includes first and second transistors cascaded together between the first node and a third node that is connected to a second voltage. First and second sense amplifiers measure the current in the inductive load. The first and second sense amplifiers are connected to at least one terminal of the first and second transistors. Two blocks sample and hold signals from the first and second sense amplifiers, which represent, respectively, the currents in the two separate current-measuring paths. The two currents are subtracted in a comparison node for generating an error signal that is compared with a predefined window and if outside the window a failure signal is generated.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: October 15, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Vanni Poletto, Riccardo Miglierina, Antonio Davide Leone, Sergio Lecce
  • Publication number: 20190306941
    Abstract: An integrated device for driving a lighting load, such as a LED, has a first memory element, configured to store a nominal duty-cycle at a nominal supply voltage. An actual voltage acquisition element is configured to detect an actual supply voltage. A processing unit is coupled to the first memory element and to the actual voltage acquisition element and configured to calculate a voltage compensated duty-cycle. A driver unit is coupled to the processing unit and is configured to be supplied according to the voltage compensated duty-cycle.
    Type: Application
    Filed: June 19, 2019
    Publication date: October 3, 2019
    Inventors: Manuel Gaertner, Sergio Lecce, Giovanni Luca Torrisi
  • Patent number: 10375774
    Abstract: An integrated device for driving a lighting load, such as a LED, has a first memory element, configured to store a nominal duty-cycle at a nominal supply voltage. An actual voltage acquisition element is configured to detect an actual supply voltage. A processing unit is coupled to the first memory element and to the actual voltage acquisition element and configured to calculate a voltage compensated duty-cycle. A driver unit is coupled to the processing unit and is configured to be supplied according to the voltage compensated duty-cycle.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: August 6, 2019
    Assignees: STMicroelectronics S.r.l., STMicroelectronics Application GMBH
    Inventors: Manuel Gaertner, Sergio Lecce, Giovanni Luca Torrisi
  • Publication number: 20190229726
    Abstract: A driver circuit includes a supply node, a control node configured to receive a control signal, and an output node. An output transistor is coupled to the output node to provide the CAN bus drive signal via the current path through the output transistor. A current mirror is in a current line from the supply node to the output node through the output transistor. The current line includes an intermediate portion between the current mirror and the output transistor. The current mirror is configured to be switched, as a function of the control signal between a first, dominant mode, with the CAN bus drive signal applied to the output node via the output transistor, and a second, recessive mode, with the output transistor providing a high output impedance at the output node.
    Type: Application
    Filed: January 16, 2019
    Publication date: July 25, 2019
    Inventors: Sergio Lecce, Gilles Troussel
  • Publication number: 20190162759
    Abstract: A device measures the current in an inductive load using two separate current-measuring paths to detect the current in the inductive load. The inductive load is connected between first and second nodes, and the first node connected to a first voltage. The device includes first and second transistors cascaded together between the first node and a third node that is connected to a second voltage. First and second sense amplifiers measure the current in the inductive load. The first and second sense amplifiers are connected to at least one terminal of the first and second transistors. Two blocks sample and hold signals from the first and second sense amplifiers, which represent, respectively, the currents in the two separate current-measuring paths. The two currents are subtracted in a comparison node for generating an error signal that is compared with a predefined window and if outside the window a failure signal is generated.
    Type: Application
    Filed: January 30, 2019
    Publication date: May 30, 2019
    Inventors: Vanni Poletto, Riccardo Miglierina, Antonio Davide Leone, Sergio Lecce
  • Publication number: 20190159369
    Abstract: A thermal control process for an electronic power device including a multi junction integrated circuit may include defining a first and at least one second groups of junctions, with each group including one first and at least one second junctions, and associating a thermal detector with each group. A first group control may be executed which detects group electric signals representative of the temperature detected by the thermal detectors, processes the group electric signals with reference to a group critical thermal event, identifies a critical group when the corresponding group electric signal detects the critical group thermal event, and generates group deactivating signals suitable for selectively deactivating the first and the at least one second junctions of the identified critical group with respect to the remaining junctions of the integrated circuit.
    Type: Application
    Filed: January 28, 2019
    Publication date: May 23, 2019
    Inventors: Domenico Massimo Porto, Giovanni Luca Torrisi, Manuel Gaertner, Sergio Lecce
  • Patent number: 10231365
    Abstract: A thermal control process for an electronic power device including a multi junction integrated circuit may include defining a first and at least one second groups of junctions, with each group including one first and at least one second junctions, and associating a thermal detector with each group. A first group control may be executed which detects group electric signals representative of the temperature detected by the thermal detectors, processes the group electric signals with reference to a group critical thermal event, identifies a critical group when the corresponding group electric signal detects the critical group thermal event, and generates group deactivating signals suitable for selectively deactivating the first and the at least one second junctions of the identified critical group with respect to the remaining junctions of the integrated circuit.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: March 12, 2019
    Assignees: STMICROELECTRONICS S.R.L., STMICROELECTRONICS APPLICATION GMBH
    Inventors: Domenico Massimo Porto, Giovanni Luca Torrisi, Manuel Gaertner, Sergio Lecce
  • Patent number: 10215782
    Abstract: A device measures the current in an inductive load using two separate current-measuring paths to detect the current in the inductive load. The inductive load is connected between first and second nodes, and the first node connected to a first voltage. The device includes first and second transistors cascaded together between the first node and a third node that is connected to a second voltage. First and second sense amplifiers measure the current in the inductive load. The first and second sense amplifiers are connected to at least one terminal of the first and second transistors. Two blocks sample and hold signals from the first and second sense amplifiers, which represent, respectively, the currents in the two separate current-measuring paths. The two currents are subtracted in a comparison node for generating an error signal that is compared with a predefined window and if outside the window a failure signal is generated.
    Type: Grant
    Filed: December 7, 2016
    Date of Patent: February 26, 2019
    Assignee: STMicroelectronics S.R.L.
    Inventors: Vanni Poletto, Riccardo Miglierina, Antonio Davide Leone, Sergio Lecce
  • Publication number: 20180283570
    Abstract: A circuit for controlling current in an inductive load is provided. The circuit includes a driver circuit for driving a load current in the inductive load. The driver circuit includes a switch, which is switched on to increase the load current and a recirculation diode, which re-circulates the load current when the switch is off. The circuit includes a control module that generates a control signal to switch on and off the switch. The control module includes a PWM current controller comprising a negative feedback closed loop implementing at least a proportional control and an integral control. The PWM current controller receives a target current value and an estimated current flowing in the load during a measurement PWM cycle. The PWM current controller generates the control signal for a control input of the switch based on an error between the target current and the estimated current.
    Type: Application
    Filed: October 25, 2017
    Publication date: October 4, 2018
    Inventor: Sergio LECCE
  • Publication number: 20180270996
    Abstract: A thermal control process for an electronic power device including a multi junction integrated circuit may include defining a first and at least one second groups of junctions, with each group including one first and at least one second junctions, and associating a thermal detector with each group. A first group control may be executed which detects group electric signals representative of the temperature detected by the thermal detectors, processes the group electric signals with reference to a group critical thermal event, identifies a critical group when the corresponding group electric signal detects the critical group thermal event, and generates group deactivating signals suitable for selectively deactivating the first and the at least one second junctions of the identified critical group with respect to the remaining junctions of the integrated circuit.
    Type: Application
    Filed: May 17, 2018
    Publication date: September 20, 2018
    Inventors: Domenico Massimo Porto, Giovanni Luca Torrisi, Manuel Gaertner, Sergio Lecce