Patents by Inventor Sergio Palara

Sergio Palara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5113305
    Abstract: The protection device ocmprises automatic commutating means interposed between the base of a transistor to be protected and the collector of a power device to cause a flow of current having a low voltage drop between the base and the collector when the collector voltage falls below a predetermined value.
    Type: Grant
    Filed: April 19, 1990
    Date of Patent: May 12, 1992
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Salvatore Raciti, Sergio Palara
  • Patent number: 5072278
    Abstract: The monolithic integrated structure comprises a semiconductor substrate, a superimposed first epitaxial stratum having characteristics such as to withstand a high supply voltage applied to the driving system and a first and a second isolation pocket which may be connected to a high voltage and to ground, respectively, and diffused in said first epitaxial stratum at a distance such as to define an interposed area of said first stratum capable of isolating said isolating pockets from one another. Within the latter pockets, there are provided respective embedded strata and superimposed regions of a second epitaxial stratum having characteristics such as to withstand the low voltage applied across the two driving stages. A further region of said second epitaxial stratum is superimposed over said area of said first epitaxial stratum.
    Type: Grant
    Filed: February 14, 1990
    Date of Patent: December 10, 1991
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Mario Paparo, Sergio Palara
  • Patent number: 5027004
    Abstract: A circuit for regulating the base current of a semiconductor power device is accomplished with a first amplifier which measures the difference in potential across a first detection resistance which is passed through by a base current, with a second amplifier, which measures the voltage across a second detection resistance passed through by the emitter current of the power device, and with a means sensitive to the difference between a current, present at the output of the first amplifier, and a current present at the output of the second amplifier.Said sensitive means, acting on a variable current generator, maintains currents I.sub.1 and I.sub.2 equal to one another, and thus maintains constant the ratio between the emitter current of the powder device and the base current of the same.
    Type: Grant
    Filed: February 14, 1990
    Date of Patent: June 25, 1991
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventor: Sergio Palara
  • Patent number: 5010439
    Abstract: The power device has a power supply terminal, a load terminal connected to earth by means of an inductive load and a control terminal connected to a circuit with inlet for an alternating control signal. Whenever the power device is turned off, a switching element hitches the voltage of the control terminal to that of the load terminal, which is forced to fall by the inductive load. There is provided a discharge circuit of the inductive load, which includes means having a predetermined threshold which are fired when the voltage of the load terminal falls down to said predetermined threshold.
    Type: Grant
    Filed: June 12, 1989
    Date of Patent: April 23, 1991
    Assignee: SGS-Thomson Microelectronics s.r.l.
    Inventors: Michele Zisa, Sergio Palara
  • Patent number: 5008771
    Abstract: The diagnostic circuit comprises a comparator having a first input connected to the power device and a second input connected to a reference voltage generator. A signal generator is connected to the output of comparator so as to generate a diagnostic signal when comparator detects a current in the power device which is higher than a preset value corresponding to said reference voltage. A thermal protection unit sensitive to the temperature of the power device acts on the reference voltage generator so as to reduce the value of said reference voltage in response to an increase in the temperature beyond a preset limit.
    Type: Grant
    Filed: December 6, 1989
    Date of Patent: April 16, 1991
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventor: Sergio Palara
  • Patent number: 4969030
    Abstract: The integrated structure is formed of various circuital components accomplished by diffusion of dopants in a semiconductor substrate. Each component is located inside a respective insulation recess electrically floating in relation to the substrate and the other components.
    Type: Grant
    Filed: April 3, 1990
    Date of Patent: November 6, 1990
    Assignee: SGS-Thomson Microelectronics S.p.A.
    Inventors: Salvatore Musumeci, Roberto Pellicano, Sergio Palara
  • Patent number: 4947231
    Abstract: The integrated structure consists of circuit components made by diffusion of dopes in a semiconductor substrate. Each of said components is situated inside a respective insulating pocket to which is applied a voltage falling between the minimum and the maximum voltage applied to the components contained in the corresponding pocket.
    Type: Grant
    Filed: October 18, 1988
    Date of Patent: August 7, 1990
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Sergio Palara, Mario Paparo, Roberto Pellicano'
  • Patent number: 4682120
    Abstract: A short circuit protection device for a unitary voltage gain signal transducer circuit (G.sub.v) and for a load impedance (R.sub.L) coupled to the transducer circuit includes a first (A.sub.1) and a second (A.sub.2) threshold comparator circuit and an actuator circuit (ACT). The input terminals of the first comparator (A.sub.1) are coupled to the transducer circuit input and output terminals and the output terminal of the first comparator is coupled to an activation terminal of the actuator circuit. The input terminals of the second comparator (A.sub.2) are coupled to the ends of the load impedance and the output terminal is coupled to an inhibit terminal of the actuator circuit. A first output terminal of the actuator circuit is coupled to an inhibit terminal of the transducer circuit, while a second output terminal of the transducer circuit is used to deliver a small current I.sub.1 to the load impedance.
    Type: Grant
    Filed: September 27, 1984
    Date of Patent: July 21, 1987
    Assignee: SGS Microelettronica S.p.A.
    Inventors: Sergio Palara, Aldo Torazzina
  • Patent number: 4644294
    Abstract: A device for protecting a push-pull output stage (G.sub.v) against a short-circuit between the output terminal (A) and the positive pole (+V.sub.cc) of the supply, comprising a first (A.sub.1) and a second (A.sub.2) threshold comparator, both having a first input terminal coupled to the output terminal (A) of the output stage and both having a second input terminal coupled to a predetermined voltage reference. The reference potential (RIF.sub.1) to which the threshold comparator (A.sub.1) is coupled is kept at a potential which is lower than the other reference potential (RIF.sub.2) to which threshold comparator (A.sub.2) is coupled. The output terminal of the first comparator (A.sub.2) is coupled to the activation terminal of a low impedance circuit means (LI) inserted between the output terminal (A) of the output stage and the negative pole (-V.sub.cc) of the supply. The output terminal of the second comparator (A.sub.2) is coupled to an inhibitor terminal of the output power amplifier stage (G.sub.v).
    Type: Grant
    Filed: January 23, 1985
    Date of Patent: February 17, 1987
    Assignee: SGS Componenti Elettronici S.p.A.
    Inventors: Sergio Palara, Aldo Torazzina
  • Patent number: 4638507
    Abstract: A capacitor which is progressively chargeable in response to a switching on of the equipment, however brought about, is associated with an oscillating circuit with intervention threshold. As the load voltage of said capacitor increases the oscillating circuit shifts from a first to a second operating state, generating a switch-on current for the audio amplifier. The latter can be placed in stand-by condition by discharging to earth said capacitor by means of a suitable switch.
    Type: Grant
    Filed: April 12, 1985
    Date of Patent: January 20, 1987
    Assignee: SGS-ATES Componenti Elettronici S.p.A.
    Inventors: Sergio Palara, Aldo Torazzina
  • Patent number: 4623950
    Abstract: A protective device for a power element of an integrated circuit includes a circuit element for detecting and processing the value of the current flowing through the power element and the voltage supplied to the power element. The circuit element generates a measuring signal which, when it reaches a predetermined limit value, activates a threshold circuit which reduces the current level in the power element. The protective device also includes a circuit element for amplifying the measuring signal when it reaches the predetermined limit value.
    Type: Grant
    Filed: January 30, 1984
    Date of Patent: November 18, 1986
    Assignee: SGS-ATES Componenti Elettronici SpA
    Inventors: Sergio Palara, Aldo Torazzina
  • Patent number: 4575686
    Abstract: The output stage for power amplifiers, in particular of the minimum drop, low tension type, is intended for use with apparatus which do not require a high output current, which output stage can operate at a lower minimum voltage supply than comparable known stages. The output stage comprises upper and lower sections interposed between a power supply line and a ground line, each section including transistors across which voltage drops (V.sub.CE sat, V.sub.BE) appear and forming current sources for each section, diodes, and at least one current mirror circuit of the multiplying type adapted to determine as a first approximation the current gain of each section. The minimum voltage drop between the power supply line and ground line, as computed for any electric line connecting the power supply line and ground line, never exceeds the value of V.sub.BE +2V.sub.CE sat.
    Type: Grant
    Filed: July 24, 1984
    Date of Patent: March 11, 1986
    Assignee: SGS-ATES Componenti Elettronici S.p.A.
    Inventors: Sergio Palara, Aldo Torazzina
  • Patent number: 4563632
    Abstract: A monolithically integratable constant-current generating circuit includes a current-generating circuit having a control terminal and two output terminals, from which currents flow that are bound by a constant proportionality ratio.There is connected to one output terminal the input branch of a circuit having a current mirror and having a current gain which varies with the level of the current itself. A first input terminal of a current-comparator and amplifier circuit is connected to the output branch of the current mirror; a second input terminal is connected to the second output terminal of the current-generating circuit and the control terminal is connected to the output terminal of the current-comparator and amplifier circuit.
    Type: Grant
    Filed: September 21, 1983
    Date of Patent: January 7, 1986
    Assignee: SGS-ATES Componenti Elettronici SpA
    Inventors: Sergio Palara, Bruno Murari
  • Patent number: 4555674
    Abstract: A current control circuit coupled to the final stage of the amplifier automatically adjusts the bias current of the final stage so that it is low in the no-load state and higher in the load state. The low no-load value avoids useless energy leakages and heat dissipations, while the higher load value avoids "cross-over" distortions.
    Type: Grant
    Filed: August 15, 1983
    Date of Patent: November 26, 1985
    Assignee: SGS-ATES Componenti Elettronici S.p.A.
    Inventors: Sergio Palara, Aldo Torazzina
  • Patent number: 4368436
    Abstract: A protection device for a power output circuit, designed such that the device protects the power output circuit from damage due to output overloads and simultaneously eliminates the power dissipation of the protected device, thereby conserving power and eliminating unnecessary heating of both the protected device and adjacent components. The protection device includes a comparator for comparing the voltage at the input to the power output circuit with the voltage at the output of the power output circuit. If the power output circuit has a unity voltage gain, its voltage output equals its voltage input under normal operating conditions but its voltage output becomes lower than its voltage input under overload conditions. The comparator is arranged to inhibit the power operation of the power output circuit and reduce its power dissipation to zero when the input voltage of the power output circuit exceeds the output voltage thereof by a specified value, that is, under overload conditions.
    Type: Grant
    Filed: May 28, 1980
    Date of Patent: January 11, 1983
    Assignee: SGS-ATES Componenti Elettronici S.p.A.
    Inventors: Sergio Palara, Silvano Tintori
  • Patent number: 4268796
    Abstract: An a-c linear amplifier with two push-pull-connected output transistors includes an ancillary transistor which, during saturation of one of the output transistors and the simultaneous cutoff of a controlled transistor driving these output transistors through a set of pilot transistors, conducts to maintain the base potential of this controlled transistor at its conduction threshold for preventing a distortion of the end of the flattened peak of the corresponding half-cycle of the output voltage. The ancillary transistor has one of its input leads maintained at a fixed biasing potential and the other of its input leads connected to a point of output-dependent variable voltage that allows its conduction during the flattened peak only.
    Type: Grant
    Filed: March 26, 1979
    Date of Patent: May 19, 1981
    Assignee: SGS-ATES Componenti Elettronici S.p.A.
    Inventor: Sergio Palara
  • Patent number: 4266199
    Abstract: A linear alternating-current amplifier with push-pull-connected first and second output transistors Q.sub.1, Q.sub.2 includes a pilot transistor Q.sub.4 and a control transistor Q.sub.3 which drives the first output transistor Q.sub.1 into saturation when the resistance of the pilot transistor Q.sub.4 is high. The control transistor Q.sub.3 has its base connected to the collector of the pilot transistor Q.sub.4 and its emitter connected to the junction of the emitter of the first output transistor Q.sub.1 with the collector of the second output transistor Q.sub.2, the latter connection including a biasing resistor R in series with a constant-current generator G (or an equivalent resistor R.sub.G or fixedly biased transistor Q.sub.G) which maintains the potential difference between the base and the emitter of the control transistor Q.sub.3 at its conduction threshold during saturation of the pilot transistor Q.sub.4 and the second output transistor Q.sub.2.
    Type: Grant
    Filed: April 26, 1979
    Date of Patent: May 5, 1981
    Assignee: SGS ATES Componenti Elettronicie S.P.A.
    Inventor: Sergio Palara
  • Patent number: 4072979
    Abstract: An integrated power amplifier, composed of a multiplicity of elemental transistors epitaxially grown on a semiconductor chip, has base, emitter and collector terminals each connected in parallel to corresponding electrodes of the several elemental transistors. Each elemental transistor comprises two active emitter zones on opposite sides of a central contact zone conductively linked therewith by restricted connecting zones within the substrate, the contact zones of these transistors carrying emitter electrodes which are connected by a metallic strip to the emitter terminal.
    Type: Grant
    Filed: June 10, 1976
    Date of Patent: February 7, 1978
    Assignee: SGS-ATES Componenti Elettronici S.p.A.
    Inventor: Sergio Palara