Patents by Inventor Seshasayee Varadarajan

Seshasayee Varadarajan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11970776
    Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some embodiments, thin metal oxynitride or metal nitride nucleation layers are deposited followed by deposition of a pure metal conductor. The nucleation layer is amorphous, which templates large pure metal film grain growth and reduced resistivity. Further, certain embodiments of the methods described below convert most or all of the metal oxynitride nucleation layer to a pure metal layer, further lowering the resistivity.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: April 30, 2024
    Assignee: Lam Research Corporation
    Inventors: Joshua Collins, Griffin John Kennedy, Hanna Bamnolker, Patrick A. van Cleemput, Seshasayee Varadarajan
  • Publication number: 20230175117
    Abstract: Methods of filling a gap with a dielectric material including using an inhibitor plasma during deposition. The inhibitor plasma increases a nucleation barrier of the deposited film. When the inhibitor plasma interacts with material in the feature, the material at the bottom of the feature receives less plasma treatment than material located closer to a top portion of the feature or in field. Deposition at the top of the feature is then selectively inhibited and deposition in lower portions of the feature proceeds with less inhibition or without being inhibited. As a result, bottom-up fill is enhanced, which can create a sloped profile that mitigates the seam effect and prevents void formation. In some embodiments, an underlying material at the top of the feature is protected using an integrated liner. In some embodiments, a hydrogen chemistry is used during gap fill to reduce seam formation.
    Type: Application
    Filed: March 31, 2021
    Publication date: June 8, 2023
    Inventors: Dustin Zachary AUSTIN, Ian John CURTIN, Joseph R. ABEL, Bart J. VAN SCHRAVENDIJK, Seshasayee VARADARAJAN, Adrien LAVOIE, Jeremy David FIELDS, Pulkit AGARWAL, Shiva Sharan BHANDARI
  • Patent number: 11637037
    Abstract: Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiO2 and SiN can be selectively etched using a plasma formed in an Hz-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiO2 is deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO2, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% Hz. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100° C.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: April 25, 2023
    Assignee: Lam Research Corporation
    Inventors: Patrick van Cleemput, Seshasayee Varadarajan, Bart J. van Schravendijk
  • Publication number: 20230093011
    Abstract: Molybdenum is etched in a highly controllable manner by performing one or more etch cycles, where each cycle involves exposing the substrate having a molybdenum layer to an oxygen-containing reactant to form molybdenum oxide followed by treatment with boron trichloride to convert molybdenum oxide to a volatile molybdenum oxychloride with subsequent treatment of the substrate with a fluorine-containing reactant to remove boron oxide that has formed in a previous reaction, from the surface of the substrate. In some embodiments the method is performed in an absence of plasma and results in a substantially isotropic etching. The method can be used in a variety of applications in semiconductor processing, such as in wordline isolation in 3D NAND fabrication.
    Type: Application
    Filed: March 2, 2021
    Publication date: March 23, 2023
    Inventors: Andreas Fischer, Aaron Lynn Routzahn, Thorsten Bernd Lill, Seshasayee Varadarajan
  • Patent number: 11549175
    Abstract: Provided herein are methods and apparatuses for filling features metal-containing materials. One aspect of the disclosure relates to a method for filling structures with a metal-containing material, the method including: providing a structure to be filled with a metal-containing material, exposing the structure to multiple deposition cycles, with each deposition cycle including exposure to one or more alternating reducing agent (e.g. hydrogen (H2)) dose/inert gas purge pulses pulse followed by exposure to one or more alternating metal precursor dose pulses and inert gas purge pulses. The metal may be tungsten (W) or molybdenum (Mo) in some embodiments. In some embodiments, the structure is a partially fabricated (3-D) NAND structure. Apparatuses to perform the methods are also provided.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: January 10, 2023
    Assignee: Lam Research Corporation
    Inventors: Gorun Butail, Joshua Collins, Hanna Bamnolker, Seshasayee Varadarajan
  • Publication number: 20220356579
    Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some embodiments, thin metal oxynitride or metal nitride nucleation layers are deposited followed by deposition of a pure metal conductor. The nucleation layer is amorphous, which templates large pure metal film grain growth and reduced resistivity. Further, certain embodiments of the methods described below convert most or all of the metal oxynitride nucleation layer to a pure metal layer, further lowering the resistivity.
    Type: Application
    Filed: July 21, 2022
    Publication date: November 10, 2022
    Inventors: Joshua COLLINS, Griffin John KENNEDY, Hanna BAMNOLKER, Patrick A. VAN CLEEMPUT, Seshasayee VARADARAJAN
  • Publication number: 20220243323
    Abstract: A substrate processing system includes a substrate support and a controller. The substrate support includes a lift pad, a plurality of zones, and a plurality of resistive heaters arranged throughout the plurality of zones. The plurality of resistive heaters includes separately-controllable resistive heaters arranged in respective ones of the plurality of zones. The controller is configured to determine a rotational position of a substrate arranged on the lift pad, selectively rotate the lift pad to adjust the substrate to the rotational position, and control the plurality of resistive heaters to selectively adjust temperatures within the plurality of zones based on the rotational position.
    Type: Application
    Filed: June 16, 2020
    Publication date: August 4, 2022
    Inventors: Ramesh CHANDRASEKHARAN, Seshasayee VARADARAJAN, Pulkit AGARWAL, Ravi KUMAR, Adrien LAVOIE, Marcus CARBERY, Michael Philip ROBERTS
  • Publication number: 20220195598
    Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some embodiments, thin metal oxynitride or metal nitride nucleation layers are deposited followed by deposition of a pure metal conductor. The nucleation layer is amorphous, which templates large pure metal film grain growth and reduced resistivity. Further, certain embodiments of the methods described below convert most or all of the metal oxynitride nucleation layer to a pure metal layer, further lowering the resistivity.
    Type: Application
    Filed: January 27, 2020
    Publication date: June 23, 2022
    Inventors: Joshua Collins, Griffin John Kennedy, Hanna Bamnolker, Patrick A. van Cleemput, Seshasayee Varadarajan
  • Publication number: 20210343579
    Abstract: Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiO2 and SiN can be selectively etched using a plasma formed in an H2-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiO2 is deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO2, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% H2. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100° C.
    Type: Application
    Filed: June 24, 2021
    Publication date: November 4, 2021
    Inventors: Patrick A. van Cleemput, Seshasayee Varadarajan, Bart J. van Schravendijk
  • Patent number: 11088019
    Abstract: Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiO2 and SiN can be selectively etched using a plasma formed in an H2-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiO2 is deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO2, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% H2. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100° C.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: August 10, 2021
    Assignee: Lam Research Corporation
    Inventors: Patrick A. Van Cleemput, Seshasayee Varadarajan, Bart J. van Schravendijk
  • Publication number: 20210238736
    Abstract: Provided herein are methods and apparatuses for filling features metal-containing materials. One aspect of the disclosure relates to a method for filling structures with a metal-containing material, the method including: providing a structure to be filled with a metal-containing material, exposing the structure to multiple deposition cycles, with each deposition cycle including exposure to one or more alternating reducing agent (e.g. hydrogen (H2)) dose/inert gas purge pulses pulse followed by exposure to one or more alternating metal precursor dose pulses and inert gas purge pulses. The metal may be tungsten (W) or molybdenum (Mo) in some embodiments. In some embodiments, the structure is a partially fabricated (3-D) NAND structure. Apparatuses to perform the methods are also provided.
    Type: Application
    Filed: May 3, 2019
    Publication date: August 5, 2021
    Inventors: Gorun Butail, Joshua Collins, Hanna Bamnolker, Seshasayee Varadarajan
  • Patent number: 11075127
    Abstract: Disclosed are methods of and apparatuses and systems for depositing a film in a multi-station deposition apparatus. The methods may include: (a) providing a substrate to a first station of the apparatus, (b) adjusting the temperature of the substrate to a first temperature, (c) depositing a first portion of the material on the substrate while the substrate is at the first temperature in the first station, (d) transferring the substrate to the second station, (e) adjusting the temperature of the substrate to a second temperature, and (f) depositing a second portion of the material on the substrate while the substrate is at the second temperature, such that the first portion and the second portion exhibit different values of a property of the material. The apparatuses and systems may include a multi-station deposition apparatus and a controller having control logic for performing one or more of (a)-(f).
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: July 27, 2021
    Assignee: Lam Research Corporation
    Inventors: Seshasayee Varadarajan, Aaron R. Fellis, Andrew John McKerrow, James Samuel Sims, Ramesh Chandrasekharan, Jon Henri
  • Publication number: 20200219758
    Abstract: Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiO2 and SiN can be selectively etched using a plasma formed in an Hz-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiO2 is deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO2, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% Hz. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100° C.
    Type: Application
    Filed: March 20, 2020
    Publication date: July 9, 2020
    Applicant: Lam Research Corporation
    Inventors: Patrick van Cleemput, Seshasayee Varadarajan, Bart J. van Schravendijk
  • Publication number: 20200066607
    Abstract: Disclosed are methods of and apparatuses and systems for depositing a film in a multi-station deposition apparatus. The methods may include: (a) providing a substrate to a first station of the apparatus, (b) adjusting the temperature of the substrate to a first temperature, (c) depositing a first portion of the material on the substrate while the substrate is at the first temperature in the first station, (d) transferring the substrate to the second station, (e) adjusting the temperature of the substrate to a second temperature, and (f) depositing a second portion of the material on the substrate while the substrate is at the second temperature, such that the first portion and the second portion exhibit different values of a property of the material. The apparatuses and systems may include a multi-station deposition apparatus and a controller having control logic for performing one or more of (a)-(f).
    Type: Application
    Filed: July 3, 2019
    Publication date: February 27, 2020
    Inventors: Seshasayee Varadarajan, Aaron R. Fellis, Andrew John McKerrow, James Samuel Sims, Ramesh Chandrasekharan, Jon Henri
  • Patent number: 10472730
    Abstract: An electroplating apparatus for filling recessed features on a semiconductor substrate includes a vessel configured to maintain a concentrated electroplating solution at a temperature of at least about 40° C., wherein the solution would have formed a precipitate at 20° C. This vessel is in fluidic communication with an electroplating cell configured for bringing the concentrated electrolyte in contact with the semiconductor substrate at a temperature of at least about 40° C., or the vessel is the electroplating cell. In order to prevent precipitation of metal salts from the electrolyte, the apparatus further includes a controller having program instructions for adding a diluent to the concentrated electroplating solution in the vessel to avoid precipitation of a salt from the concentrated electroplating solution in response to a signal indicating that the electrolyte is at risk of precipitation.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: November 12, 2019
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Jonathan David Reid, Seshasayee Varadarajan
  • Patent number: 10378107
    Abstract: A showerhead in a semiconductor processing apparatus can include faceplate through-holes configured to improve the flow uniformity during atomic layer deposition. The showerhead can include a faceplate having a plurality of through-holes for distributing gas onto a substrate, where the faceplate includes small diameter through-holes. For example, the diameter of each of the through-holes can be less than about 0.04 inches. In addition or in the alternative, the showerhead can include edge through-holes positioned circumferentially along a ring having a diameter greater than a diameter of the substrate being processed. The showerhead can be a low volume showerhead and can include a baffle proximate one or more gas inlets in communication with a plenum volume of the showerhead. The faceplate with small diameter through-holes and/or edge through-holes can improve overall film non-uniformity, improve azimuthal film non-uniformity at the edge of the substrate, and enable operation at higher RF powers.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: August 13, 2019
    Assignee: Lam Research Corporation
    Inventors: Ramesh Chandrasekharan, Saangrut Sangplung, Shankar Swaminathan, Frank Pasquale, Hu Kang, Adrien LaVoie, Edward Augustyniak, Yukinori Sakiyama, Chloe Baldasseroni, Seshasayee Varadarajan, Basha Sajjad, Jennifer L. Petraglia
  • Patent number: 10347547
    Abstract: Disclosed are methods of and apparatuses and systems for depositing a film in a multi-station deposition apparatus. The methods may include: (a) providing a substrate to a first station of the apparatus, (b) adjusting the temperature of the substrate to a first temperature, (c) depositing a first portion of the material on the substrate while the substrate is at the first temperature in the first station, (d) transferring the substrate to the second station, (e) adjusting the temperature of the substrate to a second temperature, and (f) depositing a second portion of the material on the substrate while the substrate is at the second temperature, such that the first portion and the second portion exhibit different values of a property of the material. The apparatuses and systems may include a multi-station deposition apparatus and a controller having control logic for performing one or more of (a)-(f).
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: July 9, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Seshasayee Varadarajan, Aaron R. Fellis, Andrew John McKerrow, James Samuel Sims, Ramesh Chandrasekharan, Jon Henri
  • Publication number: 20180233398
    Abstract: Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiO2 and SiN can be selectively etched using a plasma formed in an H2-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiO2 is deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO2, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% H2. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100° C.
    Type: Application
    Filed: February 9, 2018
    Publication date: August 16, 2018
    Inventors: Patrick A. Van Cleemput, Seshasayee Varadarajan, Bart J. van Schravendijk
  • Patent number: 10020188
    Abstract: A method of depositing ALD films on semiconductor substrates processed in a micro-volume of a plasma enhanced atomic layer deposition (PEALD) reaction chamber wherein a single semiconductor substrate is supported on a ceramic surface of a pedestal and process gas is introduced through gas outlets in a ceramic surface of a showerhead into a reaction zone above the semiconductor substrate, includes (a) cleaning the ceramic surfaces of the pedestal and showerhead with a fluorine plasma such that aluminum-rich byproducts are formed on the ceramic surfaces, (b) depositing a conformal halide-free atomic layer deposition (ALD) oxide undercoating on the ceramic surfaces so as to cover the aluminum-rich byproducts, (c) depositing a pre-coating on the halide-free ALD oxide undercoating, and (d) processing a batch of semiconductor substrates by transferring each semiconductor substrate into the reaction chamber and depositing a film on the semiconductor substrate supported on the ceramic surface of the pedestal.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: July 10, 2018
    Assignee: LAM RESEARCH CORPORATION
    Inventors: James S. Sims, Jon Henri, Ramesh Chandrasekharan, Andrew John McKerrow, Seshasayee Varadarajan, Kathryn Merced Kelchner
  • Publication number: 20180102245
    Abstract: A method of depositing ALD films on semiconductor substrates processed in a micro-volume of a plasma enhanced atomic layer deposition (PEALD) reaction chamber wherein a single semiconductor substrate is supported on a ceramic surface of a pedestal and process gas is introduced through gas outlets in a ceramic surface of a showerhead into a reaction zone above the semiconductor substrate, includes (a) cleaning the ceramic surfaces of the pedestal and showerhead with a fluorine plasma such that aluminum-rich byproducts are formed on the ceramic surfaces, (b) depositing a conformal halide-free atomic layer deposition (ALD) oxide undercoating on the ceramic surfaces so as to cover the aluminum-rich byproducts, (c) depositing a pre-coating on the halide-free ALD oxide undercoating, and (d) processing a batch of semiconductor substrates by transferring each semiconductor substrate into the reaction chamber and depositing a film on the semiconductor substrate supported on the ceramic surface of the pedestal.
    Type: Application
    Filed: November 20, 2017
    Publication date: April 12, 2018
    Applicant: LAM RESEARCH CORPORATION
    Inventors: James S. Sims, Jon Henri, Ramesh Chandrasekharan, Andrew John McKerrow, Seshasayee Varadarajan, Kathryn Merced Kelchner