Abstract: A plasmonic detector is described which can resonantly enhance the performance of infrared detectors. More specifically, the disclosure is directed to enhancing the quantum efficiency of semiconductor infrared detectors by increasing coupling to the incident radiation field as a result of resonant coupling to surface plasma waves supported by the metal/semiconductor interface, without impacting the dark current of the device, resulting in an improved detectivity over the surface plasma wave spectral bandwidth.

Abstract: Exemplary embodiments provide semiconductor nanowires and nanowire devices/applications and methods for their formation. In embodiments, in-plane nanowires can be epitaxially grown on a patterned substrate, which are more favorable than vertical ones for device processing and three-dimensional (3D) integrated circuits. In embodiments, the in-plane nanowire can be formed by selective epitaxy utilizing lateral overgrowth and faceting of an epilayer initially grown in a one-dimensional (1D) nanoscale opening. In embodiments, optical, electrical, and thermal connections can be established and controlled between the nanowire, the substrate, and additional electrical or optical components for better device and system performance.

Abstract: Exemplary embodiments provide semiconductor nanowires and nanowire devices/applications and methods for their formation. In embodiments, in-plane nanowires can be epitaxially grown on a patterned substrate, which are more favorable than vertical ones for device processing and three-dimensional (3D) integrated circuits. In embodiments, the in-plane nanowire can be formed by selective epitaxy utilizing lateral overgrowth and faceting of an epilayer initially grown in a one-dimensional (1D) nanoscale opening. In embodiments, optical, electrical, and thermal connections can be established and controlled between the nanowire, the substrate, and additional electrical or optical components for better device and system performance.

Abstract: Exemplary embodiments provide semiconductor nanowires and nanowire devices/applications and methods for their formation. In embodiments, in-plane nanowires can be epitaxially grown on a patterned substrate, which are more favorable than vertical ones for device processing and three-dimensional (3D) integrated circuits. In embodiments, the in-plane nanowire can be formed by selective epitaxy utilizing lateral overgrowth and faceting of an epilayer initially grown in a one-dimensional (1D) nanoscale opening. In embodiments, optical, electrical, and thermal connections can be established and controlled between the nanowire, the substrate, and additional electrical or optical components for better device and system performance.

Abstract: The present invention relates to a lightweight bidirectional hollow core slab, and a doughnut-shaped hollow core body which may be advantageously used in the construction of a bidirectional hollow core slab. The doughnut-shaped hollow core body according to the present invention includes an outer case formed in a generally doughnut shape, wherein a hollow portion with a circular section is formed in the center thereof and corners are rounded with curved surfaces. The bidirectional hollow core slab according to the present invention is made by stably locating the doughnut-shaped hollow core bodies in concrete in such a manner that the doughnut-shaped hollow core body is restrained and mounted in steel bar cages or on the upper and lower steel bars.

Abstract: A method of epitaxial growth of cubic phase, nitrogen-based compound semiconductor thin films on a semiconductor substrate, for example a <001> substrate, which is periodically patterned with grooves oriented parallel to the <110> crystal direction and terminated in sidewalls, for example <111> sidewalls. The method can provide an epitaxial growth which is able to supply high-quality, cubic phase epitaxial films on a <001> silicon substrate. Controlling nucleation on sidewall facets, for example <111>, fabricated in every groove and blocking the growth of the initial hexagonal phase at the outer region of an epitaxial silicon layer with barrier materials prepared at both sides of each groove allows growth of cubic-phase thin film in each groove and either be extended to macro-scale islands or coalesced with films grown from adjacent grooves to form a continuous film. This can result in a wide-area, cubic phase nitrogen-based compound semiconductor film on a <001> substrate.

Abstract: A plasmonic detector is described which can resonantly enhance the performance of infrared detectors. More specifically, the disclosure is directed to enhancing the quantum efficiency of semiconductor infrared detectors by increasing coupling to the incident radiation field as a result of resonant coupling to surface plasma waves supported by the metal/semiconductor interface, without impacting the dark current of the device, resulting in an improved detectivity over the surface plasma wave spectral bandwidth.

Abstract: Exemplary embodiments provide semiconductor nanowires and nanowire devices/applications and methods for their formation. In embodiments, in-plane nanowires can be epitaxially grown on a patterned substrate, which are more favorable than vertical ones for device processing and three-dimensional (3D) integrated circuits. In embodiments, the in-plane nanowire can be formed by selective epitaxy utilizing lateral overgrowth and faceting of an epilayer initially grown in a one-dimensional (1D) nanoscale opening. In embodiments, optical, electrical, and thermal connections can be established and controlled between the nanowire, the substrate, and additional electrical or optical components for better device and system performance.

Abstract: Exemplary embodiments provide semiconductor nanowires and nanowire devices/applications and methods for their formation. In embodiments, in-plane nanowires can be epitaxially grown on a patterned substrate, which are more favorable than vertical ones for device processing and three-dimensional (3D) integrated circuits. In embodiments, the in-plane nanowire can be formed by selective epitaxy utilizing lateral overgrowth and faceting of an epilayer initially grown in a one-dimensional (1D) nanoscale opening. In embodiments, optical, electrical, and thermal connections can be established and controlled between the nanowire, the substrate, and additional electrical or optical components for better device and system performance.

Abstract: Methods for forming {110} type facets on a (001) oriented substrate of Group III-V compounds and Group IV semiconductors using selective epitaxial growth is provided. The methods include forming a dielectric film on a (100) substrate. The dielectric film can then be patterned to expose a portion of the substrate and to form a substrate-dielectric film boundary substantially parallel to a <110> direction. A {110} type sidewall facet can then be formed by epitaxially growing a semiconductor layer on the exposed portion of the substrate and the dielectric film.

Abstract: Methods for forming {110} type facets on a (001) oriented substrate of Group III-V compounds and Group IV semiconductors using selective epitaxial growth is provided. The methods include forming a dielectric film on a (100) substrate. The dielectric film can then be patterned to expose a portion of the substrate and to form a substrate-dielectric film boundary substantially parallel to a <110> direction. A {110} type sidewall facet can then be formed by epitaxially growing a semiconductor layer on the exposed portion of the substrate and the dielectric film.

Abstract: Methods for forming {110} type facets on a (001) oriented substrate of Group III-V compounds and Group IV semiconductors using selective epitaxial growth is provided. The methods include forming a dielectric film on a (100) substrate. The dielectric film can then be patterned to expose a portion of the substrate and to form a substrate-dielectric film boundary substantially parallel to a <110> direction. A {110} type sidewall facet can then be formed by epitaxially growing a semiconductor layer on the exposed portion of the substrate and the dielectric film.

Abstract: A process for formation of a hetero junction structured film utilizing V grooves is disclosed. A monocrystalline film 1 is etched into V grooves, and thereupon, a hetero film 2 having misfits is grown, so that dislocations would be intensively distributed within the V grooves. Then, an oxide layer 3 is formed thereupon, and then, the portions of the oxide layer 3 and the hereto film 2 corresponding to the V grooves are removed by carrying out an etching. Then, the residue oxide layer is removed, thereby forming a non-stress non-dislocation hetero junction structure. Further, the following steps can be added. That is, on the above structure, a thin oxide layer 3 is deposited by carrying out a thermal oxidation or a chemical deposition, and then, a polycrystalline silicon film 4 is deposited. Then the surface irregularities are smoothened by carrying out a selective grinding. Or the following steps may be added.