Patents by Inventor Seung-Chul Han

Seung-Chul Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150255361
    Abstract: A semiconductor device with thin redistribution layers is disclosed and may include forming a first redistribution layer on a dummy substrate, electrically coupling a semiconductor die to the first redistribution layer, and forming a first encapsulant layer on the redistribution layer and around the semiconductor die. The dummy substrate may be removed thereby exposing a second surface of the first redistribution layer. A dummy film may be temporarily affixed to the exposed second surface of the redistribution layer and a second encapsulant layer may be formed on the exposed top surface of the semiconductor die, a top surface and side edges of the first encapsulant layer, and side edges of the first redistribution layer. The dummy film may be removed to again expose the second surface of the first redistribution layer, and a second redistribution layer may be formed on the first redistribution layer and on the second encapsulant layer.
    Type: Application
    Filed: July 28, 2014
    Publication date: September 10, 2015
    Inventors: Dong Hoon Lee, Do Hyung Kim, Seung Chul Han
  • Publication number: 20150206807
    Abstract: A semiconductor device and manufacturing method thereof. Various aspects of the disclosure may, for example, comprise connection verification for a first one or more mounted components prior to additional assembly.
    Type: Application
    Filed: June 24, 2014
    Publication date: July 23, 2015
    Inventors: Seo Yeon Ahn, Doo Hyun Park, Pil Je Sung, Won Chul Do, Young Rae Kim, Seung Chul Han, Joo Hyun Kim, Jong Sik Paek
  • Patent number: 9060016
    Abstract: Provided are an apparatus and method for blocking a zombie behavior process. The apparatus includes a security policy storage configured to store zombie-behavior-type-specific traffic characteristics and security policies, a traffic monitor configured to monitor traffic generated on the computer and detect abnormal traffic exceeding a predetermined reference value, a process and traffic analyzer configured to find an abnormal process causing the abnormal traffic and detect a zombie behavior type associated with the abnormal process by analyzing the abnormal traffic on the basis of the zombie-behavior-type-specific traffic characteristics stored in the security policy storage, and a process handler configured to handle the process whose zombie behavior type has been detected according to a security policy defined for the detected zombie behavior type.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: June 16, 2015
    Assignee: NPCORE INC.
    Inventor: Seung Chul Han
  • Patent number: 8890329
    Abstract: A semiconductor device entirely having a small height, which performs a fan-out operation for input/output signals and forms a short electrical path is provided. The semiconductor device includes a first semiconductor die having a first surface, a second surface opposed to the first surface, a third surface connecting the first and second surfaces to each other, a first bond pad disposed on the first surface, and a first through electrode passing between the first surface and second surface and electrically connected to the first bond pad. A first redistribution part is disposed under the second surface and includes a first redistribution layer electrically connected to the first through electrode. A second redistribution part is disposed over the first surface and includes a second redistribution layer electrically connected to the first bond pad.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: November 18, 2014
    Inventors: Do Hyung Kim, Dae Byoung Kang, Seung Chul Han
  • Patent number: 8745958
    Abstract: Disclosed are three-dimensional porous light-weight structures composed of helical wires and the manufacturing method of the same. Continuous helical wire groups in three or six directions having a designated angle (for example, 60 degrees or 90 degrees) with respect to one another in a space cross and are then assembled, and thus new truss-shaped three-dimensional lattice truss structures having high strength and stiffness to weight ratio and a large surface area and method of mass-producing the structures at low costs are provided. The three-dimensional porous light-weight structures are manufactured by a method in which helical wires are three-dimensionally assembled through a continuous process rather than a method in which net-shaped wires are simply woven and stacked, and thus have a configuration similar to the ideal hexahedron truss, Octet truss, or truss in which regular octahedrons and cuboctahedrons are combined, thereby having excellent mechanical properties or thermal or aerodynamic properties.
    Type: Grant
    Filed: August 25, 2010
    Date of Patent: June 10, 2014
    Assignee: Industry Foundation of Chonnam National University
    Inventors: Ki Ju Kang, Seung Chul Han, Jai Hwang Joo
  • Publication number: 20130330931
    Abstract: In one embodiment, a method for forming an electronic device includes providing a substrate having a plurality of electronic devices formed therein, forming a protective layer over a major surface of the substrate containing the plurality of electronic devices, forming a mold layer over the protective layer, thinning a major surface of the substrate opposite to the major surface containing the plurality of electronic devices, and removing the adhesive layer and the mold layer. In another embodiment, a zone coating layer can be included between the protective layer and the mold layer.
    Type: Application
    Filed: May 24, 2013
    Publication date: December 12, 2013
    Inventors: Seung Chul Han, Jae Kyu Song, Do Hyung Kim
  • Publication number: 20120273946
    Abstract: A semiconductor device entirely having a small height, which performs a fan-out operation for input/output signals and forms a short electrical path is provided. The semiconductor device includes a first semiconductor die having a first surface, a second surface opposed to the first surface, a third surface connecting the first and second surfaces to each other, a first bond pad disposed on the first surface, and a first through electrode passing between the first surface and second surface and electrically connected to the first bond pad. A first redistribution part is disposed under the second surface and includes a first redistribution layer electrically connected to the first through electrode. A second redistribution part is disposed over the first surface and includes a second redistribution layer electrically connected to the first bond pad.
    Type: Application
    Filed: April 25, 2012
    Publication date: November 1, 2012
    Inventors: Do Hyung Kim, Dae Byoung Kang, Seung Chul Han
  • Publication number: 20120174221
    Abstract: Provided are an apparatus and method for blocking a zombie behavior process. The apparatus includes a security policy storage configured to store zombie-behavior-type-specific traffic characteristics and security policies, a traffic monitor configured to monitor traffic generated on the computer and detect abnormal traffic exceeding a predetermined reference value, a process and traffic analyzer configured to find an abnormal process causing the abnormal traffic and detect a zombie behavior type associated with the abnormal process by analyzing the abnormal traffic on the basis of the zombie-behavior-type-specific traffic characteristics stored in the security policy storage, and a process handler configured to handle the process whose zombie behavior type has been detected according to a security policy defined for the detected zombie behavior type.
    Type: Application
    Filed: August 9, 2011
    Publication date: July 5, 2012
    Inventor: Seung Chul Han
  • Publication number: 20120151868
    Abstract: Disclosed are three-dimensional porous light-weight structures composed of helical wires and the manufacturing method of the same. Continuous helical wire groups in three or six directions having a designated angle (for example, 60 degrees or 90 degrees) with respect to one another in a space cross and are then assembled, and thus new truss-shaped three-dimensional lattice truss structures having high strength and stiffness to weight ratio and a large surface area and method of mass-producing the structures at low costs are provided. The three-dimensional porous light-weight structures are manufactured by a method in which helical wires are three-dimensionally assembled through a continuous process rather than a method in which net-shaped wires are simply woven and stacked, and thus have a configuration similar to the ideal hexahedron truss, Octet truss, or truss in which regular octahedrons and cuboctahedrons are combined, thereby having excellent mechanical properties or thermal or aerodynamic properties.
    Type: Application
    Filed: August 25, 2010
    Publication date: June 21, 2012
    Applicant: INDUSTRY FOUNDATION OF CHONNAM NATIONAL UNIVERSITY
    Inventors: Ki Ju Kang, Seung Chul Han, Jai Hwang Joo
  • Publication number: 20100275687
    Abstract: A housing for a measuring equipment receiving a measurement apparatus includes a body, a predetermined area of which is open, a first door combined with the body to cover at least a portion of the open predetermined area of the body, and a second door combined with the body to cover at least a portion of the open predetermined area of the body. A display unit is installed on the second door to be rotated from a first face toward a second face. Thus, a space required to install the display unit may be reduced, and a viewing scope of the display unit may be increased.
    Type: Application
    Filed: April 30, 2010
    Publication date: November 4, 2010
    Applicant: KOH YOUNG TECHNOLOGY INC.
    Inventors: Seung-Chul Han, Woo-Young Lim