Patents by Inventor Seung-Kon Mok

Seung-Kon Mok has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080108169
    Abstract: An ultrathin module is provided for special types of semiconductor devices such as image sensor devices and micro-electro-mechanical system (MEMS) devices. In the module, a chip cover is directly attached to a semiconductor chip so as to protect a light-sensing area or mechanical elements of the chip. The chip cover may also be used as a lens assembly and an infrared light filter. In a fabrication method, the chips are provided on a wafer, and the chip covers are attached to the chips, respectively, before the wafer is sliced to separate the chips from one another.
    Type: Application
    Filed: January 11, 2008
    Publication date: May 8, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kwon-Young ROH, Seung-Kon MOK
  • Publication number: 20080036085
    Abstract: A circuit board and a semiconductor package having the same are provided. The circuit board comprises a base substrate having interconnections, and solder ball lands disposed on one surface of the base substrate. The solder ball lands respectively have land holes having different sizes. The land hole disposed at the center portion of the base substrate and the land hole disposed at the edge portion of the base substrate may have different sizes. For example, the sizes of the land holes may increase from the center portion of the base substrate to the edge portion thereof, and alternatively, the sizes of the land holes may decrease from the center portion of the base substrate to the edge portion thereof.
    Type: Application
    Filed: May 7, 2007
    Publication date: February 14, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Gui JO, Seung-Kon MOK, Han-Shin YOUN
  • Publication number: 20070190688
    Abstract: A method for manufacturing a semiconductor device may comprise preparing a wafer having a front surface and a back surface. The wafer may have a plurality of semiconductor chips and scribe lines between the adjacent semiconductor chips. The wafer may be sawn along the scribe lines to form grooves between the adjacent semiconductor chips. A liquid protection material may be screen printed or spin-coated to form a protection layer on the back surface and within the grooves. The protection layer within the grooves may be more narrowly cut to form individual semiconductor devices and to leave a protection layer remaining thereon.
    Type: Application
    Filed: December 1, 2006
    Publication date: August 16, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Han-Shin YOUN, Seung-Kon MOK, Young-Doo JUNG
  • Publication number: 20060006511
    Abstract: An ultrathin module is provided for special types of semiconductor devices such as image sensor devices and micro-electro-mechanical system (MEMS) devices. In the module, a chip cover is directly attached to a semiconductor chip so as to protect a light-sensing area or mechanical elements of the chip. The chip cover may also be used as a lens assembly and an infrared light filter. In a fabrication method, the chips are provided on a wafer, and the chip covers are attached to the chips, respectively, before the wafer is sliced to separate the chips from one another.
    Type: Application
    Filed: December 14, 2004
    Publication date: January 12, 2006
    Inventors: Kwon-Young Roh, Seung-Kon Mok
  • Patent number: 6963033
    Abstract: An array of solder structures comprising a plurality of radially-curved exterior surfaces, each one enclosing a predetermined-sized cavity that can be used for flexibly joining together at predetermined conductive contact points two planar elements having dissimilar properties. By assembling the two planar elements in a tiered arrangement, one planar element having an array of annular conductive pads and the other planar element having either a corresponding array of annular or circular conductive pads, separated by an array of spherical solder balls comprised of solder and a fluxing agent, a hollow solder structure can be created during a melting and subsequent cooling of the solder compound. The plasticity/resiliency characteristics of the resulting hollow solder structure absorbs lateral movement of the two planar elements relative to each other without degradation of the solder joint.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: November 8, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Young Kim, Ho-Jeong Moon, Dong-Kil Shin, Seung-Kon Mok
  • Publication number: 20050116142
    Abstract: A size reduced solid-state imaging apparatus may be provided. The solid-state imaging apparatus may include a wiring substrate having a body having a cavity on an area which a semiconductor chip may be mounted, a lead that may project inward into the cavity from the internal side of the body, and/or a tie bar.
    Type: Application
    Filed: November 1, 2004
    Publication date: June 2, 2005
    Inventors: Seung-Kon Mok, Young-Hoon Ro
  • Publication number: 20040263667
    Abstract: PURPOSE: A semiconductor package and a method for fabricating the same are provided to shorten a length of a signal line for connecting a semiconductor chip with a substrate and simplify a structure of the semiconductor package.
    Type: Application
    Filed: May 12, 2004
    Publication date: December 30, 2004
    Inventors: Kwan-Jai Lee, Sa-Yoon Kang, Seung-Kon Mok
  • Patent number: 6638638
    Abstract: A solder structure comprising a radially-curved exterior surface enclosing a predetermined-sized cavity used for flexibly joining together at predetermined conductive contact points two planar elements having dissimilar properties. By assembling the two planar elements in a tiered arrangement, one planar element having an annular conductive pad and the other planar element having either a corresponding annular or circular conductive pad, separated by a spherical solder compound comprised of solder and a fluxing agent, a hollow solder structure can be created during a melting and subsequent cooling of the solder compound. The plasticity/resiliency characteristics of the resulting hollow solder structure absorbs lateral movement of the two planar elements relative to each other without degradation of the solder joint.
    Type: Grant
    Filed: September 18, 2001
    Date of Patent: October 28, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Young Kim, Ho-Jeong Moon, Dong-Kil Shin, Seung-Kon Mok
  • Publication number: 20030052156
    Abstract: A solder structure comprising a radially-curved exterior surface enclosing a predetermined-sized cavity used for flexibly joining together at predetermined conductive contact points two planar elements having dissimilar properties. By assembling the two planar elements in a tiered arrangement, one planar element having an annular conductive pad and the other planar element having either a corresponding annular or circular conductive pad, separated by a spherical solder compound comprised of solder and a fluxing agent, a hollow solder structure can be created during a melting and subsequent cooling of the solder compound. The plasticity/resiliency characteristics of the resulting hollow solder structure absorbs lateral movement of the two planar elements relative to each other without degradation of the solder joint.
    Type: Application
    Filed: September 18, 2001
    Publication date: March 20, 2003
    Inventors: Sang-Young Kim, Ho-Jeong Moon, Dong-Kil Shin, Seung-Kon Mok
  • Publication number: 20030051909
    Abstract: An array of solder structures comprising a plurality of radially-curved exterior surfaces, each one enclosing a predetermined-sized cavity that can be used for flexibly joining together at predetermined conductive contact points two planar elements having dissimilar properties. By assembling the two planar elements in a tiered arrangement, one planar element having an array of annular conductive pads and the other planar element having either a corresponding array of annular or circular conductive pads, separated by an array of spherical solder balls comprised of solder and a fluxing agent, a hollow solder structure can be created during a melting and subsequent cooling of the solder compound. The plasticity/resiliency characteristics of the resulting hollow solder structure absorbs lateral movement of the two planar elements relative to each other without degradation of the solder joint.
    Type: Application
    Filed: January 2, 2002
    Publication date: March 20, 2003
    Inventors: Sang-Young Kim, Ho-Jeong Moon, Dong-Kil Shin, Seung-Kon Mok
  • Patent number: 5965947
    Abstract: In a semiconductor package which includes a plurality of semiconductor chips of different kinds, some of the chips are bonded to die bonding pad by means of a conductive adhesive, while the other chips are bonded by means of a non-conductive adhesive that contains highly insulating beads. Encapsulation of the package is by a molding compound. A nitride film or an organic insulating film is disposed on a back side of the chips bonded by the non-conductive adhesive to improve the withstand voltage between these chips and the die pad.
    Type: Grant
    Filed: August 19, 1997
    Date of Patent: October 12, 1999
    Assignee: SamSung Electronics Co., Ltd.
    Inventors: Shi-baek Nam, Seung-kon Mok, Dae-hoon Kwon
  • Patent number: 5677569
    Abstract: A stacked semiconductor multi-package including a plurality of individual semiconductor chip packages stacked over one another. The individual packages have a substrate provided with a plurality of bonding pads, electrode pads electrically connected to the bonding pads through wires, and chips attached to upper and lower surfaces of the substrate. A paddles lead frame is provided onto which the individual packages are attached to upper and lower surfaces thereof, and variants thereof. For these packages, since individual packages are mounted on upper and lower surfaces of a single printed circuit board or lead frame, the mounting density can be significantly increased and their production can be simplified.
    Type: Grant
    Filed: October 27, 1995
    Date of Patent: October 14, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki Won Choi, Seung Kon Mok, Seung Ho Ahn
  • Patent number: 5621242
    Abstract: A thin semiconductor package having a support film formed on an upper surface of the inner leads with a thickness approximately equal to the thickness of a portion of the molding compound overlaying the inner leads.
    Type: Grant
    Filed: June 5, 1996
    Date of Patent: April 15, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-Kon Mok, Seung-Ho Ahn, Gu-Sung Kim