Patents by Inventor Seung Min Song
Seung Min Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11770893Abstract: A display device includes: a display panel including a bending area; and a first passivation film and a second passivation film disposed on a first surface of the display panel to be spaced apart from each other. The second passivation film includes a first flat portion and a first stepped portion overlapping the bending area, and a thickness of the first stepped portion is less than a thickness of the first flat portion.Type: GrantFiled: June 30, 2020Date of Patent: September 26, 2023Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Seung Min Song, Ki Nyeng Kang, Seon Beom Ji, Tae Hoon Yang
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Publication number: 20230291060Abstract: A battery module includes a battery cell stack in which a plurality of battery cells are stacked, a first frame member accommodating the battery cell stack and having an open upper portion, a second frame member covering the battery cell stack from an upper portion of the first frame member, a connection portion coupling the first frame member and the second frame member to each other, and an insulating sheet disposed between the battery cell stack and the second frame member, wherein the insulating sheet is disposed to extend up to a region in which the connection portion is positioned.Type: ApplicationFiled: November 3, 2021Publication date: September 14, 2023Applicant: LG ENERGY SOLUTION, LTD.Inventors: Seung Min SONG, Sunghwan JANG, Junyeob SEONG
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Patent number: 11744126Abstract: A display device may include a display panel including a display area, a non-display area which may be disposed on a periphery of the display area, and a pad area which may be disposed on one side of the non-display area. The display panel may include data lines disposed in the display area of the display panel along a second direction which intersects a first direction, and connection lines disposed in the display area of the display panel along the first direction. A first data line among the data lines may be connected to a first connection line among the connection lines.Type: GrantFiled: April 22, 2022Date of Patent: August 29, 2023Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Seung Hwan Cho, Jong Hyun Choi, Ju Chan Park, Seung Min Song, Min Seong Yi
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Patent number: 11735629Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a gate structure on the substrate. The semiconductor device includes a channel on the substrate. The semiconductor device includes a source/drain layer on the channel. Moreover, the semiconductor device includes a spacer on a sidewall of the gate structure. The spacer includes a central portion overlapping the channel in a vertical direction, and a protrusion portion protruding from the central portion. Related methods of manufacturing semiconductor devices are also provided.Type: GrantFiled: December 3, 2021Date of Patent: August 22, 2023Inventors: Seung-Min Song, Woo-Seok Park, Jung-Gil Yang, Geum-Jong Bae, Dong-Il Bae
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Publication number: 20230238383Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.Type: ApplicationFiled: April 3, 2023Publication date: July 27, 2023Inventors: JUNG-GIL YANG, GEUM-JONG BAE, DONG-IL BAE, SEUNG-MIN SONG, WOO-SEOK PARK
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Patent number: 11710770Abstract: A semiconductor device includes a substrate having a first region and a second region, first and second nanowires disposed sequentially on the substrate in the first region, and extending respectively in a first direction, third and fourth nanowires disposed sequentially on the substrate in the second region, and extending respectively in the first direction, a first inner spacer between the first nanowire and the second nanowire, and including hydrogen of a first hydrogen mole fraction, and a second inner spacer between the third nanowire and the fourth nanowire, and including hydrogen of a second hydrogen mole fraction that is greater than the first hydrogen mole fraction.Type: GrantFiled: January 14, 2022Date of Patent: July 25, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Woo Cheol Shin, Sun Wook Kim, Seung Min Song, Nam Hyun Lee
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Patent number: 11699728Abstract: A semiconductor device including a fin field effect transistor (fin-FET) includes active fins disposed on a substrate, isolation layers on both sides of the active fins, a gate structure formed to cross the active fins and the isolation layers, source/drain regions on the active fins on sidewalls of the gate structure, a first interlayer insulating layer on the isolation layers in contact with portions of the sidewalls of the gate structure and portions of surfaces of the source/drain regions, an etch stop layer configured to overlap the first interlayer insulating layer, the sidewalls of the gate structure, and the source/drain regions, and contact plugs formed to pass through the etch stop layer to contact the source/drain regions. The source/drain regions have main growth portions in contact with upper surfaces of the active fins.Type: GrantFiled: December 18, 2020Date of Patent: July 11, 2023Inventors: Chang Woo Noh, Seung Min Song, Geum Jong Bae, Dong Il Bae
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Publication number: 20230166419Abstract: Provided is a razor cartridge including: at least one razor blade having a cutting edge formed therein; a blade housing accommodating the at least one razor blade in a longitudinal direction; and a housing cover comprising a razor blade window and a window frame, the razor blade window through which at least a portion of the cutting edge is exposed, and the window frame which is formed to surround at least a portion of the razor blade window and detachably coupled to the blade housing. At least one of the blade housing and the housing cover includes a detachment part for separating at least a portion of the window frame from the housing cover by an external force.Type: ApplicationFiled: November 23, 2022Publication date: June 1, 2023Inventors: Seung Min SONG, Young Jin LEE, Sung Hee SON, Sang Hun PARK
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Patent number: 11640973Abstract: A semiconductor device and a fabricating method thereof are provided. The semiconductor device includes a substrate, a first nanowire spaced apart from a first region of the substrate, a first gate electrode surrounding a periphery of the first nanowire, a second nanowire spaced apart from a second region of the substrate and extending in a first direction and having a first width in a second direction intersecting the first direction, a supporting pattern contacting the second nanowire and positioned under the second nanowire, and a second gate electrode extending in the second direction and surrounding the second nanowire and the supporting pattern.Type: GrantFiled: October 22, 2021Date of Patent: May 2, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Jung Gil Yang, Dong Il Bae, Chang Woo Sohn, Seung Min Song, Dong Hun Lee
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Publication number: 20230096089Abstract: A display device, includes: a display area and a non-display area; a plurality of signal lines over the display area; and a plurality of connection lines in the display area and connected to the signal lines, wherein the plurality of connection lines includes a plurality of first connection lines connected to the signal lines, respectively, a plurality of third connection lines on a same layer as the first connection lines, and a plurality of second connection lines connecting the first connection lines to the third connection lines.Type: ApplicationFiled: December 5, 2022Publication date: March 30, 2023Inventors: Seung Hwan CHO, Jong Hyun CHOI, Ju Chan PARK, Seung Min SONG, Min Seong YI
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Patent number: 11594550Abstract: A nonvolatile memory device with improved product reliability and a method of fabricating the same is provided. The nonvolatile memory device comprises a substrate, a first mold structure disposed on the substrate and including a plurality of first gate electrodes, a second mold structure disposed on the first mold structure and including a plurality of second gate electrodes and a plurality of channel structures intersecting the first gate electrodes and the second gate electrodes by penetrating the first and second mold structures, wherein the first mold structure includes first and second stacks, which are spaced apart from each other, and the second mold structure includes a third stack, which is stacked on the first stack, a fourth stack, which is stacked on the second stack, and first connecting parts, which connect the third and fourth stacks.Type: GrantFiled: April 20, 2020Date of Patent: February 28, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kang Min Kim, Seung Min Song, Jae Hoon Shin, Joong Shik Shin, Geun Won Lim
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Publication number: 20220416327Abstract: A battery module including: a battery cell stack in which a plurality of battery cells are stacked; a housing that houses the battery cell stack; a busbar frame that covers the front and rear surfaces of the battery cell stack; and an insulating member that has an upper part and two side parts, and surrounds the upper surface and both side surfaces of the battery cell stack, and the insulating member is positioned between the battery cell stack and the housing. Both side parts of the insulating member are formed by alternately and repeatedly folding a portion of the insulating member.Type: ApplicationFiled: August 5, 2021Publication date: December 29, 2022Inventors: Sunghwan Jang, Junyeob Seong, Seung Min Song
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Patent number: 11521545Abstract: A display device, includes: a display area and a non-display area; a plurality of signal lines over the display area; and a plurality of connection lines in the display area and connected to the signal lines, wherein the plurality of connection lines includes a plurality of first connection lines connected to the signal lines, respectively, a plurality of third connection lines on a same layer as the first connection lines, and a plurality of second connection lines connecting the first connection lines to the third connection lines.Type: GrantFiled: April 16, 2020Date of Patent: December 6, 2022Assignee: Samsung Display Co., Ltd.Inventors: Seung Hwan Cho, Jong Hyun Choi, Ju Chan Park, Seung Min Song, Min Seong Yi
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Publication number: 20220328483Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.Type: ApplicationFiled: June 20, 2022Publication date: October 13, 2022Inventors: JUNG-GIL YANG, GEUM-JONG BAE, DONG-IL BAE, SEUNG-MIN SONG, WOO-SEOK PARK
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Publication number: 20220310852Abstract: A semiconductor device includes a substrate, a plurality of channel layers stacked on the substrate, a gate electrode surrounding the plurality of channel layers, and embedded source/drain layers on opposing sides of the gate electrode. The embedded source/drain layers each have a first region and a second region on the first region. The second region has a plurality of layers having different compositions.Type: ApplicationFiled: June 15, 2022Publication date: September 29, 2022Inventors: Jung Gil Yang, Woo Seok PARK, Dong Chan SUH, Seung Min SONG, Geum Jong BAE, Dong Il BAE
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Publication number: 20220246712Abstract: A display device may include a display panel including a display area, a non-display area which may be disposed on a periphery of the display area, and a pad area which may be disposed on one side of the non-display area. The display panel may include data lines disposed in the display area of the display panel along a second direction which intersects a first direction, and connection lines disposed in the display area of the display panel along the first direction. A first data line among the data lines may be connected to a first connection line among the connection lines.Type: ApplicationFiled: April 22, 2022Publication date: August 4, 2022Applicant: Samsung Display Co., LTD.Inventors: Seung Hwan CHO, Jong Hyun CHOI, Ju Chan PARK, Seung Min SONG, Min Seong YI
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Publication number: 20220238707Abstract: A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are disposed at a plurality of levels, respectively, and spaced apart from each other in a vertical direction on an upper surface of a substrate. The gate structure is disposed on the substrate, at least partially surrounds a surface of each of the channels, and extends in a first direction substantially parallel to the upper surface of the substrate. The source/drain layer is disposed at each of opposite sides of the gate structure in a second direction substantially parallel to the upper surface of the substrate and substantially perpendicular to the first direction and is connected to sidewalls of the channels. A length of the gate structure in the second direction changes along the first direction at a first height from the upper surface of the substrate in the vertical direction.Type: ApplicationFiled: April 18, 2022Publication date: July 28, 2022Inventors: Jung-Gil YANG, Beom-Jin PARK, Seung-Min SONG, Geum-Jong BAE, Dong-Il BAE
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Publication number: 20220231127Abstract: Provided is a semiconductor device comprising an active region on a substrate and including first and second sidewalls extending in a first direction and an epitaxial pattern on the active region, wherein the epitaxial pattern includes first and second epitaxial sidewalls extending from the first and second sidewalls, respectively, the first epitaxial sidewall includes a first epitaxial lower sidewall, a first epitaxial upper sidewall, and a first epitaxial connecting sidewall connecting the first epitaxial lower sidewall and the first epitaxial upper sidewall, the second epitaxial sidewall includes a second epitaxial lower sidewall, a second epitaxial upper sidewall, and a second epitaxial connecting sidewall connecting the second epitaxial lower sidewall and the second epitaxial upper sidewall, a distance between the first and second epitaxial upper sidewalls decreases away from the active region, and the first and second epitaxial lower sidewalls extend in parallel to a top surface of the substrate.Type: ApplicationFiled: April 7, 2022Publication date: July 21, 2022Inventors: Jung Gil YANG, Seung Min SONG, Soo Jin JEONG, Dong Il BAE, Bong Seok SUH
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Patent number: 11393929Abstract: A semiconductor device includes a substrate, a plurality of channel layers stacked on the substrate, a gate electrode surrounding the plurality of channel layers, and embedded source/drain layers on opposing sides of the gate electrode. The embedded source/drain layers each have a first region and a second region on the first region. The second region has a plurality of layers having different compositions.Type: GrantFiled: November 20, 2020Date of Patent: July 19, 2022Inventors: Jung Gil Yang, Woo Seok Park, Dong Chan Suh, Seung Min Song, Geum Jong Bae, Dong Il Bae
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Patent number: 11367723Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.Type: GrantFiled: September 30, 2020Date of Patent: June 21, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Gil Yang, Geum-Jong Bae, Dong-Il Bae, Seung-Min Song, Woo-Seok Park