Patents by Inventor Seung Moo Rim
Seung Moo Rim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140038371Abstract: A TFT LCD array substrate and a manufacturing method thereof. The manufacturing method steps are: forming a thin film transistor on a substrate to form a gate line and a gate electrode connected with the gate line on the substrate; forming a gate insulating layer and a semiconductor layer on the gate electrode; forming an ohmic contact layer on the semiconductor layer; forming a transparent pixel electrode layer and a source/drain electrode metal layer in sequence on the resultant substrate, wherein the transparent pixel electrode layer is electrically insulated from the gate line and the gate electrode, and the transparent pixel electrode layer forms an ohmic contact with two sides of the semiconductor layer via the ohmic contact layer; and performing masking and etching with a gray tone mask with respect to the resultant substrate to form a transparent pixel electrode, a source/drain electrode and a data line simultaneously.Type: ApplicationFiled: October 17, 2013Publication date: February 6, 2014Applicant: Beijing BOE Optoelectronics Technology Co., LTDInventors: Chaoyong DENG, Seung Moo RIM
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Patent number: 8642404Abstract: A TFT LCD array substrate and a manufacturing method thereof. The manufacturing method includes the steps of: forming a thin film transistor on a substrate to form a gate line and a gate electrode connected with the gate line on the substrate; forming a gate insulating layer and a semiconductor layer on the gate electrode; forming an ohmic contact layer on the semiconductor layer; forming a transparent pixel electrode layer and a source/drain electrode metal layer in sequence on the resultant substrate, wherein the transparent pixel electrode layer is electrically insulated from the gate line and the gate electrode, and the transparent pixel electrode layer forms an ohmic contact with two sides of the semiconductor layer via the ohmic contact layer; and performing masking and etching with a gray tone mask with respect to the resultant substrate to form a transparent pixel electrode, a source/drain electrode and a data line simultaneously.Type: GrantFiled: January 7, 2013Date of Patent: February 4, 2014Assignee: Beijing BOE Optoelectronics Technology Co., LtdInventors: Chaoyong Deng, Seung Moo Rim
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Patent number: 8569118Abstract: A TFT LCD array substrate and a manufacturing method thereof. The manufacturing method includes the steps of: forming a thin film transistor on a substrate to form a gate line and a gate electrode connected with the gate line on the substrate; forming a gate insulating layer and a semiconductor layer on the gate electrode; forming an ohmic contact layer on the semiconductor layer; forming a transparent pixel electrode layer and a source/drain electrode metal layer in sequence on the resultant substrate, wherein the transparent pixel electrode layer is electrically insulated from the gate line and the gate electrode, and the transparent pixel electrode layer forms an ohmic contact with two sides of the semiconductor layer via the ohmic contact layer; and performing masking and etching with a gray tone mask with respect to the resultant substrate to form a transparent pixel electrode, a source/drain electrode and a data line simultaneously.Type: GrantFiled: January 7, 2013Date of Patent: October 29, 2013Assignee: Beijing BOE Optoelectronics Technology Co., LtdInventors: Chaoyong Deng, Seung Moo Rim
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Patent number: 8497964Abstract: A thin film transistor liquid crystal display (TFT-LCD) array substrate and a method for forming the same. The thin film transistor liquid crystal display (TFT-LCD) device, comprising gate lines and data lines that intersecting with each other to define pixel regions, wherein a pixel electrode and a thin film transistor are formed in each of the pixel regions, and wherein the data lines each have a mirror-symmetry structure so that coupling capacitance between one data line and the pixel electrodes in an upper adjacent pixel region and a lower pixel region that are adjacent changes oppositely.Type: GrantFiled: February 10, 2010Date of Patent: July 30, 2013Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.Inventors: Xu Chen, Seung Moo Rim, Zhenyu Xie, Xiang Liu
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Publication number: 20130122624Abstract: A TFT LCD array substrate and a manufacturing method thereof. The manufacturing method includes the steps of: forming a thin film transistor on a substrate to form a gate line and a gate electrode connected with the gate line on the substrate; forming a gate insulating layer and a semiconductor layer on the gate electrode; forming an ohmic contact layer on the semiconductor layer; forming a transparent pixel electrode layer and a source/drain electrode metal layer in sequence on the resultant substrate, wherein the transparent pixel electrode layer is electrically insulated from the gate line and the gate electrode, and the transparent pixel electrode layer forms an ohmic contact with two sides of the semiconductor layer via the ohmic contact layer; and performing masking and etching with a gray tone mask with respect to the resultant substrate to form a transparent pixel electrode, a source/drain electrode and a data line simultaneously.Type: ApplicationFiled: January 7, 2013Publication date: May 16, 2013Inventors: Chaoyong DENG, Seung Moo Rim
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Publication number: 20130056739Abstract: A TFT array substrate and a manufacturing method thereof, where the TFT array substrate includes a substrate; a gate line and a gate electrode integrated therewith, which are covered by a gate insulating layer, a semiconductor layer, and a ohmic contact layer sequentially. An insulating layer is formed on the resulting substrate and on both sides of the gate line and the gate electrode, the gate insulating layer, the semiconductor layer, and the ohmic contact layer. A trench is then formed in the ohmic contact layer to divide the ohmic contact layer over the semiconductor layer. A data line and first and second source/drain electrodes are then formed on the insulating layer and the ohmic contact layer.Type: ApplicationFiled: October 31, 2012Publication date: March 7, 2013Inventors: Zhangtao Wang, Haijun Qiu, Tae Yup Min, Seung Moo Rim
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Patent number: 8354305Abstract: A TFT LCD array substrate and a manufacturing method thereof. The manufacturing method includes the steps of: forming a thin film transistor on a substrate to form a gate line and a gate electrode connected with the gate line on the substrate; forming a gate insulating layer and a semiconductor layer on the gate electrode; forming an ohmic contact layer on the semiconductor layer; forming a transparent pixel electrode layer and a source/drain electrode metal layer in sequence on the resultant substrate, wherein the transparent pixel electrode layer is electrically insulated from the gate line and the gate electrode, and the transparent pixel electrode layer forms an ohmic contact with two sides of the semiconductor layer via the ohmic contact layer; and performing masking and etching with a gray tone mask with respect to the resultant substrate to form a transparent pixel electrode, a source/drain electrode and a data line simultaneously.Type: GrantFiled: April 28, 2011Date of Patent: January 15, 2013Assignee: Beijing BOE Optoelectronics Technology Co., LtdInventors: Chaoyong Deng, Seung Moo Rim
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Patent number: 8324033Abstract: A TFT array substrate and a manufacturing method thereof, where the TFT array substrate includes a substrate; a gate line and a gate electrode integrated therewith, which are covered by a gate insulating layer, a semiconductor layer, and a ohmic contact layer sequentially. An insulating layer is formed on the resulting substrate and on both sides of the gate line and the gate electrode, the gate insulating layer, the semiconductor layer, and the ohmic contact layer. A trench is then formed in the ohmic contact layer to divide the ohmic contact layer over the semiconductor layer. A data line and first and second source/drain electrodes are then formed on the insulating layer and the ohmic contact layer.Type: GrantFiled: December 18, 2007Date of Patent: December 4, 2012Assignee: Beijing BOE Optoelectronics Technology Co., Ltd.Inventors: Zhangtao Wang, Haijun Qiu, Tae Yup Min, Seung Moo Rim
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Patent number: 8269232Abstract: A TFT LCD array substrate and a manufacturing method thereof. The TFT LCD array substrate includes a substrate and a pixel array on the substrate. Each pixel has: a gate line and a gate electrode formed on the substrate; a gate insulating layer formed on the gate line and the gate electrode; a semiconductor layer formed on the gate insulating layer disposed on the gate electrode; an ohmic contact layer having two parts, which are disposed on two sides of the semiconductor layer respectively and are apart from one another; an isolation insulating dielectric layer covering the substrate and the gate insulating layer except a portion on which the semiconductor layer is formed; a pixel electrode formed on the isolation insulating dielectric layer and the ohmic contact layer over the semiconductor layer; a source/drain electrode formed on the pixel electrode over the ohmic contact layer, and a passivation layer at least covering the semiconductor layer.Type: GrantFiled: November 6, 2009Date of Patent: September 18, 2012Assignee: BOE Optoelectronics Technology Co., Ltd.Inventors: Chaoyong Deng, Seung Moo Rim
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Patent number: 8199270Abstract: The present invention relates to a method of manufacturing an array substrate of TFT-LCD. The method includes the following steps. In step 1, a gate metal thin film is deposited on a substrate and patterned into gate electrodes and gate lines by a first patterning process. In step 2, a gate insulation layer, a semiconductor layer and a barrier layer are subsequently deposited on the resultant structure of step 1 and are patterned into gate insulation layer pattern, semiconductor layer pattern and barrier layer pattern by a second patterning process, wherein the barrier layer is used for preventing the semiconductor layer at the TFT channel from being etched. In step 3, an ohmic contact layer, a transparent conductive layer, a source drain metal layer and a passivation layer are subsequently deposited on the resultant structure of step 2, and are patterned into ohmic contact layer pattern, pixel electrodes, data lines, source electrodes, drain electrodes and passivation layer pattern in a patterning process.Type: GrantFiled: December 29, 2009Date of Patent: June 12, 2012Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.Inventors: Xiang Liu, Seung Moo Rim, Xu Chen, Zhenyu Xie
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Publication number: 20120033149Abstract: An array substrate comprises a first substrate and a plurality of gate lines and a plurality of the data lines provided on the first substrate, the plurality of gate lines and the plurality of the data lines define a plurality of pixel units arranged into a matrix form. Each of the plurality of pixel units comprising: a first electrode having slits, comprising two or more regions where the slits have the different tilt degrees; a second electrode; and a thin film transistor switch, wherein the first electrode and the second electrode are used to form a horizontal electric field for driving liquid crystal molecules, the gate line and the thin film transistor switch are arranged between each two regions of the first electrode, and the thin film transistor switch is controlled by the gate line to operate each region of the first electrode.Type: ApplicationFiled: August 3, 2011Publication date: February 9, 2012Applicants: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yongzhi SONG, Jianshe XUE, Zhaohui HAO, Seung Moo RIM
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Patent number: 8049218Abstract: A TFT LCD array substrate and a manufacturing method thereof. The TFT LCD array substrate comprises a substrate. A gate line and a gate electrode that is formed integrally with the gate line are formed on the substrate. A first insulating layer and a semiconductor layer are formed sequentially on the gate line and the gate electrode. A second insulting layer covers sidewalls of the gate line and the gate electrode, the first insulating layer, and the semiconductor layer. An etching stop layer is formed on the semiconductor layer and exposes a part of the semiconductor layer on both sides of the etching stop layer. The TFT LCD of the present invention can be manufactured with a four-mask process.Type: GrantFiled: July 6, 2010Date of Patent: November 1, 2011Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.Inventors: Zhangtao Wang, Haijun Qiu, Tae Yup Min, Seung Moo Rim
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Patent number: 8030654Abstract: A thin film transistor comprising a gate electrode, a gate insulating layer, an active layer, and source and drain electrodes is provided. The gate electrode overlaps with a channel region of the active layer, the gate insulating layer is provided between the gate electrode and the active layer, the source and drain electrodes overlap a source region and a drain region of the active layer, respectively, and a thin film of SiNx or SiOxNy through which electrons are allowed to tunnel is provided between the active layer and the source and drain electrodes.Type: GrantFiled: April 2, 2008Date of Patent: October 4, 2011Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.Inventors: Jianshe Xue, Seung Moo Rim, Ke Liang
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Publication number: 20110223700Abstract: A TFT LCD array substrate and a manufacturing method thereof. The manufacturing method includes the steps of forming a thin film transistor on a substrate to form a gate line and a gate electrode connected with the gate line on the substrate; forming a gate insulating layer and a semiconductor layer on the gate electrode; forming an ohmic contact layer on the semiconductor layer; forming a transparent pixel electrode layer and a source/drain electrode metal layer in sequence on the resultant substrate, wherein the transparent pixel electrode layer is electrically insulated from the gate line and the gate electrode, and the transparent pixel electrode layer forms an ohmic contact with two sides of the semiconductor layer via the ohmic contact layer; and performing masking and etching with a gray tone mask with respect to the resultant substrate to form a transparent pixel electrode, a source/drain electrode and a data line simultaneously.Type: ApplicationFiled: April 28, 2011Publication date: September 15, 2011Inventors: Chaoyong Deng, Seung Moo Rim
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Patent number: 7952099Abstract: A TFT LCD array substrate and a manufacturing method thereof. The manufacturing method includes the steps of: forming a thin film transistor on a substrate to form a gate line and a gate electrode connected with the gate line on the substrate; forming a gate insulating layer and a semiconductor layer on the gate electrode; forming an ohmic contact layer on the semiconductor layer; forming a transparent pixel electrode layer and a source/drain electrode metal layer in sequence on the resultant substrate, wherein the transparent pixel electrode layer is electrically insulated from the gate line and the gate electrode, and the transparent pixel electrode layer forms an ohmic contact with two sides of the semiconductor layer via the ohmic contact layer; and performing masking and etching with a gray tone mask with respect to the resultant substrate to form a transparent pixel electrode, a source/drain electrode and a data line simultaneously.Type: GrantFiled: April 20, 2007Date of Patent: May 31, 2011Assignee: Beijing BOE Optoelectronics Technology Co., Ltd.Inventors: Chaoyong Deng, Seung Moo Rim
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Patent number: 7851806Abstract: The present invention discloses a method for manufacturing a TFT LCD array substrate by utilizing the gray tone mask technology and the photoresist lifting-off technology with only two masks in two photolithography processes, and to a TFT LCD array substrate manufactured by the same. In the resultant array substrate, the gate line and the data line are perpendicular to and intersect with each other to define the pixel area, and one of the gate line and the data line is continuous and the other is discontinuous. The array substrate is covered with a passivation protection film. The disconnected gate line or the data line is connected together through the via holes formed in the passivation protection film and the connecting conductive film formed on the passivation protection film.Type: GrantFiled: May 1, 2009Date of Patent: December 14, 2010Assignee: Beijing BOE Optoelectronics Technology Co., Ltd.Inventors: Chunping Long, Jigang Zhao, Seung Moo Rim
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Publication number: 20100270556Abstract: A TFT LCD array substrate and a manufacturing method thereof. The TFT LCD array substrate comprises a substrate. A gate line and a gate electrode that is formed integrally with the gate line are formed on the substrate. A first insulating layer and a semiconductor layer are formed sequentially on the gate line and the gate electrode. A second insulting layer covers sidewalls of the gate line and the gate electrode, the first insulating layer, and the semiconductor layer. An etching stop layer is formed on the semiconductor layer and exposes a part of the semiconductor layer on both sides of the etching stop layer. The TFT LCD of the present invention can be manufactured with a four-mask process.Type: ApplicationFiled: July 6, 2010Publication date: October 28, 2010Inventors: Zhangtao Wang, Haijun Qiu, Tae Yup Min, Seung Moo Rim
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Publication number: 20100245735Abstract: An array substrate comprises a substrate; a plurality of pixel regions in a matrix arrangement on the substrate, and a plurality of signal lines disposed on the substrate and extended parallel to each other. Each pixel region comprises a pixel electrode and a drive switch. At least part of a first signal line and a second signal line of the plurality of the signal lines connected to pixel electrodes in adjacent lines of the pixel region matrix are formed between the pixel electrodes in adjacent lines of the pixel regions matrix. The first signal line and the second signal line are at least partially overlapped in a direction perpendicular to the substrate. An insulating layer is disposed between the overlapped portion of the first and second signal line.Type: ApplicationFiled: March 26, 2010Publication date: September 30, 2010Applicant: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Zhenyu XIE, Seung Moo RIM, Xu CHEN, Xiang LIU
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Publication number: 20100220254Abstract: A thin film transistor liquid crystal display (TFT-LCD) array substrate comprising a gate line and a data line formed on a base substrate. The gate line and the data line intersect with each other to define a pixel region, in which a pixel electrode and a thin film transistor (TFT) are formed, and a first insulating layer and a second insulating layer are interposed between the gate line and the data line, and the pixel electrode is disposed between the first insulating layer and the second insulating layer. A method of manufacturing a TFT-LCD is also disclosed.Type: ApplicationFiled: February 15, 2010Publication date: September 2, 2010Applicant: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Xiang LIU, Seung Moo RIM, Xu CHEN, Zhenyu XIE
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Publication number: 20100214518Abstract: A thin film transistor liquid crystal display (TFT-LCD) array substrate and a method for forming the same. The thin film transistor liquid crystal display (TFT-LCD) device, comprising gate lines and data lines that intersecting with each other to define pixel regions, wherein a pixel electrode and a thin film transistor are formed in each of the pixel regions, and wherein the data lines each have a mirror-symmetry structure so that coupling capacitance between one data line and the pixel electrodes in an upper adjacent pixel region and a lower pixel region that are adjacent changes oppositely.Type: ApplicationFiled: February 10, 2010Publication date: August 26, 2010Applicant: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Xu CHEN, Seung Moo RIM, Zhenyu XIE, Xiang LIU