Patents by Inventor SEUNGJUNE JEON
SEUNGJUNE JEON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240111431Abstract: A system can include a memory device a memory device comprising multiple dies, and a processing device, operatively coupled with the memory device, to perform various operations including identifying multiple management units to be programmed, where one management unit contains memory cells from a die having one endurance metric and another management unit contains memory cells from a die having another endurance metric, and determining a value of a media endurance metric for each management unit. The operations further include determining, for each management unit, a respective endurance exhaustion parameter defined by a relationship media endurance metrics, and distributing operations to each management unit based on the endurance exhaustion parameter.Type: ApplicationFiled: September 30, 2022Publication date: April 4, 2024Inventors: Ying Yu Tai, Seungjune Jeon
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Publication number: 20240062839Abstract: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations comprising performing a data integrity check on a set of memory cells of a source management unit of the memory device to obtain a data integrity metric value; determining whether the data integrity metric value satisfies a first threshold; responsive to determining that the data integrity metric value fails to satisfy the first threshold, determining whether the data integrity metric value satisfies a second threshold that is lower than the first threshold; responsive to determining that the data integrity metric value satisfies the second threshold, causing the memory device to copy data from the source management unit to a destination set of pages of the memory device; and performing a subsequent data integrity check on one or more invalid pages of the source management unit.Type: ApplicationFiled: August 22, 2022Publication date: February 22, 2024Inventors: Wei Wang, Seungjune Jeon, Yang Liu, Charles See Yeung Kwong
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Publication number: 20240045595Abstract: A processing device in a memory sub-system determines whether a media endurance metric associated with a memory block of a memory device satisfies one or more conditions. In response to the one or more conditions being satisfied, one or more read margin levels corresponding to a page type associated with the memory device are determined. A machine learning model is applied to the one or more read margin levels to generate a margin prediction value based on the page type and a wordline group associated with the memory device. Based on the margin prediction value, the memory device is assigned to a selected bin of a set of bins. A media scan operation is executed on the memory device in accordance with a scan frequency associated with the selected bin.Type: ApplicationFiled: August 3, 2022Publication date: February 8, 2024Inventors: Li-Te Chang, Murong Lang, Charles See Yeung Kwong, Vamsi Pavan Rayaprolu, Seungjune Jeon, Zhenming Zhou
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Patent number: 11860732Abstract: A request is received to program host data to a memory device of a memory sub-system. The host data is associated with a logical address. A redundancy factor that corresponds to the logical address associated with the host data is obtained. A first physical address associated with a first set of cells of the memory device and a second physical address associated with a second set of cells of the memory device are determined based on the redundancy factor. The first set of memory cells is to store the host data and the second set of memory cells is to store redundancy metadata associated with the host data. The host data is programmed to the first set of memory cells. The redundancy metadata associated with the host data is programmed to the second set of memory cells.Type: GrantFiled: August 27, 2021Date of Patent: January 2, 2024Assignee: Micron Technology, Inc.Inventors: Juane Li, Fangfang Zhu, Seungjune Jeon, Yueh-Hung Chen
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Patent number: 11842787Abstract: An apparatus includes an error read flow component resident on a memory sub-system. The error read flow component can cause performance of a plurality of read recovery operations on a group of memory cells that are programmed or read together, or both. The error read flow component can determine whether a particular read recovery operation invoking the group of memory cells was successful. The error read flow component can further cause a counter corresponding to each of the plurality of read recovery operations to be incremented in response to a determination that the particular read recovery operation invoking the group of memory cells was successful.Type: GrantFiled: September 2, 2022Date of Patent: December 12, 2023Assignee: Micron Technology, Inc.Inventor: Seungjune Jeon
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Publication number: 20230393920Abstract: A set of blocks of a memory device comprising a plurality of dies is identified. A block within the set of blocks is identified. The identified block is associated with a capability metric that reflects a projected reliability of the die on which the block resides. Responsive to determining that the capability metric satisfies a condition, a cycle threshold associated with the die is identified. Responsive to determining that a cycle count value derived from a program/erase cycle counter associated with the die matches the cycle threshold, the set of blocks is updated by excluding the block from the set of blocks. A program operation is performed with respect to the updated set of blocks.Type: ApplicationFiled: July 6, 2022Publication date: December 7, 2023Inventors: Charles See Yeung Kwong, Seungjune Jeon, Wei Wang, Zhenming Zhou
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Patent number: 11837303Abstract: A predefined data pattern is written using a plurality of values of a memory access parameter. A corresponding value of a data state metric associated with each value of a plurality of values of the memory access operation parameter is measured. An optimal value of the memory access operation parameter is selected from the plurality of values of the memory access operation parameter.Type: GrantFiled: January 9, 2023Date of Patent: December 5, 2023Assignee: Micron Technology, Inc.Inventors: Seungjune Jeon, Tingjun Xie
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Patent number: 11763896Abstract: A request to read data at the memory device is received. A first read operation is performed to read the data at the memory device using a first read threshold voltage. The data read at the memory device using the first read threshold voltage is determined to be associated with a first unsuccessful correction of an error. Responsive to determining that the data read at the memory device using the first read threshold voltage is associated with the first unsuccessful correction of the error, a second read threshold voltage is stored at a register to replace a preread threshold voltage previously stored at the register that is associated with the memory device. The first preread threshold voltage was previously used to perform a preread operation at the memory device. A second read operation to read the data at the memory device is performed using the second read threshold voltage.Type: GrantFiled: September 23, 2022Date of Patent: September 19, 2023Assignee: Micron Technology, Inc.Inventors: Seungjune Jeon, Zhenming Zhou, Zhenlei Shen
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Patent number: 11755250Abstract: A method includes providing, via a command, a request of enablement of a media management operation to a memory sub-system. The method further includes providing, via the command, an indication of one of a plurality of write types to the media management operation to the memory sub-system. The media management operation can be performed using the indicated write type in response to receipt of the command.Type: GrantFiled: July 1, 2022Date of Patent: September 12, 2023Assignee: Micron Technology, Inc.Inventors: Seungjune Jeon, Jiangli Zhu
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Patent number: 11756604Abstract: A memory access operation performed on a first memory unit of a memory device is detected. A counter associated with the first memory unit is modified. It is determined that the counter satisfies a threshold criterion, wherein the threshold criterion is based on a random or pseudo-random number within a margin of an average number of memory access operations. A refresh operation is performed on a second memory unit.Type: GrantFiled: September 16, 2022Date of Patent: September 12, 2023Assignee: Micron Technology, Inc.Inventors: Charles See Yeung Kwong, Seungjune Jeon
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Patent number: 11734094Abstract: A method includes monitoring, by a processing device, error characteristics of a particular memory component among a plurality of memory components of a memory sub-system and detecting, by the processing device and based on the monitored error characteristics, an error characteristic associated with the particular memory component that exhibits a value that is greater than or equal to a threshold error characteristic value. The method can further include causing, by the processing device, a counter coupled to the plurality of memory components to be updated in response to the detection that the particular memory component exhibits the value of the error characteristic that is greater than or equal to the threshold error characteristic value.Type: GrantFiled: August 19, 2020Date of Patent: August 22, 2023Assignee: Micron Technology, Inc.Inventors: Seungjune Jeon, Tingjun Xie
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Publication number: 20230251927Abstract: A request to write host data to a memory device of a memory sub-system is received. Redundancy metadata associated with the host data is generated. A determination of a first status associated with the host data is made. The redundancy metadata associated with the host data is updated to indicate at least the first status associated with the host data. A memory access operation is performed to write the host data and the updated redundancy metadata to the memory device.Type: ApplicationFiled: April 12, 2023Publication date: August 10, 2023Inventors: Seungjune Jeon, Juane Li, Ning Chen
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Patent number: 11709622Abstract: Systems and methods are disclosed including a memory device and a processing device, operatively coupled with the memory device, to perform operations comprising: receiving a write data request to store write data to the memory device; determining a physical block address associated with the write data request; performing a bitwise operation on each bit of the physical block address to generate a seed value; generating an output sequence based on the seed value; performing another bitwise operation on the output sequence and the write data to generate a randomized sequence; and storing, on the memory device, the randomized sequence.Type: GrantFiled: September 29, 2021Date of Patent: July 25, 2023Assignee: Micron Technology, Inc.Inventors: Fangfang Zhu, Juane Li, Seungjune Jeon, Jiangli Zhu, Ying Tai
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Patent number: 11698867Abstract: A logical-to-physical (L2P) data structure and a physical-to-logical (P2L) data structure are maintained. The L2P data structure comprises table entries that map a logical address to a physical address. The P2L data structure comprises data entries that map a physical address to a logical address. The P2L data entries also comprise a data move status, a base address, and a boundary indicator. A move operation is detected, wherein the move operation indicates that data referenced by a logical address is to be moved from a source physical address to a destination physical address. Responsive to detecting the move operation, the data move status associated with the source physical address in the P2L data structure is updated.Type: GrantFiled: August 26, 2021Date of Patent: July 11, 2023Assignee: Micron Technology, Inc.Inventors: Seungjune Jeon, Fangfang Zhu, Juane Li, Jiangli Zhu, Ning Chen
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Patent number: 11687248Abstract: Respective life expectancies of a first data unit and a second data unit of the memory device is obtained. A first initial age value corresponding to the first data unit and a second initial age value corresponding to the second data unit are determined. A lower one of the first initial age value and the second initial age value is identified. A first media management operation on a corresponding one of the first data unit or the second data unit associated with the lower one of the first initial age value and the second initial age value is performed. A second media management operation on the first data unit and the second data unit is performed.Type: GrantFiled: May 13, 2021Date of Patent: June 27, 2023Assignee: Micron Technology, Inc.Inventors: Zhongguang Xu, Zhenlei Shen, Tingjun Xie, Seungjune Jeon, Murong Lang, Zhenming Zhou
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Publication number: 20230168812Abstract: Systems and methods are disclosed including a processing device operatively coupled to memory device. The processing device performs operations comprising responsive to receiving a memory access command, determining a portion of the memory device that is referenced by a logical address specified by the memory access command; determining an endurance factor associated with the portion; and modifying, based on a value derived from the endurance factor, a media management metric associated with the portion of the memory device.Type: ApplicationFiled: January 30, 2023Publication date: June 1, 2023Inventors: Zhenming Zhou, Seungjune Jeon, Zhenlei Shen
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Patent number: 11636008Abstract: A request to program host data to a memory device of a memory sub-system is received. Redundancy metadata associated with the host data is generated. A determination is made, in view of the received request, whether the host data is valid data or invalid data. In response to a determination that the host data is invalid data, updated redundancy metadata associated with the host data is generated. The updated redundancy metadata indicates that the host data is invalid data. The host data and the updated redundancy metadata is programmed to the memory device.Type: GrantFiled: September 1, 2021Date of Patent: April 25, 2023Assignee: Micron Technology, Inc.Inventors: Seungjune Jeon, Juane Li, Ning Chen
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Patent number: 11625295Abstract: A memory device is set to a performance mode. Data item is received. The data item in a page of a logical unit of the memory device associated with a fault tolerant stripe is stored. A redundancy metadata update for the fault tolerant stripe is delayed until a subsequent media management operation.Type: GrantFiled: May 10, 2021Date of Patent: April 11, 2023Assignee: Micron Technology, Inc.Inventors: Seungjune Jeon, Zhenming Zhou, Jiangli Zhu
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Patent number: 11615830Abstract: A media management operation can be performed at a memory sub-system at a current frequency. An operating characteristic associated with the memory sub-system can be identified. The operating characteristic can reflect at least one of a write count, a bit error rate, or a read-retry trigger rate. A determination can be made as to whether the identified operating characteristic satisfies an operating characteristic criterion. In response to determining that the operating characteristic satisfies the characteristic criterion, the media management operation can be performed at a different frequency relative to the current frequency.Type: GrantFiled: June 4, 2021Date of Patent: March 28, 2023Assignee: Micron Technology, Inc.Inventors: Tingjun Xie, Seungjune Jeon, Zhengang Chen, Zhenlei Shen, Charles See Yeung Kwong
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Patent number: 11599272Abstract: Systems and methods are disclosed including a processing device operatively coupled to memory device. The processing device performs operations comprising receiving a memory access command specifying a logical address; determining a physical address associated with the logical address; determining a portion of the memory device that is referenced by the physical address; determine an endurance factor associated with the portion; and increasing, by a value derived from the endurance factor, a media management metric associated with a management unit of the memory device, wherein the management unit is referenced by the physical address.Type: GrantFiled: June 15, 2021Date of Patent: March 7, 2023Assignee: Micron Technology, Inc.Inventors: Zhenming Zhou, Seungjune Jeon, Zhenlei Shen