Abstract: A method includes performing a memory operation to access memory cells of a memory sub-system. The method can further include determining, for the memory operation, a quantity of memory cells available to be accessed during performance of the memory operation. The method can further include determining that a quantity of memory cells that are accessed during performance of the memory operation comprises fewer than the quantity of memory cells available to be accessed. The method can further include incrementing a counter in response to the determination that the quantity of memory cells accessed is fewer than the quantity of memory cells available to be accessed.

Abstract: A method includes providing, via a command, a request of enablement of a media management operation to a memory sub-system. The method further includes providing, via the command, an indication of one of a plurality of write types to the media management operation to the memory sub-system. The media management operation can be performed using the indicated write type in response to receipt of the command.

Abstract: A method includes monitoring, by a processing device, error characteristics of a particular memory component among a plurality of memory components of a memory sub-system and detecting, by the processing device and based on the monitored error characteristics, an error characteristic associated with the particular memory component that exhibits a value that is greater than or equal to a threshold error characteristic value. The method can further include causing, by the processing device, a counter coupled to the plurality of memory components to be updated in response to the detection that the particular memory component exhibits the value of the error characteristic that is greater than or equal to the threshold error characteristic value.

Abstract: A media management operation can be performed at a memory sub-system at a current frequency. An operating characteristic associated with the memory sub-system can be identified. The operating characteristic can reflect at least one of a write count, a bit error rate, or a read-retry trigger rate. A determination can be made as to whether the identified operating characteristic satisfies an operating characteristic criterion. In response to determining that the operating characteristic satisfies the characteristic criterion, the media management operation can be performed at a different frequency relative to the current frequency.

Abstract: In general, embodiments of the technology relate to a method for characterizing persistent storage. The method includes selecting a sample set of physical addresses in a solid state memory module, where the sample set of physical addresses is associated with a region in the solid state memory module (SSMM). The method further includes issuing a write request to the sample set of physical addresses, after issuing the write request, issuing a request read to the sample set of physical addresses to obtain a copy of the data stored in the sample set of physical addresses, obtaining an error parameter for the copy of the data, determining a calculated P/E cycle value for the SSMM using at least the error parameter; and storing the calculated P/E cycle value in the SSMM.

Abstract: A refresh operation can be performed at a memory sub-system The refresh operation can performed at a current frequency. A write count associated with the memory sub-system can be received. A determination can be made as to whether the write count associated with the memory sub-system satisfies a write count threshold. In response to determining that the write count associated with the memory sub-system satisfies the write count threshold, the refresh operation can be performed at an increased frequency relative to the current frequency.

Abstract: A request to read data at the memory device is received. A first read operation is performed to read the data at the memory device using a first read threshold voltage. The data read at the memory device using the first read threshold voltage is determined to be associated with a first unsuccessful correction of an error. Responsive to determining that the data read at the memory device using the first read threshold voltage is associated with the first unsuccessful correction of the error, a second read threshold voltage is stored at a register to replace a preread threshold voltage previously stored at the register that is associated with the memory device. The first preread threshold voltage was previously used to perform a preread operation at the memory device. A second read operation to read the data at the memory device is performed using the second read threshold voltage.

Abstract: A request to read data at the memory device is received. A first read operation is performed to read the data at the memory device using a first read threshold voltage. The data read at the memory device using the first read threshold voltage is determined to be associated with a first unsuccessful correction of an error. Responsive to determining that the data read at the memory device using the first read threshold voltage is associated with the first unsuccessful correction of the error, a second read threshold voltage is stored at a register to replace a preread threshold voltage previously stored at the register that is associated with the memory device. The first preread threshold voltage was previously used to perform a preread operation at the memory device. A second read operation to read the data at the memory device is performed using the second read threshold voltage.

Abstract: A refresh operation can be performed at a memory sub-system The refresh operation can performed at a current frequency. A write count associated with the memory sub-system can be received. A determination can be made as to whether the write count associated with the memory sub-system satisfies a write count threshold. In response to determining that the write count associated with the memory sub-system satisfies the write count threshold, the refresh operation can be performed at an increased frequency relative to the current frequency.

Abstract: In general, embodiments of the technology relate to a method for adjusting solid state memory write parameters. The method includes obtaining a performance goal for the solid state memory, receiving a client write request for data from a client, where the client write request comprises a logical address and data to be written. The method further includes determining a physical address corresponding to the logical address, where the physical address comprises a page number for a physical page in the persistent storage, obtaining at least one verify threshold value using the performance goal, issuing a control module program request including the data to be written and the at least one verify threshold value to a storage module, where the storage module comprises the physical page, and programming the data into the physical page of the storage module using the at least one verify threshold value.

Abstract: A system for controlling a solid state drive is disclosed that includes a plurality of NAND memory devices, each NAND memory device further comprising at least one die, a plurality of blocks associated with each of the dies, and a plurality of pages associated with each of the blocks. A pseudo clock system configured to determine a pseudo clock value for each of the NAND memory devices. An effective retention time system coupled to the plurality of NAND memory devices and configured to determine a maximum effective retention time for each of the NAND memory devices as a function of the pseudo clock value for the NAND memory device.

Abstract: In general, embodiments of the technology relate to a method for adjusting solid state memory write parameters. The method includes obtaining a performance goal for the solid state memory, receiving a client write request for data from a client, where the client write request comprises a logical address and data to be written. The method further includes determining a physical address corresponding to the logical address, where the physical address comprises a page number for a physical page in the persistent storage, obtaining at least one verify threshold value using the performance goal, issuing a control module program request including the data to be written and the at least one verify threshold value to a storage module, where the storage module comprises the physical page, and programming the data into the physical page of the storage module using the at least one verify threshold value.

Abstract: In general, embodiments of the technology relate to a method for adjusting solid state memory write parameters. The method includes obtaining a performance goal for the solid state memory, receiving a client write request for data from a client, where the client write request comprises a logical address and data to be written. The method further includes determining a physical address corresponding to the logical address, where the physical address comprises a page number for a physical page in the persistent storage, obtaining at least one verify threshold value using the performance goal, issuing a control module program request including the data to be written and the at least one verify threshold value to a storage module, where the storage module comprises the physical page, and programming the data into the physical page of the storage module using the at least one verify threshold value.

Abstract: A method is provided that includes performing first decoding operations on data obtained from a plurality of units of memory using soft information values for the plurality of units of memory, where the plurality of units of memory includes an error correction stripe. The method further includes determining that two or more units of memory have uncorrectable errors. The method further includes updating a soft information value for a first unit of memory in accordance with a magnitude of a soft information value for a second unit and a direction based on parity of the error correction stripe excluding the first unit, where the first unit of memory and the second unit of memory are included in the two or more units of memory that have uncorrectable errors. The method further includes performing a second decoding operation on data obtained from the first unit using the updated soft information value.

Abstract: In general, the technology relates to a method for managing persistent storage. The method includes selecting a sample set of physical addresses in a solid state memory module, and performing a garbage collection operation on the sample set of physical addresses. The method further includes, after the garbage collection operation, issuing a write request to the sample set of physical addresses, issuing a request read to the sample set of physical addresses to obtain a copy of the data stored in the sample set of physical addresses, determining an error rate in the copy of the data stored using an Error Correction Code codeword or known data in the write request, determining a calculated P/E cycle value for the SSMM using at least the error rate, and updating an in-memory data structure in a control module with the calculated P/E cycle value.

Abstract: In general, embodiments of the technology relate to improving read performance of solid-state storage by using decoding schemes deemed particularly suitable for the read operation that is currently being performed. More specifically, embodiments of the technology relate to using program/erase (P/E) cycle values, retention times, and page numbers in order to determine the appropriate decoding parameters to use when reading data that has been previously stored in the solid-state storage.

Abstract: In general, embodiments of the technology relate to improving read performance of solid-state storage by using decoding parameters deemed particularly suitable for the read operation that is currently being performed. More specifically, embodiments of the technology relate to using different decoding parameters when a read operation needs to be repeated because the initial read operation has failed.

Abstract: A method for reading data from persistent storage. The method includes receiving a client read request for data from a client. The client read request includes a logical address. The method further includes determining a physical address corresponding to the logical address, determining that the physical address is directed to an open block in the persistent storage and determining that the physical address is directed to a last closed word line of the open block. The method further includes, based on these determinations, obtaining at least one read threshold value for the reading from last closed word lines, issuing a control module read request comprising the at least one read threshold value to a storage module that includes the open block, and obtaining the data from the open block using the at least one read threshold value.

Abstract: A data storage device includes a non-volatile memory and a controller. The non-volatile memory includes a word line coupled to a plurality of storage elements. A method includes detecting a condition associated with a defect in the word line. A first subset of the plurality of storage elements and a second subset of the plurality of storage elements are determined based on an estimated location of the defect. The method further includes determining a first read threshold for the first subset and a second read threshold for the second subset.

Abstract: In general, the technology relates to a method for managing persistent storage. The method includes selecting a sample set of physical addresses in a solid state memory module, and performing a garbage collection operation on the sample set of physical addresses. The method further includes, after the garbage collection operation, issuing a write request to the sample set of physical addresses, issuing a request read to the sample set of physical addresses to obtain a copy of the data stored in the sample set of physical addresses, determining an error rate in the copy of the data stored using an Error Correction Code codeword or known data in the write request, determining a calculated P/E cycle value for the SSMM using at least the error rate, and updating an in-memory data structure in a control module with the calculated P/E cycle value.