Abstract: A test circuit and method provide testing of a capacitive type microsensor. The method includes applying a first signal having a first voltage potential to an input of a microsensor during a non-test operating mode. The method also includes applying a second voltage signal having a second voltage potential different than the first voltage potential during a test mode. The second voltage potential induces a net differential electrostatic force in the microsensor. The method further includes the steps of monitoring an output signal of the microsensor, comparing the output signal to an expected value when the microsensor is in the test mode, and determining if the microsensor is functioning properly as a function of the comparison.

Abstract: A linear accelerometer is provided having a substrate, a fixed electrode supported on the substrate and including a first plurality of fixed capacitive plates, and an inertial mass substantially suspended over a cavity and including a plurality of movable capacitive plates arranged to provide a capacitive coupling with the first plurality of fixed capacitive plates. The inertial mass is linearly movable relative to the fixed electrode. A central member is fixed to the substrate. Support arms support the inertial mass relative to the fixed electrode and allow linear movement of the inertial mass upon experiencing a linear acceleration along a sensing axis, and prevent linear movement along a nonsensing axis. Inputs and output lines are electrically coupled to the fixed electrode and the inertial mass. An output signal is generated which varies as a function of the capacitive coupling and is indicative of linear acceleration along the sensing axis.

Abstract: A balanced angular accelerometer is provided having a substrate, a fixed electrode with a plurality of fixed capacitive plates, and a rotational inertia mass with a central opening and substantially suspended over a cavity and including a plurality of movable capacitive plates arranged to provide a capacitive coupling with the first plurality of fixed capacitive plates. The accelerometer has a central member and an outer member fixed to the substrate. According to one embodiment, a plurality of inner support arms extend between the central member and the inertia mass and a plurality of outer support arms extend between the inertia mass and the outer member to support the mass over the cavity. According to another embodiment, one or more cut out apertures are formed in the inertia mass to compensate for a channel and signal line so as to balance the inertia mass about the center of the inertia mass.

Abstract: A balanced angular accelerometer is provided having a substrate, a fixed electrode with a plurality of fixed capacitive plates, and a rotational inertia mass with a central opening and substantially suspended over a cavity and including a plurality of movable capacitive plates arranged to provide a capacitive coupling with the first plurality of fixed capacitive plates. The accelerometer has a central member and an outer member fixed to the substrate. According to one embodiment, a plurality of inner support arms extend between the central member and the inertia mass and a plurality of outer support arms extend between the inertia mass and the outer member to support the mass over the cavity. According to another embodiment, one or more cut out apertures are formed in the inertia mass to compensate for a channel and signal line so as to balance the inertia mass about the center of the inertia mass.

Abstract: A balanced angular accelerometer is provided having a substrate, a fixed electrode with a plurality of fixed capacitive plates, and a rotational inertia mass with a central opening and substantially suspended over a cavity and including a plurality of movable capacitive plates arranged to provide a capacitive coupling with the first plurality of fixed capacitive plates. The accelerometer has a central member and an outer member fixed to the substrate. According to one embodiment, a plurality of inner support arms extend between the central member and the inertia mass and a plurality of outer support arms extend between the inertia mass and the outer member to support the mass over the cavity. According to another embodiment, one or more cut out apertures are formed in the inertia mass to compensate for a channel and signal line so as to balance the inertia mass about the center of the inertia mass.

Abstract: A balanced angular accelerometer is provided having a substrate, a fixed electrode with a plurality of fixed capacitive plates, and a rotational inertia mass with a central opening and substantially suspended over a cavity and including a plurality of movable capacitive plates arranged to provide a capacitive coupling with the first plurality of fixed capacitive plates. The accelerometer has a central member and an outer member fixed to the substrate. According to one embodiment, a plurality of inner support arms extend between the central member and the inertia mass and a plurality of outer support arms extend between the inertia mass and the outer member to support the mass over the cavity. According to another embodiment, one or more cut out apertures are formed in the inertia mass to compensate for a channel and signal line so as to balance the inertia mass about the center of the inertia mass.

Abstract: A linear accelerometer is provided having a substrate, a fixed electrode supported on the substrate and including a first plurality of fixed capacitive plates, and an inertial mass substantially suspended over a cavity and including a plurality of movable capacitive plates arranged to provide a capacitive coupling with the first plurality of fixed capacitive plates. The inertial mass is linearly movable relative to the fixed electrode. A central member is fixed to the substrate. Support arms support the inertial mass relative to the fixed electrode and allow linear movement of the inertial mass upon experiencing a linear acceleration along a sensing axis, and prevent linear movement along a nonsensing axis. Inputs and output lines are electrically coupled to the fixed electrode and the inertial mass. An output signal is generated which varies as a function of the capacitive coupling and is indicative of linear acceleration along the sensing axis.

Abstract: A method of removing bias drift from the output signal of a sensor is provided. The method includes sensing a condition with a sensor and generating an output signal, differentiating the output signal, and comparing the differentiated output signal with a threshold change. The method also includes the steps of determining the presence of bias drift based on the comparison, generating a bias adjustment command signal based on the determined presence of bias drift, and adjusting the sensed signal generated by the sensor in accordance with the bias adjusted command signal so as to remove bias drift from the output signal.

Abstract: A method of removing bias drift from the output signal of a sensor is provided. The method includes sensing a condition with a sensor and generating an output signal, differentiating the output signal, and comparing the differentiated output signal with a threshold change. The method also includes the steps of determining the presence of bias drift based on the comparison, generating a bias adjustment command signal based on the determined presence of bias drift, and adjusting the sensed signal generated by the sensor in accordance with the bias adjusted command signal so as to remove bias drift from the output signal.

Abstract: An angular accelerometer having a substrate, a fixed electrode supported on the substrate and including a first plurality of fixed capacitive plates, and a ring-shaped rotational inertia mass substantially suspended over a cavity and including a plurality of movable capacitive plates arranged to provide a capacitive coupling with the first plurality of fixed capacitive plates. A central member is fixedly attached to the substrate. A plurality of support arms extend between the central member and the ring-shaped mass for supporting the mass relative to the fixed electrode during rotational movement of the mass. The angular accelerometer also includes an input electrically coupled to the fixed electrode for receiving an input signal, and an output coupled to the mass for providing an output signal which varies as a function of the capacitive coupling and is indicative of angular acceleration.

Abstract: A converter for converting an analog signal into a digital representation having a most significant bit (MSB), upper-significant bits (USBs), and lower-significant bits (LSBs) with a least significant bit being a predetermined incremental voltage value. The converter is responsive to external signals and is adapted to receive a supply voltage. The analog-to-digital converter provides for a determination of the most significant bit (MSB) that does not rely on the ratio factor between the capacitors of the charge-storage capacitor bank nor on the accuracy of the ratio factor of the resistors of the voltage-scale resistive ladder network.

Abstract: A low-input capacitance self-biased CMOS buffer amplifier (10) which buffers a low-amplitude capacitively coupled output of a sensor to subsequent output circuitry. The buffer amplifier (10) includes a buffer stage (12) which includes an input FET (16) whose gate terminal is connected to the output of the sensor. In order to eliminate the gate-to-source, gate-to-drain and gate-to-substrate capacitances of the input FET (16), various FETs are associated with the buffer stage (12) are interconnected such that the integrity of the input signal is maintained. An output FET (18) has its source terminal connected to the source terminal of the input FET (16). Additionally, a tail cascoded current source (20, 22) is connected to the source terminals of the input and output FETs (16, 18) such that the gate-to-source voltages of these two FETs (16, 18) is the same. The gate terminal and the drain terminal of the output FET (18) are connected such that the input and output FETs (16, 18) act as unit to gain amplifier.

Abstract: A crystal oscillator circuit that provides a low distortion clocking signal. The oscillator circuit incorporates an inverter circuit in combination with a diode connected transmission gate circuit. The transmission gate circuit includes two MOSFETs connected between input and output nodes of the inverter circuit. When the current at the input node goes high and the current at the output node goes low, one of the two transmission gate circuit MOSFETs will begin conducting such that current at the input node will be transferred to the output node, thus decreasing the voltage difference between the two nodes. Likewise, when the current at the output node goes high and the current at the input node goes low, the other MOSFET of the transmission gate circuit will begin to conduct such that current is transferred from the output node to the input node, again reducing the voltage difference between the input and output node.

Abstract: A circuit apparatus suitable for use as a basic building block of very small geometry integrated circuits (on the order of 1 micron and smaller) comprising (i) a current mirror circuit with a cascode output, comprising a first transistor and a second transistor connected in series, the first transistor coupled between a ground and the second transistor, and (ii) a single stage gain loop comprising a transresistance amplifier coupled between a control input of the second transistor and the series connection of the first and second transistors, wherein the circuit apparatus provides an output with high impedance output and with maximum swing capability.

Abstract: A voltage to current converter includes three field effect transistors (FETs), the sources of which are electrically connected to define a common source node, and a feedback network. First and second voltage inputs are connected to the gates of the first and second FETs, respectively. First and second current outputs are connected to the drains of the first and second FETs, respectively. The feedback network is connected between the drain of the third FET and the common source node. The feedback network controls and extends linearity by varying the voltage between the common source node and ground in response to changes in the voltage inputs in order to maintain a constant current through the third FET. The floating common source node quickly adjusts and thereby keeps a linear relationship between the input voltages and the output currents. Thus, the feedback network can dynamically bias the converter by permitting the common source node to float with respect to ground.

Abstract: A voltage to current converter, voltage multiplier and mixer circuit. At least two differential output, common source, pairs of matched field effect transistors have cross connected drains. Those transistors which do not have their drains connected together have their gates connected together to form a first pair of voltage input nodes. The two cross connections form output nodes providing differential output currents. A pair of impedance transformation, low output impedance, buffer amplifiers have bipolar transistor output stages and a high input field effect transistor input stage. The outputs of the output stages are each respectively connected to a different one of the common sources of the differential connected pairs. The input nodes of the input stages form a second pair of voltage input nodes.

Abstract: A Stop On Station (SOS) circuit for a AM and FM radio receivers evaluates field strength of a received station signal and in addition measures and evaluates the frequency of the IF signal so as to assure that the received signal is essentially centered at the IF frequency to identify candidate stations signals which are suitable for listening. The IF frequency for a received candidate station signal is evaluated for an evaluation period of time (e.g., for 40 milliseconds). During each 40 millisecond period, fifteen samples of the frequency of the IF signal are counted and evaluated. If the frequency of the measured signal falls within acceptable limits, a four stage binary persistence counter is incriminated. If a count of 12 or more out of the 15 possible counts is accumulated therein during a 40 ms evaluation period, a station signal is considered to be suitable from a standpoint of received frequency and a "frequency pass" signal is generated.

Abstract: An inverting amplifier useful in an oscillator circuit includes complementary serially connected first and second metal-oxide-semiconductor field effort transistor (MOSFETS) and first and second resistors, two capacitors, a first feedback circuit having two MOSFETS in series with a third resistor and a second feedback circuit having two MOSFETS and a fourth resistor in series. Each feedback circuit provides a feed back path from the drain of one of the output transistors to the gate thereof. The resistors are polysilicon type resistors and have a negative thermal coefficient. The amplifier has a very stable output signal amplitude which is essentially independent of integrated circuit manufacturing processing variations and operating temperature variations within useful ranges.

Abstract: A Phase Locked Loop (PLL) circuit includes a control signal generator, a digital phase detector, logic gates, a charge pump (charge/discharge circuit), a transmission gate, a loop filter, a lead-lag filter and a voltage controlled oscillator (VCO). Outputs of the digital phase detector are coupled through the logic gates to inputs of the charge pump. An output of the charge pump is coupled to the capacitor and to a first input/output of the transmission gate. A second input/output of the transmission gate is coupled to an input of the loop filter whose output is coupled to an input of the VCO whose output is coupled to a first input of the digital phase detector. A second input of the digital phase detector is coupled to a source of a reference frequency signal. The control signal generator generates non-overlapping complementary control signals with one of same connected to the logic gates and the other connected to the transmission gate.

Abstract: An FM stereo radio circuit has an ultrasonic noise detector and an amplitude noise detector each for detecting impulse noise by developing an average noise signal and comparing the average noise signal with an attenuated value of the instantaneous noise signal to generate a noise flag. A dual mode circuit normally operates as a low pass filter for a deemphasis function and is switched by the noise flag to operate as a sample and hold circuit which blanks the noise pulse. The dual mode circuit uses a switched capacitance design and is driven by clock signals to serve as a filter. The clock signals are stopped by the noise flag to effect the sample and hold function.