Abstract: An improved wafer based packaging arrangement for integrated circuits is disclosed. In one aspect of the invention, external contacts are formed for the packaged integrated circuits by contact studs formed from bonding wires. One end of each contact studs is ball bonded to an associated wafer bond pad. An elongated portion of each wire (contact stud) extends outward the wafer surface and terminates at a second end that forms an external contact. Filling material surrounds a significant portion of the contact studs to hold the studs in place but leaves at least a portion of the second ends exposed to form external contacts. In some embodiments, the external contacts are substantially coplanar with the surface of the filling material, while in others, a protrusion beyond the filling material surface is left to form a contact bump. The wafers are eventually diced to form discrete packaged integrated circuits having external contacts formed by the contact studs.

Abstract: An integrated circuit (IC) module incorporates a modified lead frame having a die attach platform, a plurality of leads extending away from the die attach platform, and a plurality of bus bars surrounding the die attach platform. Multiple I/O pads on an IC chip mounted on the die attach platform requiring a common power supply voltage or communication signals are connected to a common bus bar, allowing a greater variety of signals to be provided from the fixed number of IC-PCB interconnections on the IC module. The bus bar design is readily incorporated into all IC module packaging techniques using conventional manufacturing processes. An embodiment of a lead frame for a lead frame BGA package also includes circular attachment pads at the ends of all leads in order to provide a circular area for mounting of solder balls to ensure consistent solder flow and uniform final solder ball profile without requiring circular vias.

Abstract: A ball grid array (BGA) package incorporating a heat dissipating member which includes a thin die attach portion mounted between an integrated circuit chip (die) and a package substrate, a heat sink portion surrounding the die attach portion, and tie bars connected between the die attach portion and the heat sink portion. The die attach portion is thinner than the heat sink portion such that a recessed area is formed for receiving an integrated circuit die. Heat generated by a die mounted on the die attach portion is transmitted to the heat sink portion along the tie bars, thereby providing enhanced thermal characteristics. Inductive effects on signals passing between the integrated circuit die and a host printed circuit board are reduced by connecting the heat dissipating member to a ground potential. A Faraday cage is formed around the integrated circuit die by mounting a metal plate on the upper peripheral surface of the heat sink portion.

Abstract: A molded plastic package incorporates a lead frame which includes a plurality of leads radially aligned around a central opening. A die is mounted in the central opening and is electrically connected to the leads by wire bonding. A molded plastic casing is formed over the die, wiring and lead frame to encapsulate the package. The lower surfaces of the die and lead frame are exposed through the package. A method for making the molded plastic package includes mounting the die and lead frame onto an adhesive tape, electrically connecting the die to the leads by wire bonding, forming a molded plastic casing over the die, wire bonding and lead frame, and then removing the adhesive tape to expose the lower surfaces of the die and the lead frame.

Abstract: Stackable ball grid array packages are disclosed, wherein a plurality of separate ball grid array packages may be stacked, one on top of another, and interconnected by conductive terminals located on opposite surfaces of each of the ball grid array packages. Thus, the mounting of ball grid array packages on a printed circuit board may be conducted in three dimensions rather than two dimensions, requiring considerably less printed circuit board surface area and reducing parasitic inductances and capacitances between the terminals of the stacked ball grid array packages. An air gap is formed between adjacent, stacked packages for cooling. Connections between adjacent packages are made by conductive epoxy and noble metal balls.

Abstract: An integrated circuit package assembly with a first die disposed over a first substrate having traces defined therein to provide electrical access to the first die. A heatsink is disposed over the substrate and the first die. A second die and a leadframe is disposed over the heatsink. The leadframe provides electrical access to the second die.

Abstract: A Thermal Ball Lead Integrated Package (Thermal BLIP) having improved thermal performance over prior art BLIPs is described. The BLIP combines ball and lead technologies to increase the interconnect density of the package but has relatively poor heat extraction capabilities. The Thermal BLIP is particularly well suited for high power and pin count integrated circuit devices. In an embodiment of the present invention, a heat sink is attached to the top surface of the die and extends through the package molding such that it is exposed to the ambient environment. Since the heat sink is integrated into the molding, the package size and footprint is not increased thereby limiting the cost increase of the package. This arrangement enables the use of high power devices in dense circuit board applications.

Abstract: A ball grid array (BGA) package incorporates a lead frame which includes a die attach pad and a plurality of leads radiating away from the die attach pad. A die is mounted on the die attach pad and electrically connected to the leads by wire bonding. A non-conductive solder mask or tape is applied to the lead frame which defines a number of selectively positioned vias (openings). A molded plastic casing or a cap is positioned over the die, wiring and lead frame to encapsulate the package. Solder balls or columns are attached to selected leads of the lead frame through the vias.

Abstract: A semiconductor component package assembly including an integral radio frequency and electromagnetic interference shield is disclosed herein. The assembly includes a support member which supports an IC chip and defines an array of conductive leads. An electrically conductive shield is positioned relative to the IC chip so as to form an integral RF/EMI barrier between the IC chip and the ambient surroundings of the overall assembly. In a preferred embodiment, the shield is formed from different layers of material and configured for electrical connection of at least one conductive layer to certain ones of the leads which may include one or more ground leads.

Abstract: An integrated circuit assembly includes a dielectric flex tape substrate defining a predetermined array of electrically conductive traces and an array of solder balls or solder columns electrically connected to the bottom surface of the flex tape substrate and the traces. An integrated circuit die having a series of input/output pads is supported on the substrate. In one embodiment, a plurality of electrically conductive leads are supported by the flex tape substrate in electrical isolation from and over the conductive traces. A first and second series of bonding wires electrically connect certain ones of the input/output terminals on the integrated circuit die to the electrically conductive leads and conductive traces, respectively. In other embodiments, one or more electrically isolated conductive layers are supported by the dielectric flex tape substrate over the traces and electrically conductive leads.

Abstract: A ball grid array (BGA) package incorporating a heat sink member which includes a first portion mounted between an integrated circuit chip (die) and a package substrate, a second portion exposed on a surface of a molded plastic cover formed over the die and package substrate, and thermal conductors connected between the first portion and the second portion. Heat generated by the die is transmitted by the thermal conductors from the first portion to the second portion, and is dissipated outside of the BGA package.

Abstract: An integrated circuit assembly is disclosed herein. The assembly includes a dielectric substrate defining a predetermined array of electrically conductive traces and an array of solder balls electrically connected to the traces. An integrated circuit chip having a series of input/output pads is supported on the substrate. In one embodiment, a plurality of leadframe leads are supported by the substrate in electrical isolation from and over the conductive traces. First and second series of bonding wires electrically connect certain ones of the input/output pads on the IC chip to the leadframe leads and conductive traces. In other embodiments, one or more electrically isolated conductive layers are supported by the dielectric substrate over the traces and leadframe leads. The integrated circuit assembly, in accordance with any of these embodiments, provides a very high density electrical interconnection arrangement for the IC chip while retaining a small package footprint.

Abstract: A lead frame having layered conductive planes is disclosed for use in semiconductor devices. The lead frame includes a plurality of long leads each having a lead tip and a plurality of short leads. Electrically conductive layers are attached to the long leads around such that they don't cover the tips of the long leads and are radially inward of the short leads. The conductive layers are insulated from the long lead and each other by adhesive insulating layers. In a preferred embodiment, the top conductive layer has a smaller width than the bottom conducting layer and is positioned to expose an inner and outer ledge on the bottom conducting layer. The exposed outer ledge allows bonding to the shorter leads. The use of shorter leads decreases the amount of inductance in the leads. The conductive layers also may act as capacitors. In one embodiment of the present application the short leads may correspond to ground and/or power leads.

Abstract: An integrated circuit assembly is disclosed herein. The assembly includes a dielectric substrate defining a predetermined array of electrically conductive traces and an array of solder balls electrically connected to the traces. An integrated circuit chip having a series of input/output pads is supported on the substrate. In one embodiment, a plurality of leadframe leads are supported by the substrate in electrical isolation from and over the conductive traces. First and second series of bonding wires electrically connect certain ones of the input/output pads on the IC chip to the leadframe leads and conductive traces. In other embodiments, one or more electrically isolated conductive layers are supported by the dielectric substrate over the traces and leadframe leads. The integrated circuit assembly, in accordance with any of these embodiments, provides a very high density electrical interconnection arrangement for the IC chip while retaining a small package footprint.

Abstract: An integrated circuit package is disclosed herein including one or more dies, each of which has an array of input/output bond pads, a leadframe which includes an array of electrically conductive leads, and an array of bonding wires, each of which extends along its length between and is connected at its opposite ends to a respective die bond pad and a corresponding lead on the leadframe or a corresponding die bond pad on another die. There is also disclosed a technique for using a bridge arrangement to prevent the bonding wires from contacting the die or dies along the length of each of the wires. In fabricating the package just described, the bridge arrangement is provided as part of either the leadframe or part of a heater block which is a component of the equipment that may be used in manufacturing the integrated circuit package.

Abstract: A single point bonding tool which self aligns misaligned leads. The top of the tool is indented in a manner which, when in contact with a misaligned lead, guides the lead into alignment.