Patents by Inventor Shailendra Kumar

Shailendra Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220069316
    Abstract: The present invention relates to the redox buffer electro-catalyst for bi-functional air electrode of metal-air batteries and fuel cells, wherein an electro-catalyst comprising of redox buffer oxides facilitates bi-functional activity of air electrode towards oxygen reduction and oxygen evolution reactions at the air electrode-electrolyte interface. The bi-functional activity of electro-catalyst comprising of redox buffer oxides is superior, due to improved electron transfer ability in comparison to electro-catalyst without redox buffer oxides.
    Type: Application
    Filed: September 2, 2021
    Publication date: March 3, 2022
    Inventors: Narayanam SESHUBABU, Vakakuzhiyil Gopinathan ANJU, Naduhatty Selai RAMAN, Shailendra Kumar SHARMA, Sankara Sri Venkata RAMAKUMAR
  • Publication number: 20210324279
    Abstract: The invention relates to a process configuration for production of light olefins and aromatics from residual hydrocarbon streams. In this configuration a high severity catalytic cracking process is employed for producing higher yields of lighter olefins and various boiling fractions. C4 stream separated from gaseous product is subjected to metathesis and aromatized to form mono aromatics.
    Type: Application
    Filed: April 21, 2021
    Publication date: October 21, 2021
    Inventors: Srinivas KUNCHE BABU, Bhushan BHARAT, Vetterkunnel Kumaran SATHEESH, Debasis BHATTACHARYYA, Shailendra Kumar SHARMA, Sankara Sri Venkata RAMAKUMAR
  • Publication number: 20210306236
    Abstract: The method for triage management includes obtaining, from multiple sources, activity logs including issues for triage; processing the activity logs using a decision tree configured to output category and priority score associated with each issue; and, for each issue, identifying the relevant resources to resolve the issue based on the category of the issue, the priority score, and attributes of the relevant resources including historical issue resolution data. The method also includes determining a triage activity based on availability of the relevant resources, categories of the issues, and the priority scores. The triage activity includes a sequence for resolving the issues. The method also includes scheduling call for a predetermined time duration based on the availability and the attributes of the relevant resources; and generating a report for the triage activity, including real time information related to the obtained activity logs, the sources, and the sequence of the issues.
    Type: Application
    Filed: March 23, 2021
    Publication date: September 30, 2021
    Applicant: HCL TECHNOLOGIES LIMITED
    Inventors: Prathameshwar Pratap SINGH, Shailendra Kumar ROHILLA, Yogesh GUPTA, Shiva Kumar SHOLAYAPPAN
  • Publication number: 20210184663
    Abstract: A device includes a first ramp generator having a first ramp generator output configured to provide a first ramp, a second ramp generator having a second ramp generator output configured to provide a second ramp, and a third ramp generator having a third ramp generator output configured to provide a third ramp. The first ramp is a sawtooth voltage waveform having a first common mode voltage and a first peak-to-peak voltage. The second ramp is a sawtooth voltage waveform having a second common mode voltage and a second peak-to-peak voltage. The third ramp is a sawtooth voltage waveform having a third common mode voltage and a third peak-to-peak voltage. A frequency of the second ramp is approximately equal to a frequency of the third ramp, and the frequency of the third ramp is approximately double a frequency of the first ramp.
    Type: Application
    Filed: December 11, 2020
    Publication date: June 17, 2021
    Inventors: Yinglai XIA, Shailendra Kumar BARANWAL, Yogesh Kumar RAMADASS, Junmin JIANG
  • Patent number: 10965279
    Abstract: A multi-level ramp generator comprises three ramp generators. The first ramp generator generates a first ramp signal, comprising a sawtooth voltage waveform with a first common mode voltage and a first peak to peak voltage. The second ramp generator generates a second ramp signal, comprising a sawtooth voltage waveform with a second common mode voltage and a second peak-to-peak voltage. The third ramp generator generates a third ramp signal, comprising a sawtooth voltage waveform with a third common mode voltage and the second peak-to-peak voltage. The second and third ramp signals are in phase with each other and the first ramp signal is 180° out of phase with the second and third ramp signals. In some implementations, each of the first, second, and third ramp generators comprise a respective delay locked loop and a respective voltage controlled oscillator.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: March 30, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yogesh Kumar Ramadass, Bhushan Talele, Shailendra Kumar Baranwal, Yinglai Xia, Junmin Jiang
  • Patent number: 10886881
    Abstract: An amplifier comprises eight transistors: the first coupled to a linked node and to a positive output node, the second coupled to the linked node and to a negative output node, the third coupled to the positive output node and a common potential, the fourth coupled to the negative output node and the common potential, the fifth coupled to a battery node, the sixth coupled to the fifth transistor and to the positive output node, the seventh coupled to the battery node, and the eighth coupled to the seventh transistor and to the negative output node. The amplifier also includes a charge pump to convert the battery voltage to an increased voltage on the linked node. The charge pump includes capacitors and operates at a lower frequency in lower power mode and a higher frequency in higher power mode to increase power provided to the linked node.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: January 5, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yinglai Xia, Shailendra Kumar Baranwal, Junmin Jiang, Yogesh Kumar Ramadass
  • Publication number: 20200304080
    Abstract: An amplifier comprises eight transistors: the first coupled to a linked node and to a positive output node, the second coupled to the linked node and to a negative output node, the third coupled to the positive output node and a common potential, the fourth coupled to the negative output node and the common potential, the fifth coupled to a battery node, the sixth coupled to the fifth transistor and to the positive output node, the seventh coupled to the battery node, and the eighth coupled to the seventh transistor and to the negative output node. The amplifier also includes a charge pump to convert the battery voltage to an increased voltage on the linked node. The charge pump includes capacitors and operates at a lower frequency in lower power mode and a higher frequency in higher power mode to increase power provided to the linked node.
    Type: Application
    Filed: March 21, 2019
    Publication date: September 24, 2020
    Inventors: Yinglai XIA, Shailendra Kumar BARANWAL, Junmin JIANG, Yogesh Kumar RAMADASS
  • Publication number: 20200304111
    Abstract: A multi-level ramp generator comprises three ramp generators. The first ramp generator generates a first ramp signal, comprising a sawtooth voltage waveform with a first common mode voltage and a first peak to peak voltage. The second ramp generator generates a second ramp signal, comprising a sawtooth voltage waveform with a second common mode voltage and a second peak-to-peak voltage. The third ramp generator generates a third ramp signal, comprising a sawtooth voltage waveform with a third common mode voltage and the second peak-to-peak voltage. The second and third ramp signals are in phase with each other and the first ramp signal is 180° out of phase with the second and third ramp signals. In some implementations, each of the first, second, and third ramp generators comprise a respective delay locked loop and a respective voltage controlled oscillator.
    Type: Application
    Filed: March 21, 2019
    Publication date: September 24, 2020
    Inventors: Yogesh Kumar RAMADASS, Bhushan TALELE, Shailendra Kumar BARANWAL, Yinglai XIA, Junmin JIANG
  • Publication number: 20200287473
    Abstract: In described examples, an isolated DC-DC converter includes: an input node for receiving an input voltage; a transformer including a primary side having first and second terminals and a primary side ground; and first and second low-side switches. The first low-side switch is coupled between the first terminal and the primary side ground. The second low-side switch is coupled between the second terminal and the primary side ground. A first voltage is across the first low-side switch, and a second voltage is across the second low-side switch. Also, the isolated DC-DC converter includes first and second high-side switches. The first high-side switch is coupled between the first terminal and the input node. The second high-side switch is coupled between the second terminal and the input node. Further, the isolated DC-DC converter includes a switch controller.
    Type: Application
    Filed: March 18, 2020
    Publication date: September 10, 2020
    Inventors: Maurizio Granato, Giovanni Frattini, Shailendra Kumar Baranwal
  • Publication number: 20200285225
    Abstract: An apparatus, method, and non-transitory machine-readable medium provide for 360° assistance for a QCS scanner with mixed reality (MR) and machine learning technology. The apparatus includes an optical sensor, a display, a Chatbot, cloud service, and a processor operably connected to the optical sensor and the display. The processor receives diagnostic information from a server related to a field device in an industrial process control and automation system; identifies an issue of the field device based on the diagnostic information; detects, using the optical sensor, the field device corresponding to the identified issue; guides, using the display, a user to a location and a scanner part of the field device that is related to the issue; provides, using the display, necessary steps or actions to resolve the issue; and connects, using a cloud server, a user to get modules of installation, commissioning, annual maintenance (AMC) and training for a quality control system (QCS) as per the selected persona.
    Type: Application
    Filed: March 8, 2019
    Publication date: September 10, 2020
    Inventors: Pavan Tumkur Lankehanumaiah, Shailendra Kumar Gupta, Senthilkumar Jayaraman, Ajay Kumar
  • Patent number: 10743851
    Abstract: A surgical tool for use with a surgical instrument including a handle assembly and an elongated body defining a longitudinal axis and a drive system is disclosed. The surgical tool comprises a carrier removably couplable to the elongated body, an anvil movably supported for selective movement relative to the carrier in response to drive motions from the drive system, a tissue thickness measuring member movably supported in the carrier and configured to move toward and away from an underside of the anvil in a direction that is transverse to the longitudinal axis, and a sensor arrangement supported between the tissue thickness measuring member and the carrier. The sensor arrangement is configured to interface with an indicator member to provide an indication of a thickness of tissue clamped between the anvil and the tissue thickness measuring member at a location that is proximal to the anvil when in use.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: August 18, 2020
    Assignee: Ethicon LLC
    Inventors: Jeffrey S. Swayze, Thomas W. Huitema, Glen A. Armstrong, Shailendra Kumar Parihar, Donna L. Korvick, Richard W. Timm, Frederick E. Shelton, IV, Kevin R. Doll, Bret W. Smith, William D. Kelly, Ronald J. Kolata, Joshua R. Uth, Charles J. Scheib, Eugene L. Timperman
  • Publication number: 20200212809
    Abstract: A power converter includes a first switch with a first transistor having a first blocking voltage in parallel with a second transistor having a second blocking voltage that is higher than the first blocking voltage. The power converter also includes a second switch. The power converter also includes a controller coupled to the first and second switches and configured to provide switch control signals. The power converter also includes a sequencer coupled to the first and second transistors and configured to generate offset transition signals for the first and second transistors based on a switch control signal provided by the controller.
    Type: Application
    Filed: December 27, 2018
    Publication date: July 2, 2020
    Inventors: Shailendra Kumar BARANWAL, Jeffrey MORRONI
  • Patent number: 10622908
    Abstract: In described examples, an isolated DC-DC converter includes an input node for receiving an input voltage, and a transformer including a primary side having first and second terminals and a ground. First and second high-side switches are coupled between the input node and the first and second terminals, respectively. A first low-side switch is coupled between the first terminal and the ground, and through a first voltage limiter to be activated by a voltage at the second terminal. A second low-side switch is coupled between the second terminal and the ground, and through a second voltage limiter to be activated by a voltage at the first terminal. A switch controller controls the high-side switches so that voltages across the high-side switches are alternatingly zero, using a current through the primary side to alternatingly charge one terminal to an input voltage and discharge the other terminal to a ground voltage.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: April 14, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Maurizio Granato, Giavanni Frattini, Shailendra Kumar Baranwal
  • Patent number: 10601332
    Abstract: In described examples, an isolated DC-DC converter includes: an input node for receiving an input voltage; a transformer including first and second terminals; first and second low-side switches; and first and second high-side switches. The first low-side switch is coupled between the first terminal and a primary side ground. The second low-side switch is coupled between the second terminal and the primary side ground. The first high-side switch is coupled between the first terminal and the input node and is configured to be activated by a voltage at the second terminal. The second high-side switch is coupled between the second terminal and the input node and is configured to be activated by a voltage at the first terminal. Further, the isolated DC-DC converter includes a switch controller to cause the first and second voltages to alternatingly be zero by opening and closing the first and second low-side switches.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: March 24, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Maurizio Granato, Giovanni Frattini, Shailendra Kumar Baranwal
  • Patent number: 10439482
    Abstract: In an embodiment, an adaptive drive strength switching converter includes a driver and a control loop coupled to the driver. In an embodiment, the control loop includes a peak detector, a comparator coupled to an output of the peak detector, a counter coupled to an output of the comparator, and a digital-to-analog converter (DAC) coupled to an output of the comparator.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: October 8, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shailendra Kumar Baranwal, William Todd Harrison, Yogesh Kumar Ramadass
  • Publication number: 20190146543
    Abstract: A bandgap voltage reference is provided in quasi-parallel with a resistor in the input path of a digital input circuit. Because of the quasi-parallel nature, the current used by the digital input circuit is limited to an amount based on the value of the external resistor. The input current is split between circuitry used to provide the logic signal across the selected isolation barrier and a sink transistor so that the current remains constant. This allows the digital input circuit to accurately limit input current without needing field-side power.
    Type: Application
    Filed: June 4, 2018
    Publication date: May 16, 2019
    Inventors: Shailendra Kumar BARANWAL, Anant Shankar KAMATH
  • Patent number: 10281946
    Abstract: A bandgap voltage reference is provided in quasi-parallel with a resistor in the input path of a digital input circuit. Because of the quasi-parallel nature, the current used by the digital input circuit is limited to an amount based on the value of the external resistor. The input current is split between circuitry used to provide the logic signal across the selected isolation barrier and a sink transistor so that the current remains constant. This allows the digital input circuit to accurately limit input current without needing field-side power.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: May 7, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shailendra Kumar Baranwal, Anant Shankar Kamath
  • Publication number: 20190097517
    Abstract: In an embodiment, an adaptive drive strength switching converter includes a driver and a control loop coupled to the driver. In an embodiment, the control loop includes a peak detector, a comparator coupled to an output of the peak detector, a counter coupled to an output of the comparator, and a digital-to-analog converter (DAC) coupled to an output of the comparator.
    Type: Application
    Filed: September 22, 2017
    Publication date: March 28, 2019
    Inventors: Shailendra Kumar BARANWAL, William Todd HARRISON, Yogesh Kumar RAMADASS
  • Publication number: 20190089261
    Abstract: In described examples, an isolated DC-DC converter includes: an input node for receiving an input voltage; a transformer including a primary side having first and second terminals and a primary side ground; and first and second low-side switches. The first low-side switch is coupled between the first terminal and the primary side ground. The second low-side switch is coupled between the second terminal and the primary side ground. A first voltage is across the first low-side switch, and a second voltage is across the second low-side switch. Also, the isolated DC-DC converter includes first and second high-side switches. The first high-side switch is coupled between the first terminal and the input node and is configured to be activated by a voltage at the second terminal. The second high-side switch is coupled between the second terminal and the input node and is configured to be activated by a voltage at the first terminal.
    Type: Application
    Filed: December 29, 2017
    Publication date: March 21, 2019
    Inventors: Maurizio Granato, Giavanni Frattini, Shailendra Kumar Baranwal
  • Publication number: 20190089263
    Abstract: In described examples, an isolated DC-DC converter includes an input node for receiving an input voltage, and a transformer including a primary side having first and second terminals and a ground. First and second high-side switches are coupled between the input node and the first and second terminals, respectively. A first low-side switch is coupled between the first terminal and the ground, and through a first voltage limiter to be activated by a voltage at the second terminal. A second low-side switch is coupled between the second terminal and the ground, and through a second voltage limiter to be activated by a voltage at the first terminal A switch controller controls the high-side switches so that voltages across the high-side switches are alternatingly zero, using a current through the primary side to alternatingly charge one terminal to an input voltage and discharge the other terminal to a ground voltage.
    Type: Application
    Filed: December 29, 2017
    Publication date: March 21, 2019
    Inventors: Maurizio Granato, Giavanni Frattini, Shailendra Kumar Baranwal