Patents by Inventor Shailendra Srinivas

Shailendra Srinivas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040195593
    Abstract: Methods and apparatuses prevent overtunneling in nonvolatile floating gate memory (NVM) cells. An individual cell includes a circuit with a transistor that has a floating gate that stores charge, and a capacitor structure for extracting charge from the gate, such as by tunneling. A counteracting circuit prevents extracting charge from the floating gate beyond a threshold, therefore preventing overtunneling or correcting for it. In one embodiment, the counteracting circuit supplies electrons to the floating gate, to compensate for tunneling beyond a point. In another embodiment, the counteracting circuit includes a switch, and a sensor to trigger the switch when the appropriate threshold is reached. The switch may be arranged in any number of suitable ways, such as to prevent a high voltage from being applied to the capacitor structure, or to prevent a power supply from being applied to a terminal of the transistor or to a well of the transistor.
    Type: Application
    Filed: April 21, 2004
    Publication date: October 7, 2004
    Applicant: Impinj, Inc., a Delaware Corporation
    Inventors: Christopher J. Diorio, Chad A. Lindhorst, Shailendra Srinivas, Alberto Pesavento, Troy N. Gilliland