Patents by Inventor Shailendra Srivastava
Shailendra Srivastava has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210003340Abstract: The present disclosure relates to a fluid delivery apparatus for deposition chambers. The fluid delivery device includes a fluid flow meter. The fluid flow meter is enclosed in an insulated box. An intake is provided on the insulated box for providing a forced cooling gas flow over the fluid flow meter. An exhaust is provided on the insulated box from which the forced cooling gas exits the insulated box.Type: ApplicationFiled: March 14, 2019Publication date: January 7, 2021Inventors: Shailendra SRIVASTAVA, Seyed ALAM, Nikhil Sudhindrarao JORAPUR, Daemian Raj BENJAMIN RAJ, Juan Carlos ROCHA-ALVAREZ
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Publication number: 20200385862Abstract: A faceplate for a substrate process chamber comprises a first and second surface. The second surface is shaped such that the second surface includes a peak and a distance between the first and second surface varies across the width of the faceplate. The second surface of the faceplate is exposed to a processing volume of the process chamber. Further, the faceplate may be part of a lid assembly for the process chamber. The lid assembly may include a blocker plate facing the first surface of the faceplate. A distance between the blocker plate and the first surface is constant.Type: ApplicationFiled: June 5, 2020Publication date: December 10, 2020Inventors: Shailendra SRIVASTAVA, Sai Susmita ADDEPALLI, Nikhil Sudhindrarao JORAPUR, Daemian Raj BENJAMIN RAJ, Amit Kumar BANSAL, Juan Carlos ROCHA-ALVAREZ, Gregory Eugene CHICHKANOFF, Xinhai HAN, Masaki OGATA, Kristopher ENSLOW, Wenjiao WANG
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Publication number: 20200365386Abstract: In one example, a process chamber comprises a lid assembly, a first gas supply, second gas supply, a chamber body, and a substrate support. The lid assembly comprises a gas box, a gas conduit passing through the gas box, a blocker plate, and a showerhead. The gas box comprises a gas distribution plenum, and a distribution plate comprising a plurality of holes aligned with the gas distribution plenum. The blocker plate is coupled to the gas box forming a first plenum. The showerhead is coupled to the blocker plate forming a second plenum. The first gas supply is coupled to the gas distribution plenum, and the second gas supply system is coupled to the gas conduit. The chamber body is coupled to the showerhead, and the substrate support assembly is disposed within an interior volume of the chamber body, and is configured to support a substrate during processing.Type: ApplicationFiled: April 9, 2020Publication date: November 19, 2020Inventors: Daemian Raj BENJAMIN RAJ, Gregory Eugene CHICHKANOFF, Shailendra SRIVASTAVA, Sai Susmita ADDEPALLI, Nikhil Sudhindrarao JORAPUR, Abhigyan KESHRI, Allison YAU
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Publication number: 20200251311Abstract: Implementations disclosed herein generally relate to systems and methods of protecting a substrate support in a process chamber from cleaning fluid during a cleaning process. The method of cleaning the process chamber includes positioning in the process chamber a cover substrate above a substrate support and a process kit that separates a purge volume from a process volume. The method of cleaning includes flowing a purge gas in the purge volume to protect the substrate support and flowing a cleaning fluid to a process volume above the cover substrate, flowing the cleaning fluid in the process volume to an outer flow path, and to an exhaust outlet in the chamber body. The purge volume is maintained at a positive pressure with respect to the process volume to block the cleaning fluid from the purge volume.Type: ApplicationFiled: April 22, 2020Publication date: August 6, 2020Inventors: Kalyanjit GHOSH, Shailendra SRIVASTAVA, Tejas ULAVI, Yusheng ZHOU, Amit Kumar BANSAL, Sanjeev BALUJA
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Patent number: 10734237Abstract: Methods and apparatus for subtractively fabricating three-dimensional structures relative to a surface of a substrate and for additively depositing metal and dopant atoms onto the surface and for diffusing them into the bulk. A chemical solution is applied to the surface of the semiconductor substrate, and a spatial pattern of electron-hole pairs is generated by projecting a spatial pattern of illumination characterized by a specified intensity, wavelength and duration at each pixel of a plurality of pixels on the surface. Charge carriers are driven away from the surface of the semiconductor on a timescale short compared to the carrier recombination lifetime. Such methods are applied to creating a spatially varying doping profile in the semiconductor substrate, a photonic integrated circuit and an integrated photonic microfluidic circuit.Type: GrantFiled: May 22, 2018Date of Patent: August 4, 2020Assignee: The Board of Trustees of the University of IllinoisInventors: Lynford Goddard, Kaiyuan Wang, Chris Edwards, Lonna Edwards, Xin Yu, Gang Logan Liu, Samuel Washington, Shailendra Srivastava, Terry Koker, Julianne Lee, Catherine Britt Carlson
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Publication number: 20200173022Abstract: Embodiments of the disclosure describe an apparatus and a method for depositing a film layer that may have minimum contribution to overlay error after a sequence of deposition and lithographic exposure processes. In one example, a method includes positioning a substrate on a substrate support in a process chamber, and flowing a deposition gas mixture comprising a silicon containing gas and a reacting gas to the process chamber through a showerhead having a convex surface facing the substrate support or a concave surface facing the substrate support in accordance with a stress profile of the substrate. A plasma is formed in the presence of the deposition gas mixture in the process chamber by applying an RF power to multiple coupling points of the showerhead that are symmetrically arranged about a center point of the showerhead. A deposition process is then performed on the substrate.Type: ApplicationFiled: November 8, 2019Publication date: June 4, 2020Inventors: Xinhai HAN, Deenesh PADHI, Daemian Raj BENJAMIN RAJ, Kristopher ENSLOW, Wenjiao WANG, Masaki OGATA, Sai Susmita ADDEPALLI, Nikhil Sudhindrarao JORAPUR, Gregory Eugene CHICHKANOFF, Shailendra SRIVASTAVA, Jonghoon BAEK, Zakaria IBRAHIMI, Juan Carlos ROCHA-ALVAREZ, Tza-Jing GUNG
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Patent number: 10636628Abstract: Implementations disclosed herein generally relate to systems and methods of protecting a substrate support in a process chamber from cleaning fluid during a cleaning process. The method of cleaning the process chamber includes positioning in the process chamber a cover substrate above a substrate support and a process kit that separates a purge volume from a process volume. The method of cleaning includes flowing a purge gas in the purge volume to protect the substrate support and flowing a cleaning fluid to a process volume above the cover substrate, flowing the cleaning fluid in the process volume to an outer flow path, and to an exhaust outlet in the chamber body. The purge volume is maintained at a positive pressure with respect to the process volume to block the cleaning fluid from the purge volume.Type: GrantFiled: September 11, 2017Date of Patent: April 28, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Kalyanjit Ghosh, Shailendra Srivastava, Tejas Ulavi, Yusheng Zhou, Amit Kumar Bansal, Sanjeev Baluja
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Patent number: 10600624Abstract: Systems and methods for depositing a film in a PECVD chamber while reducing residue buildup in the chamber. In some embodiments disclosed herein, a processing chamber includes a chamber body, a substrate support, a showerhead, and one or more heaters configured to heat the showerhead. In some embodiments, the processing chamber includes a controller.Type: GrantFiled: December 21, 2018Date of Patent: March 24, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Kalyanjit Ghosh, Sanjeev Baluja, Mayur G. Kulkarni, Shailendra Srivastava, Tejas Ulavi, Yusheng Alvin Zhou, Amit Kumar Bansal, Priyanka Dash, Zhijun Jiang, Ganesh Balasubramanian, Qiang Ma, Kaushik Alayavalli, Yuxing Zhang, Daniel Hwung, Shawyon Jafari
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Publication number: 20190382889Abstract: Implementations of the present disclosure generally provide improved methods for cleaning a vacuum chamber to remove adsorbed contaminants therefrom prior to a chamber seasoning process while maintaining the chamber at desired deposition processing temperatures. The contaminants may be formed from the reaction of cleaning gases with the chamber components and the walls of the vacuum chamber.Type: ApplicationFiled: May 24, 2019Publication date: December 19, 2019Inventors: Venkata Sharat Chandra PARIMI, Zhijun JIANG, Ganesh BALASUBRAMANIAN, Vivek Bharat SHAH, Shailendra SRIVASTAVA, Amit Kumar BANSAL, Xinhai HAN, Vinay K. PRABHAKAR
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Publication number: 20190338420Abstract: Embodiments described herein relate to a pressure skew system for controlling the center-to-edge pressure change in a chamber for depositing an advanced patterning film with improved overall uniformity. The pressure skew system includes pumping zones configured to be formed in a chamber, walls disposed in the pumping region. The chamber includes a processing region, a pumping region, and a pumping path connected to a pump to exhaust process gases from the pumping region. Each pumping zone corresponds to a space of the pumping region flanked by the walls. Supply conduits are connected to a corresponding pumping zone and a corresponding mass flow control device to control a flow rate of inert gas provided to the corresponding pumping zone to control a pressure in an area of the processing region.Type: ApplicationFiled: April 4, 2019Publication date: November 7, 2019Inventor: Shailendra SRIVASTAVA
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Publication number: 20190122872Abstract: Systems and methods for depositing a film in a PECVD chamber while reducing residue buildup in the chamber. In some embodiments disclosed herein, a processing chamber includes a chamber body, a substrate support, a showerhead, and one or more heaters configured to heat the showerhead. In some embodiments, the processing chamber includes a controller.Type: ApplicationFiled: December 21, 2018Publication date: April 25, 2019Inventors: Kalyanjit GHOSH, Sanjeev BALUJA, Mayur G. KULKARNI, Shailendra SRIVASTAVA, Tejas ULAVI, Yusheng ALVIN ZHOU, Amit Kumar BANSAL, Priyanka DASH, Zhijun JIANG, Ganesh BALASUBRAMANIAN, Qiang MA, Kaushik ALAYAVALLI, Yuxing ZHANG, Daniel HWUNG, Shawyon JAFARI
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Publication number: 20190080889Abstract: Implementations disclosed herein generally relate to systems and methods of protecting a substrate support in a process chamber from cleaning fluid during a cleaning process. The method of cleaning the process chamber includes positioning in the process chamber a cover substrate above a substrate support and a process kit that separates a purge volume from a process volume. The method of cleaning includes flowing a purge gas in the purge volume to protect the substrate support and flowing a cleaning fluid to a process volume above the cover substrate, flowing the cleaning fluid in the process volume to an outer flow path, and to an exhaust outlet in the chamber body. The purge volume is maintained at a positive pressure with respect to the process volume to block the cleaning fluid from the purge volume.Type: ApplicationFiled: September 11, 2017Publication date: March 14, 2019Inventors: Kalyanjit GHOSH, Shailendra SRIVASTAVA, Tejas ULAVI, Yusheng ZHOU, Amit Kumar BANSAL, Sanjeev BALUJA
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Publication number: 20180301344Abstract: Methods and apparatus for subtractively fabricating three-dimensional structures relative to a surface of a substrate and for additively depositing metal and dopant atoms onto the surface and for diffusing them into the bulk. A chemical solution is applied to the surface of the semiconductor substrate, and a spatial pattern of electron-hole pairs is generated by projecting a spatial pattern of illumination characterized by a specified intensity, wavelength and duration at each pixel of a plurality of pixels on the surface. Charge carriers are driven away from the surface of the semiconductor on a timescale short compared to the carrier recombination lifetime. Such methods are applied to creating a spatially varying doping profile in the semiconductor substrate, a photonic integrated circuit and an integrated photonic microfluidic circuit.Type: ApplicationFiled: May 22, 2018Publication date: October 18, 2018Inventors: Lynford Goddard, Kaiyuan Wang, Chris Edwards, Lonna Edwards, Xin Yu, Gang Logan Liu, Samuel Washington, Shailendra Srivastava, Terry Koker, Julianne Lee, Catherine Britt Carlson
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Publication number: 20160118265Abstract: Methods and apparatus for subtractively fabricating three-dimensional structures relative to a surface of a substrate and for additively depositing metal and dopant atoms onto the surface and for diffusing them into the bulk. A chemical solution is applied to the surface of the semiconductor substrate, and a spatial pattern of electron-hole pairs is generated by projecting a spatial pattern of illumination characterized by a specified intensity, wavelength and duration at each pixel of a plurality of pixels on the surface. An electrical potential is applied across the interface of the semiconductor and the solution with a specified temporal profile relative to the temporal profile of the spatial pattern of illumination. Such methods are applied to the fabrication of a photodetector integral with a parabolic reflector, cell size sorting chips, a three-dimensional photonic bandgap chip, a photonic integrated circuit, and an integrated photonic microfluidic circuit.Type: ApplicationFiled: January 6, 2016Publication date: April 28, 2016Inventors: Lynford Goddard, Kaiyuan Wang, Chris Edwards, Lonna Edwards, Xin Yu, Gang Logan Liu, Samuel Washington, Shailendra Srivastava, Terry Koker, Julianne Lee, Catherine Britt Carlson
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Patent number: 9148941Abstract: A first temperature distribution that represents a temperature of an element adjacent to and distinct from a first optical element that is positioned to receive an amplified light beam is accessed. The accessed first temperature distribution is analyzed to determine a temperature metric associated with the element, the determined temperature metric is compared to a baseline temperature metric, and an adjustment to position of the amplified light beam relative to the first optical element is determined based on the comparison.Type: GrantFiled: January 22, 2013Date of Patent: September 29, 2015Assignee: ASML Netherlands B.V.Inventors: Vladimir Fleurov, Igor Fomenkov, Shailendra Srivastava
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Publication number: 20140203195Abstract: A first temperature distribution that represents a temperature of an element adjacent to and distinct from a first optical element that is positioned to receive an amplified light beam is accessed. The accessed first temperature distribution is analyzed to determine a temperature metric associated with the element, the determined temperature metric is compared to a baseline temperature metric, and an adjustment to position of the amplified light beam relative to the first optical element is determined based on the comparison.Type: ApplicationFiled: January 22, 2013Publication date: July 24, 2014Applicant: Cymer, Inc.Inventors: Vladimir Fleurov, Igor Fomenkov, Shailendra Srivastava