Patents by Inventor Shan Huang

Shan Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11609889
    Abstract: Selecting tables for compression by threshold statistical values. Identified tables are reordered according to fields having the lowest cardinality to increase the size of character strings replaced by keys during compression. Field locations are mapped between the original table and the reordered table. Dictionary-based compression is performed on reordered tables.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: March 21, 2023
    Assignee: International Business Machines Corporation
    Inventors: Jie Ling, Yu Huang, Shan Jiang, Yan Li Ma
  • Publication number: 20230074762
    Abstract: Aspects of the disclosure provide methods and apparatuses for mesh coding (e.g., compression and decompression). In some examples, an apparatus for mesh coding includes processing circuitry. The processing circuitry decodes an array of attributes from a bitstream carrying a three dimensional (3D) mesh frame that includes a plurality of patches. The array of attributes corresponds to vertices of the 3D mesh frame. The vertices of the 3D mesh frame are ordered into subsets respectively belonging to the plurality of patches. The processing circuitry determines a first portion of the array of attributes corresponding to a first subset of the vertices of the 3D mesh frame. The first subset belongs to a first patch in the plurality of patches. The processing circuitry determines first connectivity information of the first subset of the vertices, and reconstructs the first patch of the 3D mesh frame based on the first portion of the array of attributes and the first connectivity information.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 9, 2023
    Applicant: Tencent America LLC
    Inventors: Chao HUANG, Xiang ZHANG, Jun TIAN, Xiaozhong XU, Shan LIU
  • Publication number: 20230075304
    Abstract: Aspects of the disclosure provide methods and apparatuses for mesh coding (e.g., compression and decompression). In some examples, an apparatus for mesh coding includes processing circuitry. The processing circuitry decodes, using a decoder supporting a first bitdepth, a plurality of segmental attribute values having the first bitdepth from a bitstream carrying a mesh that represents a surface of an object. The plurality of segmental attribute values is associated with attribute values of the mesh, the attribute values of the mesh have a second bitdepth that is higher than the first bitdepth. The processing circuitry determines the attribute values of the mesh having the second bitdepth according to the plurality of segmental attribute values having the first bitdepth.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 9, 2023
    Applicant: Tencent America LLC
    Inventors: Xiang ZHANG, Chao HUANG, Xiaozhong XU, Jun TIAN, Shan LIU
  • Publication number: 20230074378
    Abstract: Aspects of the disclosure provide methods and apparatuses for mesh coding (e.g., compression and decompression). In some examples, an apparatus for mesh coding includes processing circuitry. The processing circuitry decodes a plurality of initial maps in two-dimension from a bitstream carrying a three-dimensional (3D) mesh frame. The processing circuitry determines at least two sampling rates associated with different portions of the plurality of initial maps and recovers from the plurality of initial maps and based on the at least two sampling rates associated with the different portions of the plurality of initial maps to obtain a plurality of recovered maps. A first portion of the plurality of initial maps is recovered based on a first sampling rate, and a second portion of the plurality of initial maps is recovered based on a second sampling rate. The processing circuitry reconstructs the 3D mesh frame based on the plurality of recovered maps.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 9, 2023
    Applicant: Tencent America LLC
    Inventors: Xiaozhong XU, Xiang ZHANG, Shan LIU, Chao HUANG, Jun TIAN
  • Publication number: 20230067696
    Abstract: A semiconductor device comprising a semiconductor channel, an epitaxial structure coupled to the semiconductor channel, and a gate structure electrically coupled to the semiconductor channel. The semiconductor device further comprises a first interconnect structure electrically coupled to the epitaxial structure and a dielectric layer that contains nitrogen. The dielectric layer comprises a first portion protruding from a nitrogen-containing dielectric capping layer that overlays either the gate structure or the first interconnect structure.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Lien Huang, Yi-Shan Chen, Kuan-Da Huang, Han-Yu Lin, Li-Te Lin, Ming-Huan Tsai
  • Publication number: 20230060186
    Abstract: The invention discloses an experimental system of surrounding rock and lining structure under unequal surrounding pressure and water pressure, comprising: reaction wall, lining structure, external water pressure loading mechanism, internal water pressure loading mechanism, prestress-loading mechanism, surrounding rock layer and monitoring device. The Experimental System can simulate the stress characteristics and related deformation characteristics of the surrounding rock of the tunnel and the lining structure of the water conveyance tunnel under complex internal and external loads in the actual environment, and can help to analyze and study the broken appearance of the lining structure and the crack distribution after cracking.
    Type: Application
    Filed: October 17, 2022
    Publication date: March 2, 2023
    Inventors: SHULING HUANG, XIULI DING, SHAN LI, YUTING ZHANG, JUN HE, DENGXUE LIU, GANG HAN, PEIYANG YU
  • Publication number: 20230063575
    Abstract: In some examples, an apparatus for mesh coding includes processing circuitry. The processing circuitry receives a bitstream carrying encoded information of a mesh that is partitioned into patches. The bitstream includes a first portion and a second portion, the first portion includes patch information, the second portion includes patch boundary information that indicates at least a first edge of a first patch and a second edge of a second patch are a pair of edge mates. The processing circuitry decodes the first portion to obtain the patch information, and decodes the second portion to obtain the patch boundary information. The processing circuitry generates a reconstructed mesh based on the patch information and the patch boundary information, the first edge and the second edge are mapped into a same edge in the reconstructed mesh to connect the first patch with the second patch.
    Type: Application
    Filed: August 23, 2022
    Publication date: March 2, 2023
    Applicant: Tencent America LLC
    Inventors: Chao HUANG, Xiang ZHANG, Jun TIAN, Xiaozhong XU, Shan LIU
  • Publication number: 20230063156
    Abstract: An apparatus comprising: a radiation receiving apparatus provided with an opening operable to receive radiation from a radiation source through the opening; wherein the radiation receiving apparatus comprises a deflection apparatus arranged to change a trajectory of a particle through the opening arriving at the radiation receiving apparatus.
    Type: Application
    Filed: December 24, 2020
    Publication date: March 2, 2023
    Applicants: ASML Holding N.V., ASML Netherlands B.V.
    Inventors: Ronald Peter ALBRIGHT, Kursat BAL, Vadim Yevgenyevich BANINE, Richard Joseph BRULS, Sjoerd Frans DE VRIES, Olav Waldemar Vladimir FRIJNS, Yang-Shan HUANG, Zhuangxiong HUANG, Johannes Henricus Wilhelmus JACOBS, Johannes Hubertus Josephina MOORS, Georgi Nanchev NENCHEV, Andrey NIKIPELOV, Thomas Maarten RAASVELD, Manish RANJAN, Edwin TE SLIGTE, Karl Robert UMSTADTER, Eray UZGÖREN, Marcus Adrianus VAN DE KERKHOF, Parham YAGHOOBI
  • Patent number: 11594573
    Abstract: A light-emitting device, includes a substrate with a top surface; a first light-emitting structure unit and a second light-emitting structure unit separately formed on the top surface and adjacent to each other, and wherein the first light-emitting structure unit includes a first sidewall and a second sidewall; a trench between the first and the second light-emitting structure units; and an electrical connection arranged on the first sidewall and the second light-emitting structure unit, and electrically connecting the first light-emitting structure unit and the second light-emitting structure unit; wherein the first sidewall connects to the top surface; wherein the first sidewall faces the second light-emitting structure units, and the second sidewall is not between the first light-emitting structure unit and the second light-emitting structure unit; and wherein the second sidewall is steeper than the first sidewall.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: February 28, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Chien-Fu Shen, Chao-Hsing Chen, Tsun-Kai Ko, Schang-Jing Hon, Sheng-Jie Hsu, De-Shan Kuo, Hsin-Ying Wang, Chiu-Lin Yao, Chien-Fu Huang, Hsin-Mao Liu, Chien-Kai Chung
  • Publication number: 20230054372
    Abstract: A semiconductor structure that includes a first semiconductor fin and a second semiconductor fin disposed over a substrate and adjacent to each other, a metal gate stack disposed over the substrate, and source/drain features disposed in each of the first semiconductor fin and the second semiconductor fin to engage with the metal gate stack. The metal gate stack includes a first region disposed over the first semiconductor fin, a second region disposed over the second semiconductor fin, and a third region connecting the first region to the second region in a continuous profile, where the first region is defined by a first gate length and the second region is defined by a second gate length less than the first gate length.
    Type: Application
    Filed: August 20, 2021
    Publication date: February 23, 2023
    Inventors: Guan-Wei Huang, Yu-Shan Lu, Yu-Bey Wu, Jiun-Ming Kuo, Yuan-Ching Peng
  • Patent number: 11587937
    Abstract: A method (of manufacturing a semiconductor device) includes: forming active regions including spacing apart neighboring active regions resulting in corresponding gaps; forming gate structures (overlying the active regions and the gaps) including locating intra-gap segments of the gate structures over the gaps, arranging each intra-gap segment to include two end regions separated by a central region, and at intersections between active regions and gate structures that is designated to be non-functional (flyover intersection), preventing formation of a functional connection between the two; and removing selected portions of at least some of the intra-gap segments including removing central regions of first selected intra-gap segments substantially without removing portions of corresponding end regions of the first selected intra-gap segments, and removing central regions and portions of end regions of second selected intra-gap segments for which corresponding end regions of the second intra-gap segments abut fl
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: February 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Jen Chen, Wen-Hsi Lee, Ling-Sung Wang, I-Shan Huang, Chan-Yu Hung
  • Publication number: 20230048897
    Abstract: Method, apparatus, and system for sampling-based dynamic mesh compression are provided. The process may include determining one or more sample positions associated with an input mesh based on one or more sampling rates, and an occupancy status associated respectively with each of the one or more sample positions indicating whether each of the one or more sample positions is within boundaries of one or more polygons defined by the input mesh is determined. The process may include generating a sample-based occupancy map based on the occupancy status associated respectively with each of the one or more sample positions.
    Type: Application
    Filed: August 15, 2022
    Publication date: February 16, 2023
    Applicant: TENCENT AMERICA LLC
    Inventors: Xiang ZHANG, Chao Huang, Xiaozhong Xu, Jun Tian, Shan Liu
  • Publication number: 20230047373
    Abstract: Embodiments of the present application provide a method and an apparatus for battery SOC correction, and a battery management system, which relate to the technical field of batteries. The method includes: acquiring a voltage-SOC variation curve of a battery during a charging process; generating a voltage differential curve of the battery according to the voltage-SOC variation curve, the voltage differential curve being a variation curve of a differential value with SOC, the differential value being a ratio of a voltage variation to a SOC variation corresponding to the voltage variation during the charging process; determining a peak point on the voltage differential curve, the peak point being between any two adjacent plateaus on the voltage-SOC variation curve and not located on the any two adjacent plateaus; performing SOC correction on the basis of the peak point. This method is used to improve the SOC estimation accuracy.
    Type: Application
    Filed: November 3, 2022
    Publication date: February 16, 2023
    Applicant: Jiangsu Contemporary Amperex Technology Limited
    Inventors: Shan Huang, Shichao Li, Mingshu Du, Guangyu Xu
  • Publication number: 20230031352
    Abstract: Embodiments of the application provide a method for charging battery a charging and discharging device, which can ensure the safety performance of the battery. The charging and discharging device includes a first DC/DC converter, a unidirectional AC/DC converter and a control unit, where the first DC/DC converter is a unidirectional DC/DC converter, and the control unit is configured to: receive a first charging current and control the unidirectional AC/DC converter and the first DC/DC converter to charge a battery through an AC power source based on the first charging current; receive a first discharging current, and control the battery to release power based on the first discharging current; and receive a second charging current, and control the unidirectional AC/DC converter and the first DC/DC converter to charge the battery through the AC power source based on the second charging current.
    Type: Application
    Filed: December 28, 2021
    Publication date: February 2, 2023
    Applicant: CONTEMPORARY AMPEREX TECHNOLOGY CO., LIMITED
    Inventors: Yu YAN, Xiyang ZUO, Zhimin DAN, Haili LI, Shan HUANG, Shichao LI
  • Publication number: 20230025999
    Abstract: An electronic device including an electronic unit and a functional unit is provided. The electronic unit includes a substrate, a plurality of semiconductor components, and a cover layer. The substrate has a plurality of first side surfaces. The semiconductor components are disposed on the substrate. The cover layer is disposed on the semiconductor components and has a plurality of second side surfaces. The functional unit is disposed on at least one of at least one of the first side surfaces and at least one of the second side surfaces.
    Type: Application
    Filed: June 27, 2022
    Publication date: January 26, 2023
    Applicant: Innolux Corporation
    Inventors: Hao-Jung Huang, Chi-Liang Chang, I-Ho Shen, Ker-Yih Kao, Yun-Sheng Chen, Chiao-Chu Tsui, Chih-Han Ma, Shan-Shan Hsu, Chia-Chieh Fan
  • Publication number: 20230027519
    Abstract: Aspects of the disclosure provide methods and apparatuses of quality assessment for three dimensional (3D) graphics modeling. In some examples, an apparatus for quality assessment includes processing circuitry. The processing circuitry determines an updated virtual camera position in response to a position change of a virtual camera for projection from a three-dimensional (3D) space to a two-dimensional (2D) space. The processing circuitry projects a reference 3D representation according to the updated virtual camera position to generate a reference 2D image, and projects a 3D representation under assessment according to the updated virtual camera position to generate an assessment 2D image. The processing circuitry calculates an assessment score associated with the updated virtual camera position based on the reference 2D image and the assessment 2D image.
    Type: Application
    Filed: July 11, 2022
    Publication date: January 26, 2023
    Applicant: Tencent America LLC
    Inventors: Xiang ZHANG, Chao HUANG, Shan LIU
  • Publication number: 20230014820
    Abstract: Aspects of the disclosure provide methods and apparatuses for mesh coding (e.g., compression and decompression). In some examples, an apparatus for mesh coding includes processing circuitry. The processing circuitry decodes, using a point cloud compression (PCC) decoder and from a bitstream, a point cloud that includes points corresponding to at least one of vertices in a mesh or sampling points of polygons in the mesh. The processing circuitry determines, based on the point cloud, estimated connectivity information of the vertices in the mesh, and generate, a reconstructed mesh frame based on the point cloud and the estimated connectivity information.
    Type: Application
    Filed: July 11, 2022
    Publication date: January 19, 2023
    Applicant: Tencent America LLC
    Inventors: Xiang ZHANG, Chao HUANG, Shan LIU
  • Publication number: 20230008315
    Abstract: A method of forming a semiconductor device includes forming a first layer over a substrate in a deposition chamber with a first deposition cycle and forming a second layer over the substrate in the deposition chamber with a second deposition cycle. The first deposition cycle includes flowing a first process gas over the substrate and flowing a second process gas over the substrate. The second deposition cycle includes flowing a third process gas over the substrate and flowing a fourth process gas over the substrate.
    Type: Application
    Filed: March 25, 2022
    Publication date: January 12, 2023
    Inventors: Yu Shan Lee, Fa-Wei Huang, Yu-Shao Cheng
  • Publication number: 20220404449
    Abstract: The present disclosure provides satellite tracking systems and tracking methods. The satellite tracking system includes an array of antenna elements and a control unit. A feed current for each of the antenna elements passes through a phase shifter. The control unit generates a control signal for the phase shifter. The satellite tracking system searches, positions, and tracks a target satellite in accordance with the control signal. The satellite tracking systems and methods utilize step scanning and particle swarm optimization in the search stage, compensating for gaps formed during the satellite searching in the positioning stage, and conical scanning in the tracking stage.
    Type: Application
    Filed: June 21, 2021
    Publication date: December 22, 2022
    Inventors: FU-SHAN CHOU, HSIU-JU HUANG, CHIEH-SHIH CHOU
  • Patent number: D980907
    Type: Grant
    Filed: July 31, 2022
    Date of Patent: March 14, 2023
    Inventor: Shan Huang