Abstract: In some examples, an apparatus for mesh processing includes processing circuitry. The processing circuitry receives a first mesh frame with polygons representing a surface of an object, and determining that the first mesh frame is a non manifold type mesh in response to one or more singularity components in the first mesh frame. The processing circuitry converts the first mesh frame to a second mesh frame that is a manifold type mesh. The first mesh frame has first boundary loops that respectively correspond to second boundary loops in the second mesh frame. The processing circuitry detects the second boundary loops in the second mesh frame, and determines the first boundary loops in the first mesh frame according to the second boundary loops in the second mesh frame.

Abstract: Disclosed herein is a module for supporting a device configured to manipulate charged particle paths in a charged particle apparatus, the module comprising: a support arrangement configured to support the device, wherein the device is configured to manipulate a charged particle path within the charged particle apparatus; and a support positioning system configured to move the support arrangement within the module; wherein the module is arranged to be field replaceable in the charged particle apparatus.

Abstract: A semiconductor device includes a channel component of a transistor and a gate component disposed over the channel component. The gate component includes: a dielectric layer, a first work function metal layer disposed over the dielectric layer, a fill-metal layer disposed over the first work function metal layer, and a second work function metal layer disposed over the fill-metal layer.

Abstract: A method forming a grating device includes: providing a substrate; entering the substrate into a process chamber; and depositing a grating material on the substrate to form a grating material layer on the substrate. A refractive index of the grating material gradually changes during depositing the grating material in the process chamber. The grating material layer includes a varying refractive index.

Abstract: A method includes forming a dummy gate stack over a fin protruding from a semiconductor substrate, forming gate spacers on sidewalls of the dummy gate stack, forming source/features over portions of the fin, forming a gate trench between the gate spacers, which includes trimming top portions of the gate spacers to form a funnel-like opening in the gate trench, and forming a metal gate structure in the gate trench. A semiconductor structure includes a fin protruding from a substrate, a metal gate structure disposed over the fin, gate spacers disposed on sidewalls of the metal gate structure, where a top surface of each gate spacer is angled toward the semiconductor fin, a dielectric layer disposed over the top surface of each gate spacer, and a conductive feature disposed between the gate spacers to contact the metal gate structure, where sidewalls of the conductive feature contact the dielectric layer.

Abstract: Systems and methods can enable the control the motion of an animated character based on imagery (e.g., captured by an image capture device such as a web camera or “webcam”) which shows a person in motion. Specifically, the animated character can be automatically rendered to have the same motion as the entity shown in the imagery (e.g., in real time). According to one aspect of the present disclosure, the animated character can be rendered by iteratively transforming (e.g., including deforming the actual geometry of) a vector-based surface illustration. Specifically, the systems and methods present disclosure can leverage the scalable and transformable nature of a vector-based surface illustration to provide more realistic motion-controlled animation, in which the underlying geometry of the animated character is able to be adjusted to imitate human motion more realistically (e.g., as opposed to basic rotations of fixed character geometry).

Abstract: In a method, a base mesh is generated from a down-sampled input mesh in a current frame, where the base mesh includes a plurality of vertices. A prediction mode to be applied to the base mesh is determined. The prediction mode is an inter prediction mode or an intra prediction mode. Based on the prediction mode being determined as the intra prediction mode, duplicate vertices among the plurality of vertices in the base mesh are merged to generate a subset of the plurality of vertices. At least the subset of the plurality of vertices is encoded based on the determined intra prediction mode to generate prediction information of at least the subset of the plurality of vertices.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A semiconductor device includes: first and second active regions extending in a first direction and separated by a gap relative to a second direction substantially perpendicular to the first direction; and gate structures correspondingly over the first and second active regions, the gate structures extending in the second direction; and each of the gate structures extending at least unilaterally substantially beyond a first side of the corresponding first or second active region that is proximal to the gap or a second side of the corresponding first or second active region that is distal to the gap; and some but not all of the gate structures also extending bilaterally substantially beyond each of the first and second sides of the corresponding first or second active region.

Abstract: A method and apparatus comprising computer code configured to cause a processor or processors to obtain volumetric data of at least one three-dimensional (3D) visual content, derive a mesh from a frame of the volumetric data, the mesh including a plurality of base mesh vertices, determine a displacement of at least one vertex, that is not of the base mesh vertices, based on a series of projections from at least one of the plurality of base mesh vertices that is a neighboring one of the plurality of base mesh vertices to the at least one vertex, predicting the at least one vertex based at least on the determined displacement, and encode the volumetric data based on the predicted at least one vertex.

Abstract: A display panel includes a first substrate, pixel structures, a first common pad, a second substrate, a second common electrode, a display medium and a conductive particle. The pixel structures are disposed on an active area of the first substrate. The first common pad is disposed on a peripheral area of the first substrate, and is electrically connected to first common electrodes of the pixel structures. The second common electrode is disposed on the second substrate. The conductive particle is disposed on the first common pad, and is electrically connected to the first common pad and the second common electrode. The conductive particle includes a core and a conductive film disposed on a surface of the core, where the conductive film has a main portion and raised portions, and a film thickness of each of the raised portions is greater than a film thickness of the main portion.

Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a gate structure disposed on the substrate. The semiconductor device also includes a source region and a drain region disposed within the substrate. The substrate includes a drift region laterally extending between the source region and the drain region. The semiconductor device further includes a first stressor layer disposed over the drift region of the substrate. The first stressor layer is configured to apply a first stress to the drift region of the substrate. In addition, the semiconductor device includes a second stressor layer disposed on the first stressor layer. The second stressor layer is configured to apply a second stress to the drift region of the substrate, and the first stress is opposite to the second stress.

Abstract: Method, apparatus, and system for texture coordinate prediction for mesh compression are provided. The process may include receiving, for a mesh, a coordinate of a first vertex and a coordinate of a prediction candidate vertex in a three dimensional (3D) space. The process may include determining a stretch perpendicular distance associated with the first vertex and the prediction candidate vertex, the stretch perpendicular distance being based on a conversion of the 3D space into a two dimensional (2D) space, and determining a 2D texture coordinate of the first vertex based on the stretch perpendicular distance associated with the first vertex and the prediction candidate vertex. The process may also include determining a residual of a predicted coordinate of the first vertex and an actual 2D coordinate of the first vertex; and compressing the mesh based on entropy coding the residual.

Abstract: Aspects of the disclosure provide methods and apparatuses for mesh coding (e.g., compression and decompression). In some examples, an apparatus for mesh coding includes processing circuitry. The processing circuitry decodes a plurality of initial maps in two-dimension from a bitstream carrying a three-dimensional (3D) mesh frame. The processing circuitry determines at least two sampling rates associated with different portions of the plurality of initial maps and recovers from the plurality of initial maps and based on the at least two sampling rates associated with the different portions of the plurality of initial maps to obtain a plurality of recovered maps. A first portion of the plurality of initial maps is recovered based on a first sampling rate, and a second portion of the plurality of initial maps is recovered based on a second sampling rate. The processing circuitry reconstructs the 3D mesh frame based on the plurality of recovered maps.

Abstract: A processing circuitry decodes a plurality of maps in 2D from a bitstream carrying a mesh frame. The mesh frame represents a surface of an object with polygons. The plurality of maps includes a decoded geometry map and a decoded attribute map with an adaptive 2D atlas sampling applied. The processing circuitry determines at least a first sampling rate and a second sampling rate according to syntaxes signaled in the bitstream. The first sampling rate is applied to a first region of the mesh frame and the second sampling rate is applied to a second region of the mesh frame during the adaptive 2D atlas sampling. The processing circuitry reconstructs, based on the plurality of maps, at least a first vertex of the mesh frame according to the first sampling rate, and a second vertex of the mesh frame according to the second sampling rate.

Abstract: The present disclosure provides a semiconductor structure in accordance with some embodiment. The semiconductor structure includes a semiconductor substrate having a first circuit region and a second circuit region, first transistors that include first gate stacks disposed in the first circuit region, second transistors that include second gate stacks disposed in the second circuit region, and a guard ring structure disposed between the first circuit region and the second circuit region. The first gate stacks and the second gate stacks have different material compositions. The guard ring structure fully surrounds the second circuit region.

Abstract: An interconnect structure, which may be used for example in a semiconductor device, is disclosed. The interconnect structure includes a contact layer made of a metal; one or more dielectric layers on the contact layer, and a deposited layer made of an insulating material. The interconnect structure further includes a trench through the one or more dielectric layers so that a sidewall surface of the trench is formed by the one or more dielectric layers and a bottom surface of the trench is formed by a portion of the contact layer. The deposited layer is in the trench and a thickness of the insulating material on the sidewall surface of the trench is at least 2.1 times greater than a thickness of the insulating material on the bottom surface of the trench.

Abstract: Coding information of a mesh is received. The coding information includes a plurality of first coordinates and a plurality of second coordinates corresponding to a plurality of vertices and a texture map that are associated with the mesh. A respective first coordinate and a respective second coordinate associated with each of the plurality of vertices are normalized by adjusting the respective first coordinate based on a first factor and the respective second coordinate based on a second factor. The first factor and the second factor are associated with at least one of (i) a bit depth value indicating a coded range of the first coordinates and the second coordinates and (ii) a size of the texture map. The normalized respective first coordinate and the normalized respective second coordinate are expanded based on the first factor and the second factor respectively.

Abstract: The current invention is in the field of molecular biology/pharmacology and provides methods of using a pharmaceutical composition of 5-(2?,4?-difluorophenyl)-salicylanilide derivatives and their ring-fused analogs for inhibiting, reducing, or treating chronic kidney disease or/and renal fibrosis, conditions leading to or arising from it, and/or negative effects of each thereof.

Abstract: Embodiments of the present application provide a method for charging a power battery and a battery management system, which can effectively improve the charging speed of the power battery on the basis of ensuring the safety performance of the power battery. The method for charging a power battery is applied to a battery management system for the power battery. The method includes: determining a negative electrode potential safety threshold according to a battery state parameter of the power battery, the battery state parameter comprising at least one of the state of charge (SOC), the temperature, and the state of health (SOH) of the power battery; and adjusting a charging request current for the power battery based on a negative electrode potential of the power battery and the negative electrode potential safety threshold during a charging process for the power battery.