Patents by Inventor Shan Wang

Shan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180335700
    Abstract: A lithography method is provided in accordance with some embodiments. The lithography method includes forming a patterned photoresist on a material layer, applying a first bonding material to a side surface of the patterned photoresist, performing a treatment on the first bonding material to bond the first bonding material to the side surface of the patterned photoresist, wherein the treatment creates a bonding site on the first bonding material configured to bond to a second bonding material, applying the second bonding material to a side surface of the first bonding material, and patterning the material layer by selectively processing a portion of the material layer exposed by the patterned photoresist, the first bonding material, and the second bonding material.
    Type: Application
    Filed: July 30, 2018
    Publication date: November 22, 2018
    Inventors: Siao-Shan Wang, Ching-Yu Chang
  • Publication number: 20180337044
    Abstract: A method for lithography patterning includes forming an opening in a first layer over a substrate and coating a grafting solution over the first layer and filling in the opening. The grafting solution comprises a grafting compound and a solvent. The grafting compound comprises a grafting unit chemically bonded to a linking unit chemically bonded to a polymer backbone. The linking unit comprises an alkyl segment. The grafting unit is attachable to the first layer. The method further includes curing the grafting solution so that a first portion of the grafting compound is attached to a surface of the first layer, thereby forming a second layer over the surface of the first layer.
    Type: Application
    Filed: May 19, 2017
    Publication date: November 22, 2018
    Inventors: Siao-Shan Wang, Ching-Yu Chang, Chin-Hsiang Lin
  • Publication number: 20180324177
    Abstract: A method and apparatus for registering a user uses biometric authentication and authenticating the identities of interacting parties in real time. The method comprises receiving from a first computing device a captured data of a second computing device, and responsive to receiving the captured data, associating the captured data with data stored in memory to determine an identity of the user of the second computing device, and transmitting to the first communicating device the identity information of the second computing device, wherein the first and second computing devices have been registered with a server.
    Type: Application
    Filed: June 21, 2018
    Publication date: November 8, 2018
    Inventor: Shan WANG
  • Patent number: 10114291
    Abstract: A method includes forming a first layer over a substrate; forming a patterned photoresist layer over the first layer; applying a solution over the patterned photoresist layer to form a conformal layer over the pattern photoresist layer, wherein the conformal layer further includes a first portion over a top surface of the patterned photoresist layer and second portion extending along sidewalls of the patterned photoresist layer; selectively removing the first portion of the conformal layer formed over the top surface of the patterned photoresist layer; and selectively removing the patterned photoresist layer thereby leaving the second portion of the conformal layer.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: October 30, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ya-Ling Cheng, Ching-Yu Chang, Chien-Chih Chen, Chun-Kuang Chen, Siao-Shan Wang, Wei-Liang Lin
  • Patent number: 10091470
    Abstract: Disclosed are a projection device and a light source driving method thereof. The projection device includes a light source module.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: October 2, 2018
    Assignee: Coretronic Corporation
    Inventors: Chia-Keng Wu, Yen-Yu Chou, Fu-Shan Wang
  • Publication number: 20180263328
    Abstract: Disclosed here are a triboelectric generator electrode, manufacturing methods thereof, and light emitting shoes. The triboelectric generator electrode includes a porous electrode layer and a high molecular polymer insulating layer, and the porous electrode layer and the high molecular polymer insulating layer are mutually embedded to form an embedded body. The manufacturing method of the triboelectric generator electrode includes the following steps: (1) brushing a high molecular polymer insulating coating on the surface of a template having a microstructure, and carrying out a degassing treatment; (2) cutting a porous electrode layer with a smooth surface into a target size; (3) fitting the porous electrode layer to the surface of the high molecular polymer insulating coating, and carrying out a curing treatment; and (4) taking a high molecular polymer insulating coating/porous electrode layer composite film from the surface of the template.
    Type: Application
    Filed: September 9, 2016
    Publication date: September 20, 2018
    Inventors: Shan WANG, Xiaoyue FU, Xiaoxiong WANG, Shun FENG, Hao ZHAO, Chi CHENG, Ying ZHAO
  • Publication number: 20180262586
    Abstract: The present invention provides a social network information match-up system. The system receives the request message of the collaboration information to be published from the user end (demand end), and is able to promote the collaboration information of the user end to other user ends using the system. It also help other user end (request end) to publish collaboration information on the exclusive webpage of the user end on the social network website via the system according to the assistance request of the user end (support end).
    Type: Application
    Filed: March 10, 2017
    Publication date: September 13, 2018
    Inventor: Wei-Shan Wang
  • Patent number: 10036957
    Abstract: A lithography method is provided in accordance with some embodiments. The lithography method includes forming a patterned photoresist on a material layer, applying a first bonding material to a side surface of the patterned photoresist, performing a treatment on the first bonding material to bond the first bonding material to the side surface of the patterned photoresist, wherein the treatment creates a bonding site on the first bonding material configured to bond to a second bonding material, applying the second bonding material to a side surface of the first bonding material, and patterning the material layer by selectively processing a portion of the material layer exposed by the patterned photoresist, the first bonding material, and the second bonding material.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: July 31, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Siao-Shan Wang, Ching-Yu Chang
  • Patent number: 10037990
    Abstract: A semiconductor device includes an interconnect layer on an inter-layer dielectric (ILD) structure. The ILD structure includes: first contacts, extending through the ILD structure, electrically connected to corresponding first components located in a floor structure underlying the ILD structure; at least one second component located within the ILD structure and spaced from a surface of the ILD structure (in a direction perpendicular to a plane of the ILD structure) a distance which is less than a thickness of the ILD structure; and second contacts directly contacting corresponding first regions of the at least one second component. The interconnect layer includes: first metallization segments which directly contact corresponding ones of the first contacts; and second metallization segments located over a second region of the at least one second component, a width of the second metallization segments being less than a width of the first metallization segments.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: July 31, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Shan Wang, Shun-Yi Lee
  • Publication number: 20180199013
    Abstract: Disclosed are a projection device and a light source driving method thereof. The projection device includes a light source module.
    Type: Application
    Filed: January 9, 2018
    Publication date: July 12, 2018
    Applicant: Coretronic Corporation
    Inventors: Chia-Keng Wu, Yen-Yu Chou, Fu-Shan Wang
  • Publication number: 20180174830
    Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate, where the patterned resist layer has a first line width roughness. In various embodiments, the patterned resist layer is coated with a treatment material, where a first portion of the treatment material bonds to surfaces of the patterned resist layer. In some embodiments, a second portion of the treatment material (e.g., not bonded to surfaces of the patterned resist layer) is removed, thereby providing a treated patterned resist layer, where the treated patterned resist layer has a second line width roughness less than the first line width roughness.
    Type: Application
    Filed: June 20, 2017
    Publication date: June 21, 2018
    Inventors: Siao-Shan WANG, Cheng-Han WU, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20180177055
    Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate. The patterned resist layer has a first pattern width, and the patterned resist layer has a first pattern profile having a first proportion of active sites. In some examples, the patterned resist layer is coated with a treatment material. In some embodiments, the treatment material bonds to surfaces of the patterned resist layer to provide a treated patterned resist layer having a second pattern profile with a second proportion of active sites greater than the first proportion of active sites. By way of example, and as part of the coating the patterned resist layer with the treatment material, a first pattern shrinkage process may be performed, where the treated patterned resist layer has a second pattern width less than a first pattern width.
    Type: Application
    Filed: June 13, 2017
    Publication date: June 21, 2018
    Inventors: Siao-Shan Wang, Cheng-Han WU, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20180160911
    Abstract: Disclosure includes a physiological monitoring sensor strip and a method for manufacturing the same, and a physiological monitoring mattress and a physiological monitoring system having the same. The physiological monitoring sensor strip includes: a first triboelectric layer and a second triboelectric layer in a stacked arrangement, between which a triboelectric interface is formed; an insulation layer wrapping the first triboelectric layer and wrapping the second triboelectric layer; an electric conduction shielding layer wrapping the first triboelectric layer, the second triboelectric layer, and the insulation layer; and a first extraction electrode and a second extraction electrode acting as outputting electrodes of the physiological monitoring sensor strip.
    Type: Application
    Filed: December 3, 2015
    Publication date: June 14, 2018
    Inventors: Xiaoyue FU, Shan WANG, Shun FENG, Qiang ZHONG, Xiaoxiong WANG, Hao ZHAO, Nam MIU, Charles HSU
  • Publication number: 20180151570
    Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a first transistor on the substrate, wherein the first transistor includes a first source/drain electrode. The semiconductor device further includes a second transistor on the substrate, wherein the second transistor includes a second source/drain electrode. The semiconductor device further includes an insulating layer extending into the substrate, wherein the insulating layer directly contacts the first source/drain electrode and the second source/drain electrode.
    Type: Application
    Filed: January 26, 2018
    Publication date: May 31, 2018
    Inventors: Chin-Shan WANG, Shun-Yi LEE
  • Publication number: 20180138168
    Abstract: A semiconductor device includes a substrate, source/drain contacts, gate structures, conductive elements, and a first stop layer. The substrate has source/drain regions formed therein. The source/drain contacts are over the substrate and each of the source/drain contacts is electrically connected to the respective source/drain region. The gate structures are arranged in parallel on the substrate. The source/drain regions are arranged at opposite sides of the gate structures. Each of the gate structures is sandwiched between two most adjacent source/drain contacts. The conductive element is on the source/drain contacts and crosses over the gate structures. The conductive element is overlapped with at least one gate structure and at least two most adjacent source/drain contacts and is electrically connected to the at least two most adjacent source/drain contacts.
    Type: Application
    Filed: November 17, 2016
    Publication date: May 17, 2018
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Shan Wang, Shun-Yi Lee
  • Patent number: 9974123
    Abstract: A power supply system uses a DC-DC power converter (28) for supplying an output load. A compensation circuit (40) is connected between the input to the DC-DC converter and the output of the DC-DC converter and it provides a compensating path in response to a voltage drop at the output of the DC-DC converter caused by a surge in the output load. The power supply system further comprises a low drop out regulator (30) as the output load, which low drop out regulator (30) having an input connected to the DC-DC power converter and the compensation circuit, and an output connected to an output terminal (C) for connection to a further output load. This enables the DC-DC power converter to have a low current capability, because a large current demand can be met by the DC supply to the DC-DC converter.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: May 15, 2018
    Assignee: PHILIPS LIGHTING HOLDING B.V.
    Inventors: Shan Wang, Kai Qi Tian, Gang Wang
  • Patent number: 9955586
    Abstract: A Ball Grid Array (BGA) formed on printed circuit board is provided. The BGA comprises a first solder ball module and a second solder ball module. The first solder ball module comprises a plurality of first solder balls, wherein one of the first solder balls is grounded for shielding two other first solder balls, and one of the first solder balls is floating. The second solder ball module comprises a plurality of second solder balls, wherein two of the second solder balls are grounded and one of the two grounded second solder balls penetrates the printed circuit board through a plated through hole formed on the printed circuit board for shielding two first solder balls among the first solder balls.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: April 24, 2018
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ting-Ying Wu, Cheng-Lin Wu, Chin-Yuan Lo, Wen-Shan Wang
  • Patent number: 9948280
    Abstract: Disclosed is a two-capacitor-based filter design method comprising: determining a frequency f1 and a fractional bandwidth ratio FBW; selecting a first and a second capacitors according to f1 and FBW, in which a resonant frequency fC1 of the first capacitor is equal to f1×(1?N×FBW), a resonant frequency fC2 of the second capacitor is equal to f1×(1+M×FBW), and each of N and M is a positive number less than one; and determining a length of a first transmission line according to fC1 and a signal speed, and determining a length of a second transmission line according to fC2 and the signal speed. The first capacitor is coupled between a center of the first transmission line and ground, the second capacitor is coupled between a center of the second transmission line and ground, and the first and second transmission lines are connected in series.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: April 17, 2018
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Po-Chun Chen, Ruey-Beei Wu, Ting-Ying Wu, Wen-Shan Wang, Gerchih Chou
  • Publication number: 20180075153
    Abstract: The present disclosure provides a webpage switching method in a browser, and a corresponding device. In an embodiment, the method includes: a webpage browsed by a user is recorded; an operation for triggering a page switching function is received from the user; it is determined that whether there is an adjacent page of current page in current scene, in which the adjacent page corresponds to the operation; when determining there is adjacent page of current page in current scene, the adjacent page is displayed; when determining there is no adjacent page of current page in current scene, it is determined whether there is an adjacent scene corresponding to the operation of current scene; if yes, an adjacent page of current scene in the adjacent scene is displayed; when determining there is no adjacent scene of current scene, the operation for triggering page switching function is determined to be invalid.
    Type: Application
    Filed: November 15, 2017
    Publication date: March 15, 2018
    Inventors: Hui LI, Fengfeng XU, Haoran SUN, Shan WANG, Kaibo WU
  • Patent number: D817899
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: May 15, 2018
    Assignee: Shin Chin Industrial Co., Ltd.
    Inventor: Pai Shan Wang