Patents by Inventor Shankar Swaminathan

Shankar Swaminathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10559468
    Abstract: Disclosed herein are methods of doping a fin-shaped channel region of a partially fabricated 3-D transistor on a semiconductor substrate. The methods may include forming a multi-layer dopant-containing film on the substrate, forming a capping film comprising a silicon carbide material, a silicon carbonitride material, silicon oxycarbide material, silicon carbon-oxynitride, or a combination thereof, the capping film located such that the multi-layer dopant-containing film is located in between the substrate and the capping film, and driving dopant from the dopant-containing film into the fin-shaped channel region. Multiple dopant-containing layers of the film may be formed by an atomic layer deposition process which includes adsorbing a dopant-containing film precursor such that it forms an adsorption-limited layer on the substrate and reacting adsorbed dopant-containing film precursor.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: February 11, 2020
    Assignee: Lam Research Corporation
    Inventors: Reza Arghavani, Samantha Tan, Bhadri N. Varadarajan, Adrien LaVoie, Ananda K. Banerji, Jun Qian, Shankar Swaminathan
  • Patent number: 10541117
    Abstract: Heights of carrier ring supports are increased at a side of a wafer that is located closer to a spindle of a plasma chamber. The heights are increased relative to a height of a carrier ring support that is located closer to side walls of the plasma chamber. The increase in the height results in an increase in thickness of a thin film deposited on the wafer to further achieve uniformity in thickness of the thin film across a top surface of the wafer.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: January 21, 2020
    Assignee: Lam Research Corporation
    Inventors: Shankar Swaminathan, Pramod Subramonium, Frank L. Pasquale, Jeongseok Ha, Chloe Baldasseroni
  • Patent number: 10526700
    Abstract: The present inventors have conceived of a multi-stage process gas delivery system for use in a substrate processing apparatus. In certain implementations, a first process gas may first be delivered to a substrate in a substrate processing chamber. A second process gas may be delivered, at a later time, to the substrate to aid in the even dosing of the substrate. Delivery of the first process gas and the second process gas may cease at the same time or may cease at separate times.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: January 7, 2020
    Assignee: Lam Research Corporation
    Inventors: Purushottam Kumar, Hu Kang, Adrien LaVoie, Yi Chung Chiu, Frank L. Pasquale, Jun Qian, Chloe Baldasseroni, Shankar Swaminathan, Karl F. Leeser, David Charles Smith, Wei-Chih Lai
  • Patent number: 10529557
    Abstract: A substrate is positioned in exposure to a plasma generation region within a plasma processing chamber. A first plasma is generated within the plasma generation region. The first plasma is configured to cause deposition of a film on the substrate until the film deposited on the substrate reaches a threshold film thickness. The substrate is then exposed to ultraviolet radiation to resolve defects within the film deposited on the substrate. The ultraviolet radiation can be supplied in-situ using either a second plasma configured to generate ultraviolet radiation or an ultraviolet irradiation device disposed in exposure to the plasma generation region. The ultraviolet radiation can also be supplied ex-situ by moving the substrate to an ultraviolet irradiation device separate from the plasma processing chamber. The substrate can be exposed to the ultraviolet radiation in a repeated manner to resolve defects within the deposited film as the film thickness increases.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: January 7, 2020
    Assignee: Lam Research Corporation
    Inventor: Shankar Swaminathan
  • Publication number: 20190385850
    Abstract: Disclosed herein are methods of doping a fin-shaped channel region of a partially fabricated 3-D transistor on a semiconductor substrate. The methods may include forming a multi-layer dopant-containing film on the substrate, forming a capping film comprising a silicon carbide material, a silicon nitride material, a silicon carbonitride material, or a combination thereof, the capping film located such that the multi-layer dopant-containing film is located in between the substrate and the capping film, and driving dopant from the dopant-containing film into the fin-shaped channel region. Multiple dopant-containing layers of the film may be formed by an atomic layer deposition process which includes adsorbing a dopant-containing film precursor such that it forms an adsorption-limited layer on the substrate and reacting adsorbed dopant-containing film precursor.
    Type: Application
    Filed: August 29, 2019
    Publication date: December 19, 2019
    Inventors: Reza Arghavani, Samantha Tan, Bhadri N. Varadarajan, Adrien LaVoie, Ananda K. Banerji, Jun Qian, Shankar Swaminathan
  • Publication number: 20190385817
    Abstract: A processing chamber in a substrate processing system includes an upper surface, sidewalls, and a bottom surface and a showerhead connected to and extending downward from the upper surface of the processing chamber. The showerhead includes a stem portion and a base portion. An inverted conical surface is arranged adjacent to the upper surface and the sidewalls of the processing chamber and includes an angled surface arranged to redirect gas flow above the showerhead from a horizontal direction to a downward direction and into a gap between a radially outer portion of the base portion and the sidewalls of the processing chamber.
    Type: Application
    Filed: August 30, 2019
    Publication date: December 19, 2019
    Inventors: Richard PHILLIPS, Ryan BLAQUIERE, Shankar SWAMINATHAN
  • Publication number: 20190311897
    Abstract: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.
    Type: Application
    Filed: May 31, 2019
    Publication date: October 10, 2019
    Inventors: Hu Kang, Shankar Swaminathan, Jun Qian, Wanki Kim, Dennis M. Hausmann, Bart J. van Schravendijk, Adrien LaVoie
  • Patent number: 10407773
    Abstract: Disclosed are methods of depositing films of material on semiconductor substrates employing the use of a secondary purge. The methods may include flowing a film precursor into a processing chamber and adsorbing the film precursor onto a substrate in the processing chamber such that the precursor forms an adsorption-limited layer on the substrate. The methods may further include removing at least some unadsorbed film precursor from the volume surrounding the adsorbed precursor by purging the processing chamber with a primary purge gas, and thereafter reacting adsorbed film precursor while a secondary purge gas is flowed into the processing chamber, resulting in the formation of a film layer on the substrate. The secondary purge gas may include a chemical species having an ionization energy and/or a disassociation energy equal to or greater than that of O2. Also disclosed are apparatuses which implement the foregoing processes.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: September 10, 2019
    Assignee: Lam Research Corporation
    Inventors: Adrien LaVoie, Hu Kang, Purushottam Kumar, Shankar Swaminathan, Jun Qian, Frank L. Pasquale, Chloe Baldasseroni
  • Patent number: 10403474
    Abstract: A substrate processing system includes a processing chamber and a showerhead including a faceplate, a stem portion and a cylindrical base portion. A collar connects the showerhead to a top surface of the processing chamber. The collar defines a gas channel to receive secondary purge gas and a plurality of gas slits to direct the secondary purge gas from the gas channel in a radially outward and downward direction. A conical surface is arranged adjacent to the cylindrical base and around the stem portion of the showerhead. An inverted conical surface is arranged adjacent to a top surface and sidewalls of the processing chamber. The conical surface and the inverted conical surface define an angled gas channel from the plurality of gas slits to a gap defined between a radially outer portion of the cylindrical base portion and the sidewalls of the processing chamber.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: September 3, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Richard Phillips, Ryan Blaquiere, Shankar Swaminathan
  • Patent number: 10378107
    Abstract: A showerhead in a semiconductor processing apparatus can include faceplate through-holes configured to improve the flow uniformity during atomic layer deposition. The showerhead can include a faceplate having a plurality of through-holes for distributing gas onto a substrate, where the faceplate includes small diameter through-holes. For example, the diameter of each of the through-holes can be less than about 0.04 inches. In addition or in the alternative, the showerhead can include edge through-holes positioned circumferentially along a ring having a diameter greater than a diameter of the substrate being processed. The showerhead can be a low volume showerhead and can include a baffle proximate one or more gas inlets in communication with a plenum volume of the showerhead. The faceplate with small diameter through-holes and/or edge through-holes can improve overall film non-uniformity, improve azimuthal film non-uniformity at the edge of the substrate, and enable operation at higher RF powers.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: August 13, 2019
    Assignee: Lam Research Corporation
    Inventors: Ramesh Chandrasekharan, Saangrut Sangplung, Shankar Swaminathan, Frank Pasquale, Hu Kang, Adrien LaVoie, Edward Augustyniak, Yukinori Sakiyama, Chloe Baldasseroni, Seshasayee Varadarajan, Basha Sajjad, Jennifer L. Petraglia
  • Patent number: 10361076
    Abstract: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: July 23, 2019
    Assignee: Lam Research Corporation
    Inventors: Hu Kang, Shankar Swaminathan, Jun Qian, Wanki Kim, Dennis Hausmann, Bart J. van Schravendijk, Adrien LaVoie
  • Patent number: 10323323
    Abstract: A gas delivery system includes a first valve including an inlet that communicates with a first gas source. A first inlet of a second valve communicates with an outlet of the first valve and a second inlet of the second valve communicates with a second gas source. An inlet of a third valve communicates with a third gas source. A connector includes a first gas channel and a cylinder defining a second gas channel. The cylinder and the first gas channel collectively define a flow channel between an outer surface of the cylinder and an inner surface of the first gas channel. The flow channel communicates with the outlet of the third valve and the first end of the second gas channel. A third gas channel communicates with the second gas channel, with the outlet of the second valve and with a gas distribution device of a processing chamber.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: June 18, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Ramesh Chandrasekharan, Jennifer O'Loughlin, Saangrut Sangplung, Shankar Swaminathan, Frank Pasquale, Chloe Baldasseroni, Adrien LaVoie
  • Patent number: 10301718
    Abstract: Pedestal assemblies and methods for using said pedestal assemblies, used in processing chambers implemented for processing substrates are disclosed. In one example, the pedestal assembly includes a center column coupled to a lower chamber body of a processing chamber. A pedestal body is coupled to the center column. The pedestal body includes a substrate support surface and an annular step formed around a circumference of the pedestal body and surrounding the substrate support surface. Further included is a first annular ring segment disposed within the annular step. The first annular ring is defined from a conductive material. A second annular ring segment is also disposed within the annular step. The second annular ring is defined from a dielectric material. The first annular ring and the second annular ring fill the annular step around the circumference of the pedestal body.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: May 28, 2019
    Assignee: Lam Research Corporation
    Inventors: Ryan Blaquiere, Ramesh Chandrasekharan, Shankar Swaminathan, Yukinori Sakiyama
  • Publication number: 20190122871
    Abstract: A substrate processing system includes a processing chamber including a top surface, a bottom surface and side walls. A substrate support is arranged in the processing chamber to support a substrate during processing. A purge structure is arranged in the processing chamber below a plane occupied by the substrate during processing. The purge structure includes a first plurality of holes configured to supply purge gas to purge an area between the substrate support and the bottom surface of the processing chamber.
    Type: Application
    Filed: December 14, 2018
    Publication date: April 25, 2019
    Inventors: Ramesh CHANDRASEKHARAN, Shankar Swaminathan, Adrien Lavoie
  • Publication number: 20190067094
    Abstract: Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process are disclosed. The methods may include: providing a substrate comprising a dielectric surface into a reaction chamber; depositing a nucleation film directly on the dielectric surface; and depositing a molybdenum metal film directly on the nucleation film, wherein depositing the molybdenum metal film includes: contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor; and contacting the substrate with a second vapor phase reactant comprising a reducing agent precursor. Semiconductor device structures including a molybdenum metal film disposed over a surface of a dielectric material with an intermediate nucleation film are also disclosed.
    Type: Application
    Filed: August 20, 2018
    Publication date: February 28, 2019
    Inventors: Bhushan Zope, Kiran Shrestha, Shankar Swaminathan, Chiyu Zhu, Henri Tuomas Antero Jussila, Qi Xie
  • Publication number: 20190067014
    Abstract: Methods for filling a gap feature on a substrate surface are disclosure. The methods may include: providing a substrate comprising one or more gap features into a reaction chamber; and partially filling the one or more gap features with a molybdenum metal film by a cyclical deposition-etch process, wherein a unit cycle of the cyclical deposition-etch process comprises: partially filling the one or more gap features with a molybdenum metal film by a performing at least one unit cycle of a first cyclical deposition process; and partially etching the molybdenum metal film. The methods may also include: filling the one or more gap features with molybdenum metal film by performing at least one unit cycle of a second cyclical deposition process. Semiconductor device structures including a gap fill molybdenum metal film disposed in one or more gap features in or on a surface of a substrate formed by the methods of the disclosure are also disclosed.
    Type: Application
    Filed: August 20, 2018
    Publication date: February 28, 2019
    Inventors: Kiran Shrestha, Bhushan Zope, Shankar Swaminathan, Chiyu Zhu, Henri Tuomas Antero Jussila, Qi Xie
  • Publication number: 20190067003
    Abstract: Methods for depositing a molybdenum metal film directly on a dielectric material surface of a substrate by a cyclical deposition process are disclosed. The methods may include: providing a substrate comprising a dielectric surface into a reaction chamber; and depositing a molybdenum metal film directly on the dielectric surface, wherein depositing comprises: contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor; and contacting the substrate with a second vapor phase reactant comprising a reducing agent precursor. Semiconductor device structures including a molybdenum metal film disposed directly on a surface of a dielectric material deposited by the methods of the disclosure are also disclosed.
    Type: Application
    Filed: August 20, 2018
    Publication date: February 28, 2019
    Inventors: Bhushan Zope, Shankar Swaminathan, Kiran Shrestha, Chiyu Zhu, Henri Tuomas Antero Jussila, Qi Xie
  • Publication number: 20190057864
    Abstract: A substrate is positioned in exposure to a plasma generation region within a plasma processing chamber. A first plasma is generated within the plasma generation region. The first plasma is configured to cause deposition of a film on the substrate until the film deposited on the substrate reaches a threshold film thickness. The substrate is then exposed to ultraviolet radiation to resolve defects within the film deposited on the substrate. The ultraviolet radiation can be supplied in-situ using either a second plasma configured to generate ultraviolet radiation or an ultraviolet irradiation device disposed in exposure to the plasma generation region. The ultraviolet radiation can also be supplied ex-situ by moving the substrate to an ultraviolet irradiation device separate from the plasma processing chamber. The substrate can be exposed to the ultraviolet radiation in a repeated manner to resolve defects within the deposited film as the film thickness increases.
    Type: Application
    Filed: October 22, 2018
    Publication date: February 21, 2019
    Inventor: Shankar Swaminathan
  • Publication number: 20190040528
    Abstract: The present inventors have conceived of a multi-stage process gas delivery system for use in a substrate processing apparatus. In certain implementations, a first process gas may first be delivered to a substrate in a substrate processing chamber. A second process gas may be delivered, at a later time, to the substrate to aid in the even dosing of the substrate. Delivery of the first process gas and the second process gas may cease at the same time or may cease at separate times.
    Type: Application
    Filed: September 13, 2018
    Publication date: February 7, 2019
    Inventors: Purushottam Kumar, Hu Kang, Adrien LaVoie, Yi Chung Chiu, Frank L. Pasquale, Jun Qian, Chloe Baldasseroni, Shankar Swaminathan, Karl F. Leeser, David Charles Smith, Wei-Chih Lai
  • Patent number: 10192742
    Abstract: Methods for depositing nanolaminate protective layers over a core layer to enable deposition of high quality conformal films over the core layer for use in advanced multiple patterning schemes are provided. In certain embodiments, the methods involve depositing a thin silicon oxide or titanium oxide film using plasma-based atomic layer deposition techniques with a low high frequency radio frequency (HFRF) plasma power, followed by depositing a conformal titanium oxide film or spacer with a high HFRF plasma power.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: January 29, 2019
    Assignee: Novellus Systems, Inc.
    Inventors: Frank L. Pasquale, Shankar Swaminathan, Adrien LaVoie, Nader Shamma, Girish A. Dixit