Patents by Inventor Shankar Swaminathan

Shankar Swaminathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10741458
    Abstract: Methods and apparatus to form films on sensitive substrates while preventing damage to the sensitive substrate are provided herein. In certain embodiments, methods involve forming a bilayer film on a sensitive substrate that both protects the underlying substrate from damage and possesses desired electrical properties. Also provided are methods and apparatus for evaluating and optimizing the films, including methods to evaluate the amount of substrate damage resulting from a particular deposition process and methods to determine the minimum thickness of a protective layer. The methods and apparatus described herein may be used to deposit films on a variety of sensitive materials such as silicon, cobalt, germanium-antimony-tellerium, silicon-germanium, silicon nitride, silicon carbide, tungsten, titanium, tantalum, chromium, nickel, palladium, ruthenium, or silicon oxide.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: August 11, 2020
    Assignee: Novellus Systems, Inc.
    Inventors: Hu Kang, Shankar Swaminathan, Adrien LaVoie, Jon Henri
  • Patent number: 10741365
    Abstract: A low volume showerhead in a semiconductor processing apparatus can include a porous baffle to improve the flow uniformity and purge time during atomic layer deposition. The showerhead can include a plenum volume, one or more gas inlets in fluid communication with the plenum volume, a faceplate including a plurality of first through-holes for distributing gas onto a substrate in the semiconductor processing apparatus, and a porous baffle positioned in a region between the plenum volume and the one or more gas inlets. The one or more gas inlets can include a stem having a small volume to improve purge time. The baffle can be porous and positioned between the stem and the plenum volume to improve flow uniformity and avoid jetting.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: August 11, 2020
    Assignee: Lam Research Corporation
    Inventors: Ramesh Chandrasekharan, Saangrut Sangplung, Shankar Swaminathan, Frank L. Pasquale, Hu Kang, Adrien LaVoie
  • Publication number: 20200227304
    Abstract: A pedestal for a substrate processing system includes a pedestal body including a substrate-facing surface. An annular band is arranged on the substrate-facing surface that is configured to support a radially outer edge of the substrate. A cavity is defined in the substrate-facing surface of the pedestal body and is located radially inside of the annular band. The cavity creates a volume between a bottom surface of the substrate and the substrate-facing surface of the pedestal body. A plurality of vents pass though the pedestal body and are in fluid communication with the cavity to equalize pressure on opposing faces of the substrate during processing.
    Type: Application
    Filed: March 31, 2020
    Publication date: July 16, 2020
    Inventors: Patrick Breiling, Ramesh Chandrasekharan, Karl Leeser, Paul Konkola, Adrien LaVoie, Chloe Baldasseroni, Shankar Swaminathan, Ishtak Karim, Yukinori Sakiyama, Edmund Minshall, Sung Je Kim, Andrew Duvall, Frank Pasquale
  • Publication number: 20200219757
    Abstract: A substrate processing system includes a first chamber including a substrate support. A showerhead is arranged above the first chamber and is configured to filter ions and deliver radicals from a plasma source to the first chamber. The showerhead includes a heat transfer fluid plenum, a secondary gas plenum including an inlet to receive secondary gas and a plurality of secondary gas injectors to inject the secondary gas into the first chamber, and a plurality of through holes passing through the showerhead. The through holes are not in fluid communication with the heat transfer fluid plenum or the secondary gas plenum.
    Type: Application
    Filed: March 16, 2020
    Publication date: July 9, 2020
    Inventors: Patrick BREILING, Ramesh Chandrasekharan, Karl Leeser, Paul Konkola, Adrien LaVoie, Chloe Baldasseroni, Shankar Swaminathan, lshtak Karim, Yukinori Sakiyama, Edmund Minshall, Sung Je Kim, Andrew Duvall, Frank Pasquale
  • Patent number: 10665429
    Abstract: A substrate processing system for depositing film on a substrate includes a processing chamber defining a reaction volume. A showerhead includes a stem portion having one end connected adjacent to an upper surface of the processing chamber. A base portion is connected to an opposite end of the stem portion and extends radially outwardly from the stem portion. The showerhead is configured to introduce at least one of process gas and purge gas into the reaction volume. A plasma generator is configured to selectively generate RF plasma in the reaction volume. An edge tuning system includes a collar and a parasitic plasma reducing element that is located around the stem portion between the collar and an upper surface of the showerhead. The parasitic plasma reducing element is configured to reduce parasitic plasma between the showerhead and the upper surface of the processing chamber.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: May 26, 2020
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Hu Kang, Adrien LaVoie, Shankar Swaminathan, Jun Qian, Chloe Baldasseroni, Frank Pasquale, Andrew Duvall, Ted Minshall, Jennifer Petraglia, Karl Leeser, David Smith, Sesha Varadarajan, Edward Augustyniak, Douglas Keil
  • Patent number: 10648079
    Abstract: A process chamber for depositing a film on a wafer is provided, including: a pedestal having, a central top surface having a plurality of wafer supports configured to support the wafer at a support level above the central top surface, an annular surface at a step down from the central top surface; a carrier ring configured to be supported by carrier ring supports such that a bottom surface of the carrier ring is at a first vertical separation above the annular surface, the carrier ring having a step down surface defined relative to a top surface; wherein when the carrier ring is seated on the carrier ring supports, then the step down surface of the carrier ring is positioned at a process level that is at a second vertical separation from the support level over the top surface of the pedestal.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: May 12, 2020
    Assignee: Lam Research Corporation
    Inventors: Chloe Baldasseroni, Andrew Duvall, Ryan Blaquiere, Shankar Swaminathan
  • Patent number: 10629435
    Abstract: Methods and apparatuses for patterning substrates using a positive patterning scheme are described herein. Methods involve receiving a substrate having a patterned core material, depositing a doped spacer material conformally over the patterned core material, selectively etching the core material to the doped spacer material to form a spacer mask, and using the spacer mask to etch a target layer on the substrate. Spacer materials may be doped using any of boron, gallium, phosphorus, arsenic, aluminum, and hafnium. Embodiments are suitable for applications in multiple patterning applications.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: April 21, 2020
    Assignee: Lam Research Corporation
    Inventors: Shankar Swaminathan, Richard Phillips, Adrien LaVoie
  • Patent number: 10622243
    Abstract: A pedestal for a substrate processing system includes a pedestal body including a substrate-facing surface. An annular band is arranged on the substrate-facing surface that is configured to support a radially outer edge of the substrate. A cavity is defined in the substrate-facing surface of the pedestal body and is located radially inside of the annular band. The cavity creates a volume between a bottom surface of the substrate and the substrate-facing surface of the pedestal body. A plurality of vents pass through the pedestal body and are in fluid communication with the cavity to equalize pressure on opposing faces of the substrate during processing.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: April 14, 2020
    Inventors: Patrick Breiling, Ramesh Chandrasekharan, Karl Leeser, Paul Konkola, Adrien LaVoie, Chloe Baldasseroni, Shankar Swaminathan, Ishtak Karim, Yukinori Sakiyama, Edmund Minshall, Sung Je Kim, Andrew Duvall, Frank Pasquale
  • Publication number: 20200111666
    Abstract: A substrate is positioned in exposure to a plasma generation region within a plasma processing chamber. A first plasma is generated within the plasma generation region. The first plasma is configured to cause deposition of a film on the substrate until the film deposited on the substrate reaches a threshold film thickness. The substrate is then exposed to ultraviolet radiation to resolve defects within the film deposited on the substrate. The ultraviolet radiation can be supplied in-situ using either a second plasma configured to generate ultraviolet radiation or an ultraviolet irradiation device disposed in exposure to the plasma generation region. The ultraviolet radiation can also be supplied ex-situ by moving the substrate to an ultraviolet irradiation device separate from the plasma processing chamber. The substrate can be exposed to the ultraviolet radiation in a repeated manner to resolve defects within the deposited film as the film thickness increases.
    Type: Application
    Filed: December 5, 2019
    Publication date: April 9, 2020
    Inventor: Shankar Swaminathan
  • Patent number: 10559468
    Abstract: Disclosed herein are methods of doping a fin-shaped channel region of a partially fabricated 3-D transistor on a semiconductor substrate. The methods may include forming a multi-layer dopant-containing film on the substrate, forming a capping film comprising a silicon carbide material, a silicon carbonitride material, silicon oxycarbide material, silicon carbon-oxynitride, or a combination thereof, the capping film located such that the multi-layer dopant-containing film is located in between the substrate and the capping film, and driving dopant from the dopant-containing film into the fin-shaped channel region. Multiple dopant-containing layers of the film may be formed by an atomic layer deposition process which includes adsorbing a dopant-containing film precursor such that it forms an adsorption-limited layer on the substrate and reacting adsorbed dopant-containing film precursor.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: February 11, 2020
    Assignee: Lam Research Corporation
    Inventors: Reza Arghavani, Samantha Tan, Bhadri N. Varadarajan, Adrien LaVoie, Ananda K. Banerji, Jun Qian, Shankar Swaminathan
  • Patent number: 10541117
    Abstract: Heights of carrier ring supports are increased at a side of a wafer that is located closer to a spindle of a plasma chamber. The heights are increased relative to a height of a carrier ring support that is located closer to side walls of the plasma chamber. The increase in the height results in an increase in thickness of a thin film deposited on the wafer to further achieve uniformity in thickness of the thin film across a top surface of the wafer.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: January 21, 2020
    Assignee: Lam Research Corporation
    Inventors: Shankar Swaminathan, Pramod Subramonium, Frank L. Pasquale, Jeongseok Ha, Chloe Baldasseroni
  • Patent number: 10529557
    Abstract: A substrate is positioned in exposure to a plasma generation region within a plasma processing chamber. A first plasma is generated within the plasma generation region. The first plasma is configured to cause deposition of a film on the substrate until the film deposited on the substrate reaches a threshold film thickness. The substrate is then exposed to ultraviolet radiation to resolve defects within the film deposited on the substrate. The ultraviolet radiation can be supplied in-situ using either a second plasma configured to generate ultraviolet radiation or an ultraviolet irradiation device disposed in exposure to the plasma generation region. The ultraviolet radiation can also be supplied ex-situ by moving the substrate to an ultraviolet irradiation device separate from the plasma processing chamber. The substrate can be exposed to the ultraviolet radiation in a repeated manner to resolve defects within the deposited film as the film thickness increases.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: January 7, 2020
    Assignee: Lam Research Corporation
    Inventor: Shankar Swaminathan
  • Patent number: 10526700
    Abstract: The present inventors have conceived of a multi-stage process gas delivery system for use in a substrate processing apparatus. In certain implementations, a first process gas may first be delivered to a substrate in a substrate processing chamber. A second process gas may be delivered, at a later time, to the substrate to aid in the even dosing of the substrate. Delivery of the first process gas and the second process gas may cease at the same time or may cease at separate times.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: January 7, 2020
    Assignee: Lam Research Corporation
    Inventors: Purushottam Kumar, Hu Kang, Adrien LaVoie, Yi Chung Chiu, Frank L. Pasquale, Jun Qian, Chloe Baldasseroni, Shankar Swaminathan, Karl F. Leeser, David Charles Smith, Wei-Chih Lai
  • Publication number: 20190385817
    Abstract: A processing chamber in a substrate processing system includes an upper surface, sidewalls, and a bottom surface and a showerhead connected to and extending downward from the upper surface of the processing chamber. The showerhead includes a stem portion and a base portion. An inverted conical surface is arranged adjacent to the upper surface and the sidewalls of the processing chamber and includes an angled surface arranged to redirect gas flow above the showerhead from a horizontal direction to a downward direction and into a gap between a radially outer portion of the base portion and the sidewalls of the processing chamber.
    Type: Application
    Filed: August 30, 2019
    Publication date: December 19, 2019
    Inventors: Richard PHILLIPS, Ryan BLAQUIERE, Shankar SWAMINATHAN
  • Publication number: 20190385850
    Abstract: Disclosed herein are methods of doping a fin-shaped channel region of a partially fabricated 3-D transistor on a semiconductor substrate. The methods may include forming a multi-layer dopant-containing film on the substrate, forming a capping film comprising a silicon carbide material, a silicon nitride material, a silicon carbonitride material, or a combination thereof, the capping film located such that the multi-layer dopant-containing film is located in between the substrate and the capping film, and driving dopant from the dopant-containing film into the fin-shaped channel region. Multiple dopant-containing layers of the film may be formed by an atomic layer deposition process which includes adsorbing a dopant-containing film precursor such that it forms an adsorption-limited layer on the substrate and reacting adsorbed dopant-containing film precursor.
    Type: Application
    Filed: August 29, 2019
    Publication date: December 19, 2019
    Inventors: Reza Arghavani, Samantha Tan, Bhadri N. Varadarajan, Adrien LaVoie, Ananda K. Banerji, Jun Qian, Shankar Swaminathan
  • Publication number: 20190311897
    Abstract: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.
    Type: Application
    Filed: May 31, 2019
    Publication date: October 10, 2019
    Inventors: Hu Kang, Shankar Swaminathan, Jun Qian, Wanki Kim, Dennis M. Hausmann, Bart J. van Schravendijk, Adrien LaVoie
  • Patent number: 10418236
    Abstract: Dielectric composite films characterized by a dielectric constant (k) of less than about 7 and having a density of at least about 2.5 g/cm3 are deposited on partially fabricated semiconductor devices to serve as etch stop layers. The dielectric composite film in one embodiment includes Al, Si, and O and has a thickness of between about 10-100 ?. The dielectric composite film can reside between two layers of inter-layer dielectric, and may be in contact with metal layers. An apparatus for depositing such dielectric composite films includes a process chamber, a conduit for delivering an aluminum containing precursor to the process chamber, a second conduit for delivering a silicon-containing precursor to the process chamber and a controller having program instructions for depositing the dielectric composite film from these precursors, e.g., by reacting the precursors adsorbed to the substrate with an oxygen-containing species.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: September 17, 2019
    Assignee: Lam Research Corporation
    Inventors: Kapu Sirish Reddy, Nagraj Shankar, Shankar Swaminathan, Meliha Gozde Rainville, Frank L. Pasquale
  • Patent number: 10407773
    Abstract: Disclosed are methods of depositing films of material on semiconductor substrates employing the use of a secondary purge. The methods may include flowing a film precursor into a processing chamber and adsorbing the film precursor onto a substrate in the processing chamber such that the precursor forms an adsorption-limited layer on the substrate. The methods may further include removing at least some unadsorbed film precursor from the volume surrounding the adsorbed precursor by purging the processing chamber with a primary purge gas, and thereafter reacting adsorbed film precursor while a secondary purge gas is flowed into the processing chamber, resulting in the formation of a film layer on the substrate. The secondary purge gas may include a chemical species having an ionization energy and/or a disassociation energy equal to or greater than that of O2. Also disclosed are apparatuses which implement the foregoing processes.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: September 10, 2019
    Assignee: Lam Research Corporation
    Inventors: Adrien LaVoie, Hu Kang, Purushottam Kumar, Shankar Swaminathan, Jun Qian, Frank L. Pasquale, Chloe Baldasseroni
  • Patent number: 10403474
    Abstract: A substrate processing system includes a processing chamber and a showerhead including a faceplate, a stem portion and a cylindrical base portion. A collar connects the showerhead to a top surface of the processing chamber. The collar defines a gas channel to receive secondary purge gas and a plurality of gas slits to direct the secondary purge gas from the gas channel in a radially outward and downward direction. A conical surface is arranged adjacent to the cylindrical base and around the stem portion of the showerhead. An inverted conical surface is arranged adjacent to a top surface and sidewalls of the processing chamber. The conical surface and the inverted conical surface define an angled gas channel from the plurality of gas slits to a gap defined between a radially outer portion of the cylindrical base portion and the sidewalls of the processing chamber.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: September 3, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Richard Phillips, Ryan Blaquiere, Shankar Swaminathan
  • Patent number: 10378107
    Abstract: A showerhead in a semiconductor processing apparatus can include faceplate through-holes configured to improve the flow uniformity during atomic layer deposition. The showerhead can include a faceplate having a plurality of through-holes for distributing gas onto a substrate, where the faceplate includes small diameter through-holes. For example, the diameter of each of the through-holes can be less than about 0.04 inches. In addition or in the alternative, the showerhead can include edge through-holes positioned circumferentially along a ring having a diameter greater than a diameter of the substrate being processed. The showerhead can be a low volume showerhead and can include a baffle proximate one or more gas inlets in communication with a plenum volume of the showerhead. The faceplate with small diameter through-holes and/or edge through-holes can improve overall film non-uniformity, improve azimuthal film non-uniformity at the edge of the substrate, and enable operation at higher RF powers.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: August 13, 2019
    Assignee: Lam Research Corporation
    Inventors: Ramesh Chandrasekharan, Saangrut Sangplung, Shankar Swaminathan, Frank Pasquale, Hu Kang, Adrien LaVoie, Edward Augustyniak, Yukinori Sakiyama, Chloe Baldasseroni, Seshasayee Varadarajan, Basha Sajjad, Jennifer L. Petraglia