Patents by Inventor Shao-Chien Lee
Shao-Chien Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10497847Abstract: A heat dissipation substrate structure includes a multilayer circuit board including a core board and build-up boards, a heat conduction layer, a cavity structure, bonding pads, and vias. The heat conduction layer is disposed within the core board, or on a surface of the core board, or on a surface of one of the build-up boards. The cavity structure is in the multilayer circuit board with respect to the heat conduction layer and exposes a first surface of the heat conduction layer. The bonding pads are on the surface of the multilayer circuit board at a side of a second surface of the heat conduction layer. The portions of the vias are connected to portions of the bonding pads and the heat conduction layer. Accordingly, heat flow can be distributed via a heat dissipation path from the bonding pads through the vias to the heat conduction layer.Type: GrantFiled: November 30, 2017Date of Patent: December 3, 2019Assignee: Unimicron Technology Corp.Inventors: Wen-Fang Liu, Shao-Chien Lee, Chen-Wei Tseng, Zong-Hua Li
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Publication number: 20190067543Abstract: A heat dissipation substrate structure includes a multilayer circuit board including a core board and build-up boards, a heat conduction layer, a cavity structure, bonding pads, and vias. The heat conduction layer is disposed within the core board, or on a surface of the core board, or on a surface of one of the build-up boards. The cavity structure is in the multilayer circuit board with respect to the heat conduction layer and exposes a first surface of the heat conduction layer. The bonding pads are on the surface of the multilayer circuit board at a side of a second surface of the heat conduction layer. The portions of the vias are connected to portions of the bonding pads and the heat conduction layer. Accordingly, heat flow can be distributed via a heat dissipation path from the bonding pads through the vias to the heat conduction layer.Type: ApplicationFiled: November 30, 2017Publication date: February 28, 2019Applicant: Unimicron Technology Corp.Inventors: Wen-Fang Liu, Shao-Chien Lee, Chen-Wei Tseng, Zong-Hua Li
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Publication number: 20180368263Abstract: A chip package circuit board module including a circuit board and at least one original chip is provided. The circuit board includes at least one first pad, at least one second pad and at least one substitute pad. The at least one second pad is located besides the at least one first pad and separated from the at least one first pad. The at least one substitute pad is adjacent to the at least one second pad and separated from the at least one first pad and the at least one second pad. The at least one original chip is connected to the at least one first pad and at least one the second pad, respectively. A total width of a portion corresponding to each of the at least one second pad and a portion corresponding to the substitute pad adjacent to the second pad of the first pad is greater than or equal to twice a width of the original chip.Type: ApplicationFiled: June 14, 2017Publication date: December 20, 2018Applicant: Unimicron Technology Corp.Inventors: Wen-Fang Liu, Shao-Chien Lee, Chen-Wei Tseng, Zong-Hua Li, Chien-Tsai Li
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Patent number: 10159151Abstract: A chip package circuit board module including a circuit board and at least one original chip is provided. The circuit board includes at least one first pad, at least one second pad and at least one substitute pad. The at least one second pad is located besides the at least one first pad and separated from the at least one first pad. The at least one substitute pad is adjacent to the at least one second pad and separated from the at least one first pad and the at least one second pad. The at least one original chip is connected to the at least one first pad and at least one the second pad, respectively. A total width of a portion corresponding to each of the at least one second pad and a portion corresponding to the substitute pad adjacent to the second pad of the first pad is greater than or equal to twice a width of the original chip.Type: GrantFiled: June 14, 2017Date of Patent: December 18, 2018Assignee: Unimicron Technology Corp.Inventors: Wen-Fang Liu, Shao-Chien Lee, Chen-Wei Tseng, Zong-Hua Li, Chien-Tsai Li
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Patent number: 10056356Abstract: A chip package circuit board module includes a circuit board and an original chip. The circuit board includes a first pad and a second pad disposed besides the first pad and separated from the first pad. The original chip is connected to the first pad and the second pad. A width of the original chip is W1, a total width of the first pad is P1, and a total width of the second pad is P2. The total width P1 of the first pad is larger than twice of the width W1 of the original chip, and the total width P2 of the second pad is larger than twice of the width W1 of the original chip.Type: GrantFiled: May 3, 2017Date of Patent: August 21, 2018Assignee: Unimicron Technology Corp.Inventors: Wen-Fang Liu, Shao-Chien Lee, Chen-Wei Tseng, Zong-Hua Li
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Patent number: 8590147Abstract: A method of fabricating a circuit board structure with concave conductive cylinders is provided. Firstly, a conductive layer is provided and a dielectric layer is formed on a surface of the conductive layer. Next, a plurality of vias is formed in the dielectric layer, where the vias are exposed on the surface of the conductive layer. A conductive material is then filled in the vias to form a plurality of conductive cylinders on the surface of the conductive layer, so that the tips of the conductive cylinders are exposed on a surface of the dielectric layer relatively far away from the conductive layer. The exposed tips of the conductive cylinders are removed, so that the height of the conductive cylinders is lower than the dielectric layer and the conductive cylinders sunk into the dielectric layer.Type: GrantFiled: January 5, 2010Date of Patent: November 26, 2013Assignee: Unimicron Technology Corp.Inventors: Shao-Chien Lee, Chih-Ming Chang
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Publication number: 20120124830Abstract: A process for fabricating a circuit board is provided. In the process, first, a circuit substrate including an insulation layer and at least a pad contacting the insulation layer is provided. Next, a barrier material layer is formed on the circuit substrate. The barrier material layer completely covers the insulation layer and the pad. Then, at least one conductive bump is formed on the barrier material layer. The conductive bump is opposite to the pad, and the material of the barrier material layer is different from the material of the conductive bump. Next, a portion of the barrier material layer is removed by using the conductive bump as a mask, so as to expose the surface of the insulation layer and to form a barrier connected between the conductive bump and the pad.Type: ApplicationFiled: January 31, 2012Publication date: May 24, 2012Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: David C. H. Cheng, Shao-Chien Lee, Tzyy-Jang Tseng
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Patent number: 8091221Abstract: A method of fabricating a circuit board includes the following steps. First, a patterned metal board is provided. The patterned metal board includes a patterned circuit having at least a pad. Next, a dielectric layer is formed on the patterned metal board to cover the patterned circuit. Thereafter, a processing treatment is preformed on a surface of the patterned metal board in which the surface is opposite to the patterned circuit, such that at least a conductive joint column disposed on the pad and a circuit layer having the patterned circuit are formed. Afterwards, a solder mask layer is formed on the dielectric layer to cover the circuit layer, such that the solder mask layer is in contact with the conductive joint column, the conductive joint column passes through the solder mask layer, and a height of the conductive joint column exceeds a thickness of the solder mask layer.Type: GrantFiled: January 13, 2009Date of Patent: January 10, 2012Assignee: Unimicron Technology Corp.Inventors: Shao-Chien Lee, Chih-Ming Chang
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Publication number: 20100101083Abstract: A method of fabricating a circuit board structure with concave conductive cylinders is provided. Firstly, a conductive layer is provided and a dielectric layer is formed on a surface of the conductive layer. Next, a plurality of vias is formed in the dielectric layer, where the vias are exposed on the surface of the conductive layer. A conductive material is then filled in the vias to form a plurality of conductive cylinders on the surface of the conductive layer, so that the tips of the conductive cylinders are exposed on a surface of the dielectric layer relatively far away from the conductive layer. The exposed tips of the conductive cylinders are removed, so that the height of the conductive cylinders is lower than the dielectric layer and the conductive cylinders sunk into the dielectric layer.Type: ApplicationFiled: January 5, 2010Publication date: April 29, 2010Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Shao-Chien Lee, Chih-Ming Chang
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Patent number: 7667144Abstract: A circuit board including a dielectric layer, a circuit layer, at least one conductive joint column, and a solder mask layer is provided. The circuit layer having at least one pad is in contact with the dielectric layer. The conductive joint column is disposed on the pad. The solder mask layer is disposed on the dielectric layer and covers the circuit layer. The solder mask layer is in contact with the conductive joint column, and the conductive joint column penetrates the solder mask layer. A height of the conductive joint column is larger than a thickness of the solder mask layer. The enhanced reliability of bonding between another component and the conductive joint column will be provided. Further, a method of fabricating a circuit board is also provided.Type: GrantFiled: September 12, 2007Date of Patent: February 23, 2010Assignee: Unimicron Technology Corp.Inventors: Shao-Chien Lee, Chih-Ming Chang
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Publication number: 20090144972Abstract: A process for fabricating a circuit board is provided. In the process, first, a circuit substrate including an insulation layer and at least a pad contacting the insulation layer is provided. Next, a barrier material layer is formed on the circuit substrate. The barrier material layer completely covers the insulation layer and the pad. Then, at least one conductive bump is formed on the barrier material layer. The conductive bump is opposite to the pad, and the material of the barrier material layer is different from the material of the conductive bump. Next, a portion of the barrier material layer is removed by using the conductive bump as a mask, so as to expose the surface of the insulation layer and to form a barrier connected between the conductive bump and the pad.Type: ApplicationFiled: March 13, 2008Publication date: June 11, 2009Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: David C. H. Cheng, Shao-Chien Lee, Tzyy-Jang Tseng
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Publication number: 20090117262Abstract: A method of fabricating a circuit board includes the following steps. First, a patterned metal board is provided. The patterned metal board includes a patterned circuit having at least a pad. Next, a dielectric layer is formed on the patterned metal board to cover the patterned circuit. Thereafter, a processing treatment is preformed on a surface of the patterned metal board in which the surface is opposite to the patterned circuit, such that at least a conductive joint column disposed on the pad and a circuit layer having the patterned circuit are formed. Afterwards, a solder mask layer is formed on the dielectric layer to cover the circuit layer, such that the solder mask layer is in contact with the conductive joint column, the conductive joint column passes through the solder mask layer, and a height of the conductive joint column exceeds a thickness of the solder mask layer.Type: ApplicationFiled: January 13, 2009Publication date: May 7, 2009Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Shao-Chien Lee, Chih-Ming Chang
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Publication number: 20090025210Abstract: A method for fabricating a circuit board structure with concave conductive cylinders is provided. Firstly, a conductive layer is provided; a plurality of conductive cylinders are formed on a surface of the conductive layer; a dielectric layer is formed on the surface of the conductive layer with the conductive cylinders; the tips of the conductive cylinders are exposed on a surface of the dielectric layer far away from the conductive layer; removing the exposed tips of the conductive cylinders such that the height of the conductive cylinders is lower than the height of the dielectric layer, and the conductive cylinders sunk into the dielectric layer.Type: ApplicationFiled: October 10, 2007Publication date: January 29, 2009Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Shao-Chien Lee, Chih-Ming Chang
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Publication number: 20080277141Abstract: A circuit board including a dielectric layer, a circuit layer, at least one conductive joint column, and a solder mask layer is provided. The circuit layer having at least one pad is in contact with the dielectric layer. The conductive joint column is disposed on the pad. The solder mask layer is disposed on the dielectric layer and covers the circuit layer. The solder mask layer is in contact with the conductive joint column, and the conductive joint column penetrates the solder mask layer. A height of the conductive joint column is larger than a thickness of the solder mask layer. The enhanced reliability of bonding between another component and the conductive joint column will be provided. Further, a method of fabricating a circuit board is also provided.Type: ApplicationFiled: September 12, 2007Publication date: November 13, 2008Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Shao-Chien Lee, Chih-Ming Chang
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Patent number: 7393720Abstract: A method for fabricating an electrical interconnect structure is adapted for a circuit board manufacturing process. The circuit board comprises a conductive substrate, which comprises a first conductive layer and a bump conductive layer. The bump conductive layer is patterned to form at least one bump over the first conductive layer. Then, a dielectric layer is formed over the first conductive layer and the bump. A second conductive layer is formed over the dielectric layer. At least one blind hole is formed in the second conductive layer and the dielectric layer, passing through the second conductive layer and the dielectric layer to expose the top surface of the bump. A conductive material is filled in the blind hole, and the conductive material in the blind hole and the bump constitute a conductive post.Type: GrantFiled: January 27, 2005Date of Patent: July 1, 2008Assignee: Unimicron Technology Corp.Inventors: Shao-Chien Lee, Tzyy Jang Tseng, Chang-Ming Lee
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Publication number: 20060068577Abstract: A method for fabricating an electrical interconnect structure is adapted for a circuit board manufacturing process. The circuit board comprises a conductive substrate, which comprises a first conductive layer and a bump conductive layer. The bump conductive layer is patterned to form at least one bump over the first conductive layer. Then, a dielectric layer is formed over the first conductive layer and the bump. A second conductive layer is formed over the dielectric layer. At least one blind hole is formed in the second conductive layer and the dielectric layer, passing through the second conductive layer and the dielectric layer to expose the top surface of the bump. A conductive material is filled in the blind hole, and the conductive material in the blind hole and the bump constitute a conductive post.Type: ApplicationFiled: January 27, 2005Publication date: March 30, 2006Inventors: Shao-Chien Lee, Tzyy Jang Tseng, Chang-Ming Lee
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Publication number: 20050230711Abstract: A connecting circuit structure is provided for a circuit carrier. The circuit connecting structure includes at least two insulating layers, two conductive layers, and one conductive pad, wherein a via hole is formed from each of the insulating layers through corresponding insulating layer. One insulating layer is formed over the other. The conductive pad is disposed between the two insulating layers, and two surfaces of the conductive pad are connected to the two via holes respectively. Two conductive layers are respectively formed in the via hole on a same side of the circuit connecting structure in order to connect to the conductive pad respectively. Since a depth/width ratio of the via hole is reduced according to the circuit connecting structure in the present invention, voids and bubbles are effectively avoided and the reliability of fabricating method thereof is increased.Type: ApplicationFiled: July 29, 2004Publication date: October 20, 2005Inventors: Chin-Chung Chang, Chia-Pin Lin, Kwang-Shiang Juang, Shao- Chien Lee