Patents by Inventor Shao Liu

Shao Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240394384
    Abstract: A constrained decoding technique incorporates token constraints into a beam search at each time step of a decoding process in order to generate viable candidate sequences that are syntactically and semantically correct. The token constraints identify source code tokens or sequences of tokens that should appear in a candidate sequence. The token constraints are generated from checking whether a token predicted at each decoding step is feasible for a partial solution based on the production rules of the grammar of the programming language, the syntactic correctness of a partial sequence, and/or static type correctness.
    Type: Application
    Filed: August 7, 2024
    Publication date: November 28, 2024
    Inventors: COLIN BRUCE CLEMENT, SHAO KUN DENG, XIAOYU LIU, NEELAKANTAN SUNDARESAN, ALEXEY SVYATKOVSKIY
  • Publication number: 20240393325
    Abstract: The present disclosure relates to a method of distinguishably detecting two biomarkers with cross-reactivity in a biological sample. The method comprises providing two sensor units specific to the two biomarkers, respectively; obtaining binding affinities of a series of known concentrations of the two biomarkers to the sensor units, respectively; contacting the biological sample with the two sensor units to produce two signals; and calculating the concentrations of the two biomarkers in the biological sample with the two signals and the binding affinities.
    Type: Application
    Filed: May 24, 2023
    Publication date: November 28, 2024
    Inventors: Wen-Yih CHEN, Hardy Wai-Hong CHAN, Yuh-Shyong YANG, Ching-Wei TSAI, Wei-Jane CHIU, Yi-Shao LIU, Lin-Ai TAI
  • Publication number: 20240386993
    Abstract: According to implementations of the subject matter described herein, a solution for molecular binding analysis is provided. In the solution, a first feature representation determined based on a structure of a ligand molecule may be obtained, and a second feature representation determined based on a structure of a protein molecule may be obtained. A third feature representation of a complex structure may be determined, wherein the complex structure is built based on the protein molecule and the ligand molecule. The first feature representation, the second feature representation and the third feature representation may be used to generate an aggregate feature representation so as to determine evaluation information on the binding between the ligand molecule and the protein molecule. The evaluation information may indicate the effectiveness of the binding or indicate the affinity of a binding pose of the binding. Thereby, more efficient and accurate binding analysis can be realized.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 21, 2024
    Inventors: Tong WANG, Bin SHAO, Tie-Yan LIU
  • Publication number: 20240365003
    Abstract: An image capturing device comprising an image sensor and a processing circuit. The processing circuit is configured to perform following steps: (a) outputting first sensing frames by the image sensor in a first mode, wherein a first frame time duration is determined between adjacent ones of the first sensing frames; (b) switching from the first mode to a second mode in a transition time interval; (c) setting the transition time interval such that a difference between the transition time interval and the first frame duration is smaller than a predetermined value; and (d) outputting second sensing frames by the image sensor in the second mode.
    Type: Application
    Filed: April 29, 2024
    Publication date: October 31, 2024
    Applicant: MEDIATEK INC.
    Inventors: Yan-Shao Liu, Yun-Feng Tseng, Chi-Cheng Ju
  • Publication number: 20240363400
    Abstract: A method for manufacturing a semiconductor device includes: forming a first feature and a second feature extending in a normal direction transverse to a substrate; directionally depositing a dielectric material upon the features at an inclined angle relative to the normal direction so as to form a cap layer including a top portion disposed on a top surface of each of the features, and two opposite wall portions extending downwardly from two opposite ends of the top portion to partially cover two opposite lateral surfaces of each of the features, respectively, the cap layer on the first feature being spaced apart from the cap layer on the second feature; forming a sacrificial feature in a recess between the features; forming a sustaining layer to cover the sacrificial feature; and removing the sacrificial feature to form an air gap.
    Type: Application
    Filed: July 5, 2024
    Publication date: October 31, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Chin LEE, Ting-Ya LO, Chi-Lin TENG, Cherng-Shiaw TSAI, Shao-Kuan LEE, Kuang-Wei YANG, Gary LIU, Hsin-Yen HUANG, Hsiao-Kang CHANG, Shau-Lin SHUE
  • Patent number: 12086268
    Abstract: A constrained decoding technique incorporates token constraints into a beam search at each time step of a decoding process in order to generate viable candidate sequences that are syntactically and semantically correct. The token constraints identify source code tokens or sequences of tokens that should appear in a candidate sequence. The token constraints are generated from checking whether a token predicted at each decoding step is feasible for a partial solution based on the production rules of the grammar of the programming language, the syntactic correctness of a partial sequence, and/or static type correctness.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: September 10, 2024
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC.
    Inventors: Colin Bruce Clement, Shao Kun Deng, Xiaoyu Liu, Neelakantan Sundaresan, Alexey Svyatkovskiy
  • Patent number: 12062572
    Abstract: A method for manufacturing a semiconductor device includes: forming a first feature and a second feature extending in a normal direction transverse to a substrate; directionally depositing a dielectric material upon the features at an inclined angle relative to the normal direction so as to form a cap layer including a top portion disposed on a top surface of each of the features, and two opposite wall portions extending downwardly from two opposite ends of the top portion to partially cover two opposite lateral surfaces of each of the features, respectively, the cap layer on the first feature being spaced apart from the cap layer on the second feature; forming a sacrificial feature in a recess between the features; forming a sustaining layer to cover the sacrificial feature; and removing the sacrificial feature to form an air gap.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: August 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Chin Lee, Ting-Ya Lo, Chi-Lin Teng, Cherng-Shiaw Tsai, Shao-Kuan Lee, Kuang-Wei Yang, Gary Liu, Hsin-Yen Huang, Hsiao-Kang Chang, Shau-Lin Shue
  • Patent number: 11980864
    Abstract: A method of operating an integrated circuit includes using a first switching device to couple a bio-sensing device to a first signal path, generating, using the bio-sensing device, a bio-sensing signal on the first signal path in response to an electrical characteristic of a sensing film, using a second switching device to couple a temperature-sensing device to a second signal path, and generating, using the temperature-sensing device, a temperature-sensing signal on the second signal path in response to a temperature of the sensing film. The first and second switching devices, the bio-sensing device, the temperature-sensing device, and the sensing film are components of a sensing pixel of a plurality of sensing pixels of the integrated circuit.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Tung-Tsun Chen, Yi-Shao Liu, Jui-Cheng Huang, Chin-Hua Wen, Felix Ying-Kit Tsui, Yung-Chow Peng
  • Patent number: 11828722
    Abstract: A biological device includes a substrate, a gate electrode, and a sensing well. The substrate includes a source region, a drain region, a channel region, a body region, and a sensing region. The channel region is disposed between the source region and the drain region. The sensing region is at least disposed between the channel region and the body region. The gate electrode is at least disposed on or above the channel region of the substrate. The sensing well is at least disposed adjacent to the sensing region.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: November 28, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ta-Chuan Liao, Chien-Kuo Yang, Yi-Shao Liu, Tung-Tsun Chen, Chan-Ching Lin, Jui-Cheng Huang, Felix Ying-Kit Tsui, Jing-Hwang Yang
  • Publication number: 20230375501
    Abstract: A method of making a biochip includes forming an opening extending completely through a fluidic substrate. Forming the opening includes defining a plurality of sidewalls on the fluidic substrate, wherein the plurality of sidewalls defines a channel in fluid communication with the opening, and each of the plurality of sidewalls comprises polydimethylsiloxane (PDMS). The method further includes coating a surface of the fluidic substrate with a silicon oxide coating wherein, the silicon oxide coating is between adjacent sidewalls of the plurality of sidewalls. The method further includes bonding the fluidic substrate to a detection substrate.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Inventors: Yi-Shao LIU, Chun-Ren CHENG, Chun-Wen CHENG
  • Publication number: 20230375499
    Abstract: A biological device includes a substrate, a gate electrode, and a sensing well. The substrate includes a source region, a drain region, a channel region, a body region, and a sensing region. The channel region is disposed between the source region and the drain region. The sensing region is at least disposed between the channel region and the body region. The gate electrode is at least disposed on or above the channel region of the substrate. The sensing well is at least disposed adjacent to the sensing region.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ta-Chuan LIAO, Chien-Kuo YANG, Yi-Shao LIU, Tung-Tsun CHEN, Chan-Ching LIN, Jui-Cheng HUANG, Felix Ying-Kit TSUI, Jing-Hwang YANG
  • Patent number: 11824002
    Abstract: An integrated circuit structure comprises a base and a plurality of metal levels over the base. A first metal level includes a first dielectric material. The first metal level further includes a first plurality of interconnect lines in the first dielectric material, wherein the first plurality of interconnect lines in the first metal level have variable widths from relatively narrow to relatively wide, and wherein the first plurality of interconnect lines have variable heights based on the variable widths, such that a relatively wide one of the first plurality of interconnect lines has a taller height from the substrate than a relatively narrow one of the first plurality of interconnect lines, and a shorter distance to a top of the first metal level.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: November 21, 2023
    Assignee: Intel Corporation
    Inventors: En-Shao Liu, Joodong Park, Chen-Guan Lee, Walid M. Hafez, Chia-Hong Jan, Jiansheng Xu
  • Patent number: 11823602
    Abstract: A layout arrangement of a driver integrated circuit includes multiple output pads, a plurality of switching circuits, and multiple data channel circuits. The output pads include a first output pad and a second output pad and are configurable to be coupled to a plurality of data lines. The switching circuits include a first switching circuit. A first selection terminal of the first switching circuit is coupled to the first output pad via a first connecting wire. A second selection terminal of the first switching circuit is coupled to the second output pad via a second connecting wire. The data channel circuits include a first data channel circuit. An output terminal of the first data channel circuit is coupled to a common terminal of the first switching circuit via a third connecting wire. The third connecting wire is longer than the first connecting wire and the second connecting wire.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: November 21, 2023
    Assignee: Novatek Microelectronics Corp.
    Inventors: Hsiu-Hui Yang, Yu-Shao Liu
  • Patent number: 11768170
    Abstract: A biochip including a fluidic substrate having an opening extending completely through the fluidic substrate. The biochip further includes a silicon oxide coating on the fluidic substrate. The biochip further includes a plurality of sidewalls on the fluidic substrate, wherein the plurality of sidewalls defines a channel in fluid communication with the opening, the silicon oxide coating is between adjacent sidewalls of the plurality of sidewalls, and each of the plurality of sidewalls comprises polydimethylsiloxane (PDMS). The biochip further includes a detection substrate spaced from the fluidic substrate.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: September 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Shao Liu, Chun-Ren Cheng, Chun-Wen Cheng
  • Patent number: 11703475
    Abstract: A method includes mounting an integrated electro-microfluidic probe card to a device area on a bio-sensor device wafer, wherein the electro-microfluidic probe card has a first major surface and a second major surface opposite the first major surface. The method further includes electrically connecting at least one electronic probe tip extending from the first major surface to a corresponding conductive area of the device area. The method further includes stamping a test fluid onto the device area. The method further includes measuring via the at least one electronic probe tip a first electrical property of one or more bio-FETs of the device area based on the test fluid.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: July 18, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Shao Liu, Fei-Lung Lai, Chun-Ren Cheng, Chun-Wen Cheng
  • Publication number: 20230081170
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity.
    Type: Application
    Filed: October 31, 2022
    Publication date: March 16, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Alexander KALNITSKY, Yi-Shao LIU, Kai-Chih LIANG, Chia-Hua CHU, Chun-Ren CHENG, Chun-Wen CHENG
  • Patent number: 11537739
    Abstract: The present application is related to system and method for analyzing confidential data. Firstly, a first key is used to obtain a first analysis authorization for proceeding a first analysis responsive to an operational model in an encrypted cloud space with a connection of a network. Then, the result of the first analysis is verified. While the verifying of the operational model is pass, a second key is used to obtain a second analysis authorization for proceeding a second analysis responsive to an operational model without the connection of the network. Thereby, the cloud technique for analyzing data can be applied for analyzing confidential data.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: December 27, 2022
    Assignee: National Applied Research Laboratories
    Inventors: Hsi-Ching Lin, Yu-Shao Liu, August Chao
  • Publication number: 20220387959
    Abstract: A method of operating an integrated circuit includes using a first switching device to couple a bio-sensing device to a first signal path, generating, using the bio-sensing device, a bio-sensing signal on the first signal path in response to an electrical characteristic of a sensing film, using a second switching device to couple a temperature-sensing device to a second signal path, and generating, using the temperature-sensing device, a temperature-sensing signal on the second signal path in response to a temperature of the sensing film. The first and second switching devices, the bio-sensing device, the temperature-sensing device, and the sensing film are components of a sensing pixel of a plurality of sensing pixels of the integrated circuit.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 8, 2022
    Inventors: Tung-Tsun CHEN, Yi-Shao LIU, Jui-Cheng HUANG, Chin-Hua WEN, Felix Ying-Kit TSUI, Yung-Chow PENG
  • Patent number: 11504690
    Abstract: An integrated circuit includes two or more rows of heating elements, two or more columns of heating elements, and a plurality of sensing areas. Each sensing area is between two adjacent rows of the rows of heating elements and between two adjacent columns of the columns of heating elements and includes a bio-sensing device and a temperature-sensing device.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: November 22, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tung-Tsun Chen, Yi-Shao Liu, Jui-Cheng Huang, Chin-Hua Wen, Felix Ying-Kit Tsui, Yung-Chow Peng
  • Patent number: 11498044
    Abstract: An integrated circuit includes two or more rows of heating elements, two or more columns of heating elements, and a plurality of sensing circuits. Each sensing circuit is between two adjacent rows of the rows of heating elements and between two adjacent columns of the columns of heating elements, in a same silicon layer as the rows of heating elements and the columns of heating elements, and configured to generate a bio-sensing signal and a temperature-sensing signal.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: November 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tung-Tsun Chen, Yi-Shao Liu, Jui-Cheng Huang, Chin-Hua Wen, Felix Ying-Kit Tsui, Yung-Chow Peng