Abstract: A voltage tracking circuit is provided. The voltage tracking circuit includes first and second P-type transistors and a control circuit. The drain of the first P-type transistor is coupled to a first voltage terminal. The gate and the drain of the second P-type transistor are respectively coupled to the first voltage terminal and a second voltage terminal. The control circuit is coupled to the first and second voltage terminals and generates a control voltage according to the first voltage and the second voltage. The sources of the first and second P-type transistors are coupled to an output terminal of the voltage tracking circuit, and the output voltage is generated at the output terminal. In response to the second voltage being higher than the first voltage, the control circuit generates the control signal to turn off the first P-type transistor.

Abstract: An interconnect structure includes a dielectric layer, a first conductive feature, a hard mask layer, a conductive layer, and a capping layer. The first conductive feature is disposed in the dielectric layer. The hard mask layer is disposed on the first conductive feature. The conductive layer includes a first portion and a second portion, the first portion of the conductive layer is disposed over at least a first portion of the hard mask layer, and the second portion of the conductive layer is disposed over the dielectric layer. The hard mask layer and the conductive layer are formed by different materials. The capping layer is disposed on the dielectric layer and the conductive layer.

Abstract: A device configured to bond an electronic component includes a carrying platform, a pressing element, a closed space generating mechanism, a gas extracting mechanism, and an energy generating mechanism. The carrying platform is configured to carry a target substrate and a carrying substrate carrying the electronic component on the target substrate. The pressing element is made of a flexible material. The closed space generating mechanism is capable of putting the pressing element onto the carrying platform, so as to form a closed space between the pressing element and the carrying platform. The gas extracting mechanism is configured to extract gas from the closed space. The energy generating mechanism is disposed near the carrying platform, and configured to generate energy toward the carrying platform. A method for bonding an electronic component and a method for manufacturing a light-emitting diode (LED) display are also provided.

Abstract: A chip-transferring module, and a device and a method for transferring and bonding chips are provided. The chip-transferring module includes a mounting main body, a light-transmitting member, a first gas guiding structure and a second gas guiding structure. The mounting main body has a first accommodating space and a second accommodating space. The light-transmitting member is disposed in the first accommodating space. The first gas guiding structure is disposed in the mounting main body and has a plurality of suction openings exposed out of the mounting main body. The second gas guiding structure is disposed in the mounting main body and has at least one intake opening communicating with the second accommodating space.

Abstract: A method of manufacturing a display module is provided and includes providing a substrate; disposing a plurality of light emitting components on the substrate in an array arrangement; and disposing at least one optical sensor on the substrate, wherein the at least one optical sensor is located between corresponding two of the plurality of light emitting components when the plurality of light emitting components and the at least one optical sensor are disposed on the substrate. Besides, a full screen image display device including a display module prepared in accordance with the aforementioned method is provided. The present invention can provide a full screen image without any notch.

Abstract: A light-emitting chip carrying structure and a method of manufacturing the same are provided. The method includes transferring a plurality of light-emitting chips to a circuit substrate; driving a leveling substrate to concurrently press the light-emitting chip by a carrier device such that a plurality of distances each defined between a light-emitting surface of each of the light-emitting chips and a top surface of the circuit substrate are the same; fixing the light-emitting chips on the circuit substrate by a heating device while the light-emitting chips are pressed by the leveling substrate; and then removing the leveling substrate by the carrier device. Therefore, the light-emitting surfaces of the light-emitting chips relative to the top surface of the circuit substrate have the same flatness, and the light-emitting surfaces of the light-emitting chips are disposed on the same plane.

Abstract: A bicycle brake shoe device is provided with a brake pad assembly including right and left members on an inner surface respectively wherein the left member has a cavity, and two grooves on top and bottom of the right and left members respectively; a support including an intermediate hole, two grooved rails on top and bottom of an inner surface respectively, and a threaded hole through a right side; a bolt and nut assembly including a nut in the intermediate hole, and a bolt driven through the nut to fasten the bolt and nut assembly and the support together wherein the brake pad assembly and the support are positioned and the grooves are disposed in the grooved rails respectively; and a screw driven through the threaded hole into a hole of the right member to fasten the support and the brake pad assembly together.

Abstract: A solar cell and manufacturing method of back electrodes thereof are disclosed. The method includes a step of implementing a screen printing process to a semiconductor substrate. The method also includes a step of measuring a deviation which exists between laser ablation recesses and back electrodes in the screen printing process. The method further includes a step of adjusting the distance between the laser ablation recess and the back electrode according to the deviation. After adjusting, a deviation between laser ablation recesses and back electrodes will be controlled to a narrower range when the screen printing process is implemented to another semiconductor substrate. Thus, the defect is caused by the back electrodes incompletely covering the laser ablation recesses can be improved significantly.

Abstract: A solar cell, including a semiconductor substrate, a first-type dopant layer and a second-type dopant layer that are respectively disposed on two surfaces of the semiconductor substrate, a first passivation layer formed on the first-type dopant layer, a first anti-reflection layer formed on the first passivation layer, a plurality of back electrodes passing through the first anti-reflection layer and the first passivation layer, a second passivation layer formed on the second-type dopant layer, a second anti-reflection layer formed on the second passivation layer, and a plurality of front surface electrodes passing through the second anti-reflection layer and the second passivation layer. Widths of the back electrodes formed on a central area are smaller than those of the back electrodes formed on side areas.

Abstract: A femtocell, a femtocell gateway and an access rejection method thereof are provided. A wireless network system comprises a wireless device, a plurality of the femtocells, the femtocell gateway and a core network server. The wireless device has a Subscriber Identification and the core network server stores a Closed Subscribers Group Identification of the femtocells. The femtocell gateway receives an access rejection message corresponding to the Subscriber Identification of the wireless device from the core network server, and transmits the access rejection message to the femtocells. Each femtocell records the Subscriber Identification in a rejection list thereof, and it is capable of adding/deleting Subscriber Identifications in its rejection list.

Abstract: A femtocell, a femtocell gateway and an access rejection method thereof are provided. A wireless network system comprises a wireless device, a plurality of the femtocells, the femtocell gateway and a core network server. The wireless device has a Subscriber Identification and the core network server stores a Closed Subscribers Group Identification of the femtocells. The femtocell gateway receives an access rejection message corresponding to the Subscriber Identification of the wireless device from the core network server, and transmits the access rejection message to the femtocells. Each femtocell records the Subscriber Identification in a rejection list thereof, and it is capable of adding/deleting Subscriber Identifications in its rejection list.