Patents by Inventor Shaolin Xie
Shaolin Xie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230199192Abstract: Scene aware video content encoding techniques can determine if video content is a given content type and is one of one or more given titles that include one or more given scenes. The one or more given scenes of the video content of the given type and given one of the titles can be encoded using corresponding scenes specific encoding parameter values, and the non-given scenes can be encoded using one or more general encoding parameter values. The one or more given titles can be selected based on a rate of streaming of various video content titles of the given type.Type: ApplicationFiled: October 11, 2022Publication date: June 22, 2023Inventors: Tae Meon BAE, Minghai QIN, Guanlin WU, Yen-kuang CHEN, Qinggang ZHOU, Shaolin XIE
-
Patent number: 11528493Abstract: Methods and apparatuses for video transcoding based on spatial or temporal importance include: in response to receiving an encoded video bitstream, decoding a picture from the encoded video bitstream; determining a first level of spatial importance for a first region of a background of the picture based on an image segmentation technique; applying to the first region a first resolution-enhancement technique associated with the first level of spatial importance for increasing resolution of the first region by a scaling factor, wherein the first resolution-enhancement technique is selected from a set of resolution-enhancement techniques having different computational complexity levels; and encoding the first region using a video coding standard.Type: GrantFiled: May 6, 2020Date of Patent: December 13, 2022Assignee: Alibaba Group Holding LimitedInventors: Tae Meon Bae, Shaolin Xie, Minghai Qin, Yen-kuang Chen, Guanlin Wu, Qinggang Zhou
-
Patent number: 11470327Abstract: Scene aware video content encoding techniques can determine if video content is a given content type and is one of one or more given titles that include one or more given scenes. The one or more given scenes of the video content of the given type and given one of the titles can be encoded using corresponding scenes specific encoding parameter values, and the non-given scenes can be encoded using one or more general encoding parameter values. The one or more given titles can be selected based on a rate of streaming of various video content titles of the given type.Type: GrantFiled: March 30, 2020Date of Patent: October 11, 2022Assignee: Alibaba Group Holding LimitedInventors: Tae Meon Bae, Minghai Qin, Guanlin Wu, Yen-kuang Chen, Qinggang Zhou, Shaolin Xie
-
Publication number: 20220301523Abstract: A method for of encoding an application screen comprises partitioning graphic data into a plurality of graphic layers and classifying each of the plurality of graphic layers as either a screen content (SC) or a non-screen content (non-SC) layer. The method further comprises classifying each of the plurality of graphic layers as either a screen content (SC) or a non-screen content (non-SC) layer. Further, the method comprises rendering and encoding the one or more SC layers using a first codec and the one or more non-SC layers using a second codec.Type: ApplicationFiled: June 6, 2022Publication date: September 22, 2022Inventors: Tae Meon BAE, Sicheng LI, Yen-kuang CHEN, Guanlin WU, Shaolin XIE, Minghai QIN, Qinggang ZHOU
-
Patent number: 11386873Abstract: A method for of encoding an application screen comprises partitioning graphic data into a plurality of graphic layers and classifying each of the plurality of graphic layers as either a screen content (SC) or a non-screen content (non-SC) layer. The method further comprises classifying each of the plurality of graphic layers as either a screen content (SC) or a non-screen content (non-SC) layer. Further, the method comprises rendering and encoding the one or more SC layers using a first codec and the one or more non-SC layers using a second codec.Type: GrantFiled: April 1, 2020Date of Patent: July 12, 2022Assignee: Alibaba Group Holding LimitedInventors: Tae Meon Bae, Sicheng Li, Yen-kuang Chen, Guanlin Wu, Shaolin Xie, Minghai Qin, Qinggang Zhou
-
Publication number: 20220147567Abstract: A method and apparatus for characteristic-based video processing include: in response to receiving a region of a picture of a video sequence, determining a characteristic in the region, the region being independent of other regions of the picture for video coding; determining a class associated with the region based on the characteristic, the class being selected from a plurality of classes; and encoding the region using a parameter set associated with the class, the parameter set being selected from a plurality of parameter sets for video coding at different quality levels.Type: ApplicationFiled: January 21, 2022Publication date: May 12, 2022Inventors: Shaolin XIE, Minghai QIN, Yen-kuang CHEN, Tae Meon BAE, Qinggang ZHOU
-
Patent number: 11263261Abstract: A method and apparatus for characteristic-based video processing include: in response to receiving a region of a picture of a video sequence, determining a characteristic in the region, the region being independent of other regions of the picture for video coding; determining a class associated with the region based on the characteristic, the class being selected from a plurality of classes; and encoding the region using a parameter set associated with the class, the parameter set being selected from a plurality of parameter sets for video coding at different quality levels.Type: GrantFiled: February 14, 2020Date of Patent: March 1, 2022Assignee: Alibaba Group Holding LimitedInventors: Shaolin Xie, Minghai Qin, Yen-kuang Chen, Tae Meon Bae, Qinggang Zhou
-
Publication number: 20210352307Abstract: Methods and apparatuses for video transcoding based on spatial or temporal importance include: in response to receiving an encoded video bitstream, decoding a picture from the encoded video bitstream; determining a first level of spatial importance for a first region of a background of the picture based on an image segmentation technique; applying to the first region a first resolution-enhancement technique associated with the first level of spatial importance for increasing resolution of the first region by a scaling factor, wherein the first resolution-enhancement technique is selected from a set of resolution-enhancement techniques having different computational complexity levels; and encoding the first region using a video coding standard.Type: ApplicationFiled: May 6, 2020Publication date: November 11, 2021Inventors: Tae Meon BAE, Shaolin XIE, Minghai QIN, Yen-kuang Chen, Guanlin WU, Qinggang Zhou
-
Publication number: 20210312891Abstract: A method for of encoding an application screen comprises partitioning graphic data into a plurality of graphic layers and classifying each of the plurality of graphic layers as either a screen content (SC) or a non-screen content (non-SC) layer. The method further comprises classifying each of the plurality of graphic layers as either a screen content (SC) or a non-screen content (non-SC) layer. Further, the method comprises rendering and encoding the one or more SC layers using a first codec and the one or more non-SC layers using a second codec.Type: ApplicationFiled: April 1, 2020Publication date: October 7, 2021Inventors: Tae Meon BAE, Sicheng LI, Yen-kuang CHEN, Guanlin WU, Shaolin XIE, Minghai QIN, Qinggang ZHOU
-
Publication number: 20210306636Abstract: Scene aware video content encoding techniques can determine if video content is a given content type and is one of one or more given titles that include one or more given scenes. The one or more given scenes of the video content of the given type and given one of the titles can be encoded using corresponding scenes specific encoding parameter values, and the non-given scenes can be encoded using one or more general encoding parameter values. The one or more given titles can be selected based on a rate of streaming of various video content titles of the given type.Type: ApplicationFiled: March 30, 2020Publication date: September 30, 2021Inventors: Tae Meon BAE, Minghai QIN, Guanlin WU, Yen-kuang CHEN, Qinggang ZHOU, Shaolin XIE
-
Publication number: 20210304357Abstract: Methods and apparatuses for video processing based on spatial or temporal importance include: in response to receiving picture data of a picture of a video sequence, determining a level of semantic importance for the picture data, the picture data including a portion of the picture; and applying to the picture data a first resolution-enhancement technique associated with the level of semantic importance for increasing resolution of the picture data, wherein the first resolution-enhancement technique is selected from a set of resolution-enhancement techniques having different computational complexity levels.Type: ApplicationFiled: March 27, 2020Publication date: September 30, 2021Inventors: Tae Meon BAE, Minghai Qin, Yen-kuang CHEN, Shaolin XIE, Qinggang ZHOU, Guanlin WU
-
Publication number: 20210258588Abstract: A method and apparatus for characteristic-based video processing include: in response to receiving a region of a picture of a video sequence, determining a characteristic in the region, the region being independent of other regions of the picture for video coding; determining a class associated with the region based on the characteristic, the class being selected from a plurality of classes; and encoding the region using a parameter set associated with the class, the parameter set being selected from a plurality of parameter sets for video coding at different quality levels.Type: ApplicationFiled: February 14, 2020Publication date: August 19, 2021Inventors: Shaolin XIE, Minghai QIN, Yen-kuang CHEN, Tae Meon BAE, Qinggang ZHOU
-
Patent number: 9966932Abstract: An apparatus for parallel filtering, including a multi-granularity memory, a data cache device, a coefficient buffer broadcast device, a vector operation device and a command queue device. The multi-granularity memory is configured to store data to be filtered, filter coefficients and filtering result data. The data cache device is configured to cache, read and update the data to be filtered. The coefficient buffer broadcast device is configured to cache and broadcast the read filter coefficients. The command queue device is configured to store and output a queue of operation commands for the parallel filtering operation. The vector operation device is configured to perform a vector operation based on the data to be filtered and the output coefficient data, and write an operation result into the multi-granularity filtering result storage unit. A method is also provided.Type: GrantFiled: April 19, 2013Date of Patent: May 8, 2018Assignee: BEIJING SMARTLOGIC TECHNOLOGY LTD.Inventors: Donglin Wang, Leizu Yin, Yongyong Yang, Shaolin Xie, Tao Wang
-
Publication number: 20160233850Abstract: The present disclosure provides a method and apparatus for parallel filtering. The apparatus comprises: a multi-granularity memory, a data cache device, a coefficient buffer broadcast device, a vector operation device and a command queue device. The multi-granularity memory is configured to store data to be filtered, filter coefficients and filtering result data. The data cache device is configured to cache, read and update the data to be filtered. The coefficient buffer broadcast device is configured to cache and broadcast the read filter coefficients. The command queue device is configured to store and output a queue of operation commands for the parallel filtering operation. The vector operation device is configured to perform a vector operation based on the data to be filtered and the output coefficient data, and write an operation result into the multi-granularity filtering result storage unit.Type: ApplicationFiled: April 19, 2013Publication date: August 11, 2016Inventors: Donglin Wang, Leizu Yin, Yongyong Yang, Shaolin Xie, Tao Wang
-
Publication number: 20160162290Abstract: The present disclosure provides a processor having polymorphic instruction set architecture. The processor comprises a scalar processing unit, at least one polymorphic instruction processing unit, at least one multi-granularity parallel memory and a DMA controller. The polymorphic instruction processing unit comprises at least one functional unit. The polymorphic instruction processing unit is configured to interpret and execute a polymorphic instruction and the functional unit is configured to perform specific data operation tasks. The scalar processing unit is configured to invoke the polymorphic instruction and inquire an execution state of the polymorphic instruction. The DMA controller is configured to transmit configuration information for the polymorphic instruction and transmit data required by the polymorphic instruction to the multi-granularity parallel memory.Type: ApplicationFiled: April 19, 2013Publication date: June 9, 2016Inventors: Donglin Wang, Shaolin Xie, Yongyong Yang, Leizu Yin, Lei Wang, Zijun Liu, Tao Wang, Xing Zhang
-
Patent number: 9317481Abstract: A data access method and device for parallel FFT computation. In the method, FFT data and twiddle factors are stored in multi-granularity parallel memories, and divided into groups throughout the computation flow according to a uniform butterfly representation. Each group of data involves multiple butterflies that support parallel computation. Meanwhile, according to the butterfly representation, it is convenient to generate data address and twiddle factor coefficient address for each group. With different R/W granularities, it is possible to read/write data and corresponding twiddle factors in parallel from the multi-granularity memories. The method and device further provide data access devices for parallel FFT computation. In the method and device, no conflict will occur during read/write operations of memories, and no extract step is required for sorting the read/written data. Further, the method and device can flexibly define the parallel granularity according to particular applications.Type: GrantFiled: December 31, 2011Date of Patent: April 19, 2016Assignee: Institute of Automation, Chinese Academy of SciencesInventors: Shaolin Xie, Donglin Wang, Xiao Lin, Jie Hao, Xiaojun Xue, Tao Wang, Leizu Yin
-
Patent number: 9268744Abstract: A parallel bit reversal device and method. The device includes a parallel bit reversal unit, a butterfly computation and control unit, and a memory. The butterfly computation and control unit is coupled to the memory via a data bus. The parallel bit reversal unit is configured to bit-reverse butterfly group data used by the butterfly computation and control unit. The parallel bit reversal unit includes an address reversing logic coupled to the butterfly computation and control unit, and configured to perform mirror reversal and right-shift operations on a read address from the butterfly computation and control unit.Type: GrantFiled: December 31, 2011Date of Patent: February 23, 2016Assignee: Institute of Automation, Chinese Academy of SciencesInventors: Shaolin Xie, Donglin Wang, Jie Hao, Tao Wang, Leizu Yin
-
Patent number: 9262378Abstract: A method and device for multi-granularity parallel FFT butterfly computation. The method and device read data and twiddle factors for computation in one butterfly group from the input buffers and the twiddle factor buffer at a time, perform multi-stage butterfly computation in parallel using uniform butterfly representations, and write the results back to the input buffers. The method and device greatly reduce the frequency for accessing the memory, improve speed for butterfly computation, and reduce power consumption. The method and device achieve multi-granularity butterfly computation of various data formats in a parallel and efficient manner. The method and device can specify the parallel granularity and data format for butterfly computation according to particular applications, and are applicable to FFT butterfly computation of balanced and unbalanced groups.Type: GrantFiled: December 31, 2011Date of Patent: February 16, 2016Assignee: Institute of Automation, Chinese Academy of SciencesInventors: Donglin Wang, Tao Wang, Shaolin Xie, Jie Hao, Leizu Yin
-
Patent number: 9176929Abstract: A multi-granularity parallel FFT computation device including three memories, a butterfly computation device, a state control unit, a data reversing network and a first selector. The three memories are each a multi-granularity parallel memory, and store butterfly group data and twiddle factors corresponding to the butterfly group data. The butterfly computation device perform computations of a butterfly group based on the butterfly group data outputted from the first selector and the corresponding twiddle factors outputted from one of the memories, and write a computation result back to the other two memories. The device can read butterfly group data and corresponding twiddle factors in parallel from the multi-granularity parallel memories with a specific R/W granularity. No memory conflict will occur in the read operation, and no additional process is required for sorting the read/written data.Type: GrantFiled: December 31, 2011Date of Patent: November 3, 2015Assignee: Institute of Automation, Chinese Academy of SciencesInventors: Donglin Wang, Shaolin Xie, Jie Hao, Xiao Lin, Tao Wang, Leizu Yin
-
Patent number: 9171593Abstract: A multi-granularity parallel storage system including a plurality of memories, a shift generator, an address increment lookup unit, an address shifter, a row address generator, and a plurality of address adders. The shift generator is configured to generate a shift value. The address increment lookup unit is configured to generate input data for the address shifter. The address shifter is configured to cyclically shift the input data rightward by Shift elements and then output the shifted data. The row address generator is configured to generate a row address RowAddr and input the generated row address RowAddr to the other input terminal of each address adder. Each address adder is configured to perform a non-sign addition of the input data at the two input terminals to obtain a read/write (R/W) address for one of the memories and input the R/W address to an address input terminal of the memory.Type: GrantFiled: December 31, 2011Date of Patent: October 27, 2015Assignee: Institute of Automation, Chinese Academy of SciencesInventors: Donglin Wang, Zijun Liu, Xiaojun Xue, Xing Zhang, Zhiwei Zhang, Shaolin Xie