Abstract: Potential errors that might result from operating logic and/or memory circuits at an insufficient operating voltage are identified by electrically altering nodes of replica or operational circuits so that the electrically altered nodes are susceptible to errors. The electrically altered nodes in an embodiment are controlled using parametric drivers. A minimized operating voltage can be selected by operating at a marginal operating voltage and detecting a voltage threshold at which errors in the electrically altered nodes are detected, for example.

Abstract: Potential errors that might result from operating logic and/or memory circuits at an insufficient operating voltage are identified by electrically altering nodes of replica or operational circuits so that the electrically altered nodes are susceptible to errors. The electrically altered nodes in an embodiment are controlled using parametric drivers. A minimized operating voltage can be selected by operating at a marginal operating voltage and detecting a voltage threshold at which errors in the electrically altered nodes are detected, for example.

Abstract: Memory circuit and a tracking circuit thereof. The tracking circuit includes a dummy bit line (DBL). The tracking circuit further includes a first circuit to discharge the dummy bit line in response to a first signal and a wordline activation signal. The wordline activation signal causes activation of a memory cell. The tracking circuit also includes a second circuit which is responsive to discharge of the dummy bit line to enable access to the memory cell.

Abstract: Memory circuit and a tracking circuit thereof. The tracking circuit includes a dummy bit line (DBL). The tracking circuit further includes a first circuit to discharge the dummy bit line in response to a first signal and a wordline activation signal. The wordline activation signal causes activation of a memory cell. The tracking circuit also includes a second circuit which is responsive to discharge of the dummy bit line to enable access to the memory cell.

Abstract: In one aspect, the present invention generally provides methods for characterizing mineralization of a material, e.g., a biomaterial, by illuminating the material with radiation and analyzing radiation scattered from the material in response to the illumination. For example, in some embodiments, a material can be illuminated with polarized radiation at a plurality of wavelengths and the elastically scattered radiation corresponding to two or more of those wavelengths can be collected at two polarizations: one parallel and the other perpendicular to the illumination polarization. A differential intensity of the scattered radiation at the two polarizations can be analyzed as a function of wavelength to obtain information regarding the morphology of mineral deposits in the sample. Further, the total scattered radiation can be analyzed to derive information regarding the level of mineralization.

Abstract: A scheme for bit cell designs for ternary content addressable memory for comparing search data with content data is disclosed. In one embodiment, a system for comparing search data with content data stored in a ternary content addressable memory (TCAM) unit, includes a first static logic gate for comparing a first content data with a first search data, and a second static logic gate coupled to the first static logic gate for comparing a second content data with a second search data. The content data comprises the first content data and the second content data and the search data comprises the first search data and the second search data. The first static logic gate forwards a signal for disabling the second static logic gate if the first content data does not match with the first search data.

Abstract: A scheme for ultra-low power content addressable memory based on a ripple search is disclosed. In one embodiment, a system for content addressable memory (CAM), includes a storage unit for storing a portion of content data, and a match module for comparing the portion of the content data with a respective portion of search data received by the match module. The match module includes a first static logic gate associated with a first half of the storage unit storing a sub-portion of the portion of the content data, and a second static logic gate associated with a second half of the storage unit. The first static logic gate forwards a signal for disabling the second static logic gate if the sub-portion of the portion of the content data does not match with a respective sub-portion of the portion of the search data.

Abstract: Edge-sensitive Feedback-controlled pulse generator. A circuit includes a pulse generating circuit responsive to a desired transition in an input signal to initiate an output pulse. The circuit also includes a delay circuit responsive to the output pulse to generate a feedback signal. Further, the circuit includes a first latch that renders the pulse generating circuit unresponsive to any change in the input signal until the feedback signal has been generated, a switch responsive to the feedback signal to complete the output pulse, a second latch responsive to a change in the input signal after the feedback signal has been generated to render the pulse generating circuit responsive to a subsequent occurrence of the desired transition in the input signal to initiate the output pulse again, and a third latch responsive to the change in the input signal after the feedback signal has been generated.

Abstract: A scheme for ultra-low power content addressable memory based on a ripple search is disclosed. In one embodiment, a system for content addressable memory (CAM), includes a storage unit for storing a portion of content data, and a match module for comparing the portion of the content data with a respective portion of search data received by the match module. The match module includes a first static logic gate associated with a first half of the storage unit storing a sub-portion of the portion of the content data, and a second static logic gate associated with a second half of the storage unit. The first static logic gate forwards a signal for disabling the second static logic gate if the sub-portion of the portion of the content data does not match with a respective sub-portion of the portion of the search data.

Abstract: A scheme for bit cell designs for ternary content addressable memory for comparing search data with content data is disclosed. In one embodiment, a system for comparing search data with content data stored in a ternary content addressable memory (TCAM) unit, includes a first static logic gate for comparing a first content data with a first search data, and a second static logic gate coupled to the first static logic gate for comparing a second content data with a second search data. The content data comprises the first content data and the second content data and the search data comprises the first search data and the second search data. The first static logic gate forwards a signal for disabling the second static logic gate if the first content data does not match with the first search data.